d0p1 🏳️⚧️
a0c99799e8
feat(boot/loader): move kernel to 0x100000
2024-07-06 15:19:35 +02:00
d0p1 🏳️⚧️
41676291fe
feat(kernel): wip serial logger
2024-07-05 14:23:58 +02:00
d0p1 🏳️⚧️
03c95cb0a4
chore: add 'coff.h' header
Build / test (push) Waiting to run
Docs / test (push) Waiting to run
2024-03-20 16:51:27 +01:00
d0p1 🏳️⚧️
060c2835f6
refactor: move multiboot struct from kernel to loader
2024-03-03 16:38:35 +01:00
d0p1 🏳️⚧️
3fddd705f8
refactor: switch from NASM to FASM
2024-02-04 20:50:36 +01:00
d0p1 🏳️⚧️
32f1956ca2
refactor: rework IDT and GDT
2023-07-13 16:00:20 +02:00
d0p1 🏳️⚧️
08a7d5c975
docs: documente ISA/AT buses I/O Port map
2023-07-13 13:47:23 +02:00
d0p1 🏳️⚧️
a9fec6e18c
feat: setup paging and map kernel to higher half
...
Kernel is now at 0xC0100000, but still we use 4MiB pages, instruction like 'invlpg' which are invalid for cpu prior to 486, and we don't ensure multiboot structures are mapped. Still lot of work
2023-07-12 13:31:08 +02:00
d0p1 🏳️⚧️
72f4ef1f00
docs: documents memory management
2023-07-12 11:33:44 +02:00
d0p1 🏳️⚧️
5cccfa22d4
feat(kernel): WIP higher half kernel
2023-07-02 16:52:25 +02:00
d0p1 🏳️⚧️
8cefd7946f
refactor: rework the entire build system
2023-06-29 06:30:04 +02:00
d0p1 🏳️⚧️