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ack/mach/proto/mcg/hop.h

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Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
#ifndef HOP_H
#define HOP_H
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
enum insel_type
{
INSEL_STRING,
Register allocator now gets all the way through all of my test file without crashing (albeit with register moves and swaps stubbed out). Correct code? Who knows.
2016-10-10 21:19:46 +00:00
INSEL_HREG,
Get quite a long way towards basic output-register equality constraints (needed to make special nodes like NOP work properly). Realise that the way I'm dealing with the instruction selector is all wrong; I need to physically copy chunks of tree to give to burg (so I can terminate them correctly).
2016-10-02 21:25:54 +00:00
INSEL_VREG,
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
INSEL_VALUE,
Register spilling to the stack frame works, more or less.
2016-10-15 20:53:56 +00:00
INSEL_ST_OFFSET,
INSEL_AB_OFFSET,
INSEL_LB_OFFSET,
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
INSEL_EOI
};
struct insel
{
enum insel_type type;
Add (pretty crummy) support for register aliases and static pairs of registers. We should have enough functionality now for rather buggy 8-bit ints and doubles. Rework the table and the platform.c to match.
2016-10-21 21:31:00 +00:00
int index;
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
union
{
const char* string;
Register allocator now gets all the way through all of my test file without crashing (albeit with register moves and swaps stubbed out). Correct code? Who knows.
2016-10-10 21:19:46 +00:00
struct hreg* hreg;
Get quite a long way towards basic output-register equality constraints (needed to make special nodes like NOP work properly). Realise that the way I'm dealing with the instruction selector is all wrong; I need to physically copy chunks of tree to give to burg (so I can terminate them correctly).
2016-10-02 21:25:54 +00:00
struct vreg* vreg;
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
struct ir* value;
Register spilling to the stack frame works, more or less.
2016-10-15 20:53:56 +00:00
int offset;
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
}
u;
};
The register allocator now makes a spirited attempt to honour register attributes when allocating. Unfortunately, backward edges don't work (because the limited def-use chain stuff doesn't work across basic blocks). Needs more thought.
2016-10-09 13:09:34 +00:00
struct constraint
{
uint32_t attrs;
Add support for preserved registers.
2016-10-29 18:22:44 +00:00
bool preserved;
Output register equality constraints work.
2016-10-14 20:17:02 +00:00
struct vreg* equals_to;
The register allocator now makes a spirited attempt to honour register attributes when allocating. Unfortunately, backward edges don't work (because the limited def-use chain stuff doesn't work across basic blocks). Needs more thought.
2016-10-09 13:09:34 +00:00
};
Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
struct hop
{
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
int id;
Overhaul of everything phi related; critical edge splitting now happens before anything SSA happens; liveness calculations now look like they might be working.
2016-10-07 22:21:23 +00:00
struct basicblock* bb;
Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
struct ir* ir;
You can now mark a register as corrupting a certain register class; calls work, or at least look like they work. The bad news is that the register allocator has a rare talent for putting things in the wrong register.
2016-10-14 23:15:08 +00:00
const struct burm_instruction_data* insndata;
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
ARRAYOF(struct insel) insels;
Get quite a long way towards basic output-register equality constraints (needed to make special nodes like NOP work properly). Realise that the way I'm dealing with the instruction selector is all wrong; I need to physically copy chunks of tree to give to burg (so I can terminate them correctly).
2016-10-02 21:25:54 +00:00
struct vreg* output;
Better constraint syntax; mcgg now passes register usage information up to mcg; mcg can track individual hop inputs and outputs (needed for live range analysis!); the register allocator now puts the basic blocks into the right order in preparation for live range analysis.
2016-10-05 20:56:25 +00:00
The register allocator now makes a spirited attempt to honour register attributes when allocating. Unfortunately, backward edges don't work (because the limited def-use chain stuff doesn't work across basic blocks). Needs more thought.
2016-10-09 13:09:34 +00:00
PMAPOF(struct vreg, struct constraint) constraints;
Better constraint syntax; mcgg now passes register usage information up to mcg; mcg can track individual hop inputs and outputs (needed for live range analysis!); the register allocator now puts the basic blocks into the right order in preparation for live range analysis.
2016-10-05 20:56:25 +00:00
ARRAYOF(struct vreg) ins;
ARRAYOF(struct vreg) outs;
Overhaul of everything phi related; critical edge splitting now happens before anything SSA happens; liveness calculations now look like they might be working.
2016-10-07 22:21:23 +00:00
ARRAYOF(struct vreg) throughs;
Basic register allocation works!
2016-10-08 21:32:54 +00:00
register_assignment_t regsin;
register_assignment_t regsout;
Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
};
Overhaul of everything phi related; critical edge splitting now happens before anything SSA happens; liveness calculations now look like they might be working.
2016-10-07 22:21:23 +00:00
extern struct hop* new_hop(struct basicblock* bb, struct ir* ir);
Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
extern void hop_add_string_insel(struct hop* hop, const char* string);
Add (pretty crummy) support for register aliases and static pairs of registers. We should have enough functionality now for rather buggy 8-bit ints and doubles. Rework the table and the platform.c to match.
2016-10-21 21:31:00 +00:00
extern void hop_add_hreg_insel(struct hop* hop, struct hreg* hreg, int index);
extern void hop_add_vreg_insel(struct hop* hop, struct vreg* vreg, int index);
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
extern void hop_add_value_insel(struct hop* hop, struct ir* ir);
Register spilling to the stack frame works, more or less.
2016-10-15 20:53:56 +00:00
extern void hop_add_st_offset_insel(struct hop* hop, struct hreg* hreg);
extern void hop_add_ab_offset_insel(struct hop* hop, int offset);
extern void hop_add_lb_offset_insel(struct hop* hop, int offset);
Actually, I don't need vregs: hops work just as well. Particularly if I restructure things so that I don't need to walk the blasted ir / burg tree every time I look at an instruction.
2016-09-27 21:38:47 +00:00
extern void hop_add_eoi_insel(struct hop* hop);
Function termination gets routed through an exit block; we now have prologues and epilogues. mcgg now exports some useful data as headers. Start factoring out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 16:38:46 +00:00
extern void hop_add_insel(struct hop* hop, const char* fmt, ...);
Refactored the way hops are rendered; add support for emitting code (although with no prologue or epilogue yet).
2016-10-10 22:12:11 +00:00
extern char* hop_render(struct hop* hop);
Fleshed out hops and vregs. The result is almost looking like code now --- uncanny.
2016-09-26 22:19:45 +00:00
extern void hop_print(char k, struct hop* hop);
Start factoring out the hardware op code.
2016-09-25 21:29:59 +00:00
#endif
Made sure that all files end in vim magic.
2016-10-05 19:07:29 +00:00
/* vim: set sw=4 ts=4 expandtab : */
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