2016-09-25 20:17:14 +00:00
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REGISTERS
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2016-10-09 12:45:13 +00:00
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/* Registers are allocated top down; the order here is odd in order to make
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* sure that non-volatile registers get allocated from r31 (or f31) down. */
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r12 bytes4 int volatile;
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r11 bytes4 int volatile;
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r10 bytes4 int volatile;
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r9 bytes4 int volatile;
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r8 bytes4 int volatile;
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r7 bytes4 int volatile;
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r6 bytes4 int volatile;
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r5 bytes4 int volatile;
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r4 bytes4 int volatile;
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r3 bytes4 int ret volatile;
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2016-10-08 09:35:33 +00:00
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r31 bytes4 int;
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r30 bytes4 int;
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r29 bytes4 int;
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r28 bytes4 int;
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r27 bytes4 int;
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r26 bytes4 int;
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r25 bytes4 int;
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r24 bytes4 int;
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r23 bytes4 int;
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r22 bytes4 int;
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r21 bytes4 int;
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r20 bytes4 int;
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r19 bytes4 int;
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r18 bytes4 int;
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r17 bytes4 int;
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2016-10-09 12:45:13 +00:00
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r16 bytes4 int;
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r15 bytes4 int;
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r14 bytes4 int;
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f14 bytes4 float volatile;
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f13 bytes4 float volatile;
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f12 bytes4 float volatile;
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f11 bytes4 float volatile;
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f10 bytes4 float volatile;
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f9 bytes4 float volatile;
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f8 bytes4 float volatile;
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f7 bytes4 float volatile;
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f6 bytes4 float volatile;
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f5 bytes4 float volatile;
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f4 bytes4 float volatile;
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f3 bytes4 float volatile;
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f2 bytes4 float volatile;
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f1 bytes4 float volatile;
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f0 bytes4 float volatile;
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f31 bytes4 float;
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f30 bytes4 float;
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f29 bytes4 float;
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f28 bytes4 float;
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f27 bytes4 float;
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f26 bytes4 float;
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f25 bytes4 float;
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f24 bytes4 float;
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f23 bytes4 float;
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f22 bytes4 float;
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f21 bytes4 float;
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f20 bytes4 float;
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f19 bytes4 float;
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f18 bytes4 float;
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f17 bytes4 float;
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f16 bytes4 float;
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f15 bytes4 float;
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cr0 cr;
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2016-10-01 10:17:14 +00:00
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2016-09-25 20:17:14 +00:00
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DECLARATIONS
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2016-10-08 09:35:33 +00:00
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cr;
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2016-10-02 19:51:25 +00:00
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2016-09-25 20:17:14 +00:00
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address fragment;
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2016-10-01 10:17:14 +00:00
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2016-09-25 20:17:14 +00:00
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2016-09-24 17:03:55 +00:00
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PATTERNS
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2016-09-24 15:20:40 +00:00
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2016-09-24 20:46:08 +00:00
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/* Special */
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PAIR(BLOCK4, BLOCK4);
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2016-10-08 09:35:33 +00:00
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2016-09-24 20:46:08 +00:00
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/* Miscellaneous special things */
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2016-10-05 20:56:25 +00:00
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PUSH4(in:(int)reg)
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2016-10-08 09:35:33 +00:00
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emit "stwu %in, -4(sp)"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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out:(int)reg = POP4
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2016-10-08 09:35:33 +00:00
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emit "lwz %out, 0(sp)"
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emit "addi sp, sp, 4"
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cost 8;
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2016-09-24 20:46:08 +00:00
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2016-10-08 09:35:33 +00:00
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out:(float)reg = POPF4
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emit "lfs %out, 0(sp)"
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emit "addi sp, sp, 4"
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cost 8;
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2016-09-24 20:46:08 +00:00
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RET
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emit "ret"
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cost 4;
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2016-10-05 20:56:25 +00:00
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SETRET4(in:(ret)reg)
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2016-10-08 21:32:54 +00:00
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emit "mr r3, %in"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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(ret)reg = GETRET4
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cost 1;
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STACKADJUST4(delta:CONST4)
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2016-10-09 10:32:36 +00:00
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when signed_constant(%delta, 16)
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2016-10-08 09:35:33 +00:00
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emit "addi sp, sp, $delta"
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2016-10-01 21:41:45 +00:00
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cost 4;
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2016-09-25 20:17:14 +00:00
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2016-10-08 09:35:33 +00:00
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2016-09-24 20:46:08 +00:00
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/* Memory operations */
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2016-10-05 20:56:25 +00:00
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STORE4(addr:address, value:(int)reg)
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2016-10-08 09:35:33 +00:00
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emit "stw %value, %addr"
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cost 4;
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STORE2(addr:address, value:(int)reg)
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emit "sth %value, %addr"
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2016-09-24 15:20:40 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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STORE1(addr:address, value:(int)reg)
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2016-10-08 09:35:33 +00:00
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emit "stb %value, %addr"
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2016-10-01 21:41:45 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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out:(int)reg = LOAD4(addr:address)
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2016-10-08 09:35:33 +00:00
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emit "lwz %out, %addr"
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cost 4;
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out:(int)reg = LOAD2(addr:address)
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emit "lhz %out, %addr"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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out:(int)reg = LOAD1(addr:address)
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2016-10-08 09:35:33 +00:00
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emit "lbz %out, %addr"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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out:(int)reg = CIU14(LOAD1(addr:address))
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2016-10-08 09:35:33 +00:00
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emit "lbz %out, %addr"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = CIU24(LOAD2(addr:address))
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emit "lhz %out, %addr"
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2016-09-25 15:14:54 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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2016-09-24 20:46:08 +00:00
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/* Locals */
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2016-10-05 20:56:25 +00:00
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out:(int)reg = in:LOCAL4
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2016-10-08 09:35:33 +00:00
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emit "addi %out, fp, #$in"
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2016-09-24 15:20:40 +00:00
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cost 4;
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2016-09-24 20:46:08 +00:00
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address = in:LOCAL4
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2016-10-08 09:35:33 +00:00
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emit "$in(fp)";
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2016-09-24 20:46:08 +00:00
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/* Memory addressing modes */
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2016-10-05 20:56:25 +00:00
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address = ADD4(addr:(int)reg, offset:CONST4)
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2016-10-09 10:32:36 +00:00
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when signed_constant(%offset, 16)
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2016-10-08 09:35:33 +00:00
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emit "$offset(%addr)";
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2016-10-01 21:41:45 +00:00
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2016-10-05 20:56:25 +00:00
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address = addr:(int)reg
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2016-10-08 09:35:33 +00:00
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emit "0(%addr)";
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2016-09-24 15:20:40 +00:00
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2016-09-24 20:46:08 +00:00
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2016-10-01 21:41:45 +00:00
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2016-09-24 20:46:08 +00:00
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/* Branches */
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JUMP(addr:BLOCK4)
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2016-09-25 15:14:54 +00:00
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emit "b $addr"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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CJUMPEQ(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, EQ, $true"
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2016-09-27 21:38:47 +00:00
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emit "b $false"
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cost 8;
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2016-10-08 09:35:33 +00:00
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CJUMPLE(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, LE, $true"
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emit "b $false"
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2016-10-01 21:41:45 +00:00
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cost 8;
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2016-10-08 09:35:33 +00:00
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CJUMPLT(value:(cr)cr, PAIR(true:BLOCK4, false:BLOCK4))
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emit "bc IFTRUE, LT, $true"
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emit "b $false"
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2016-10-02 15:50:34 +00:00
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cost 8;
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2016-10-01 21:41:45 +00:00
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CALL(dest:LABEL4)
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emit "bl $dest"
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cost 4;
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2016-10-08 09:35:33 +00:00
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CALL(dest:(int)reg)
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emit "mtspr ctr, %dest"
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emit "bcctrl ALWAYS, 0, 0"
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cost 8;
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JUMP(dest:LABEL4)
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emit "b $dest"
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cost 4;
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2016-09-24 20:46:08 +00:00
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/* Comparisons */
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2016-10-08 09:35:33 +00:00
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cr:(cr)cr = COMPARES4(left:(int)reg, right:(int)reg)
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emit "cmp %cr, 0, %left, %right"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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cr:(cr)cr = COMPARES4(left:(int)reg, right:CONST4)
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2016-10-09 10:32:36 +00:00
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when signed_constant(%right, 16)
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2016-10-08 09:35:33 +00:00
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emit "cmpi %cr, 0, %left, $right"
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2016-09-27 21:38:47 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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cr:(cr)cr = COMPAREU4(left:(int)reg, right:(int)reg)
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emit "cmpl %cr, 0, %left, %right"
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cost 4;
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cr:(cr)cr = COMPAREU4(left:(int)reg, right:CONST4)
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2016-10-09 10:32:36 +00:00
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when signed_constant(%right, 16)
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2016-10-08 09:35:33 +00:00
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emit "cmpli %cr, 0, %left, $right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPARES4(left:(int)reg, right:(int)reg), result:CONST4)
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2016-10-09 10:32:36 +00:00
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when specific_constant(%result, 0)
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2016-10-08 09:35:33 +00:00
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emit "cmp %cr, 0, %left, %right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPARES4(left:(int)reg, right:CONST4), result:CONST4)
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2016-10-09 10:32:36 +00:00
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when specific_constant(%result, 0)
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when signed_constant(%right, 16)
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2016-10-08 09:35:33 +00:00
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emit "cmpi %cr, 0, %left, $right"
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cost 4;
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cr:(cr)cr = COMPARES4(COMPAREU4(left:(int)reg, right:(int)reg), result:CONST4)
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2016-10-09 10:32:36 +00:00
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when specific_constant(%result, 0)
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2016-10-08 09:35:33 +00:00
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emit "cmpl %cr, 0, %left, %right"
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cost 4;
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2016-09-24 20:46:08 +00:00
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/* Conversions */
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2016-10-05 20:56:25 +00:00
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out:(int)reg = CII14(CIU41(value:(int)reg))
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2016-10-08 09:35:33 +00:00
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emit "extsb %out, %value"
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cost 4;
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out:(int)reg = CII24(CIU42(value:(int)reg))
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emit "extsh %out, %value"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-05 20:56:25 +00:00
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out:(int)reg = CIU41(in:(int)reg)
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2016-10-08 09:35:33 +00:00
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emit "andi %out, %in, 0xff"
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2016-09-24 20:46:08 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = CIU42(in:(int)reg)
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emit "andi %out, %in, 0xffff"
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cost 4;
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out:(int)reg = CIU44(in:(int)reg)
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emit "mr %out, %in"
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cost 4;
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2016-09-24 20:46:08 +00:00
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/* ALU operations */
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2016-09-24 15:20:40 +00:00
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2016-10-08 09:35:33 +00:00
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out:(int)reg = ADD4(left:(int)reg, right:(int)reg)
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2016-10-05 20:56:25 +00:00
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emit "add %out, %left, %right"
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2016-09-24 15:20:40 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = ADD4(left:(int)reg, right:CONST4)
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2016-10-09 10:32:36 +00:00
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when signed_constant(%right, 16)
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2016-10-08 09:35:33 +00:00
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emit "addi %out, %left, $right"
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2016-09-24 15:20:40 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = SUB4(left:(int)reg, right:(int)reg)
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emit "sub %out, %right, %left"
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cost 4;
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2016-10-01 21:41:45 +00:00
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2016-10-08 09:35:33 +00:00
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out:(int)reg = MUL4(left:(int)reg, right:(int)reg)
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emit "mullw %out, %right, %left"
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2016-10-01 21:41:45 +00:00
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = MOD4(left:(int)reg, right:(int)reg)
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emit "divw %out, %left, %right"
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emit "mullw %out, %out, %right"
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emit "subf %out, %out, %left"
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cost 12;
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out:(int)reg = DIV4(left:(int)reg, right:(int)reg)
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emit "divw %out, %left, %right"
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cost 4;
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2016-09-24 15:20:40 +00:00
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2016-10-09 12:45:13 +00:00
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out:(int)reg = ASL4(left:(int)reg, right:(int)reg)
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emit "slw %out, %left, %right"
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cost 4;
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2016-10-08 09:35:33 +00:00
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out:(int)reg = NEG4(left:(int)reg)
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emit "neg %out, %left"
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cost 4;
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2016-09-24 15:20:40 +00:00
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2016-10-08 09:35:33 +00:00
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out:(int)reg = EOR4(left:(int)reg, right:(int)reg)
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emit "xor %out, %right, %left"
|
2016-09-24 15:20:40 +00:00
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|
|
cost 4;
|
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|
2016-10-05 20:56:25 +00:00
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|
|
out:(int)reg = value:LABEL4
|
2016-10-08 09:35:33 +00:00
|
|
|
emit "la %out, $value"
|
2016-09-24 20:46:08 +00:00
|
|
|
cost 4;
|
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|
2016-10-05 20:56:25 +00:00
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|
|
out:(int)reg = value:BLOCK4
|
2016-10-08 09:35:33 +00:00
|
|
|
emit "la %out, $value"
|
2016-09-24 15:20:40 +00:00
|
|
|
cost 4;
|
|
|
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|
2016-10-05 20:56:25 +00:00
|
|
|
out:(int)reg = value:CONST4
|
2016-10-08 09:35:33 +00:00
|
|
|
emit "la %out, $value"
|
2016-10-01 11:56:52 +00:00
|
|
|
cost 8;
|
|
|
|
|
2016-10-08 09:35:33 +00:00
|
|
|
|
2016-09-29 20:06:04 +00:00
|
|
|
/* FPU operations */
|
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|
|
2016-10-09 13:08:03 +00:00
|
|
|
out:(float)reg = value:CONSTF4
|
|
|
|
emit "lfs %out, address-containing-$value"
|
|
|
|
cost 8;
|
|
|
|
|
2016-10-05 20:56:25 +00:00
|
|
|
out:(float)reg = ADDF4(left:(float)reg, right:(float)reg)
|
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|
|
emit "fadds %out, %left, %right"
|
2016-09-29 20:06:04 +00:00
|
|
|
cost 4;
|
|
|
|
|
2016-10-09 13:08:03 +00:00
|
|
|
out:(float)reg = SUBF4(left:(float)reg, right:(float)reg)
|
|
|
|
emit "fsubs %out, %left, %right"
|
|
|
|
cost 4;
|
|
|
|
|
|
|
|
|
2016-10-05 19:07:29 +00:00
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|
|
/* vim: set sw=4 ts=4 expandtab : */
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