fixed csb so that it also handles 0 cases

This commit is contained in:
ceriel 1988-03-16 19:38:14 +00:00
parent 2f11dce5ef
commit 0030ddd97f
2 changed files with 5 additions and 3 deletions

View file

@ -80,9 +80,10 @@ csb_z: mov (sp)+,d0 ; bra 0f
csb_l: adroff ; move.w (a5),d0 csb_l: adroff ; move.w (a5),d0
0: comp wrd,d0 ; bne e_illins 0: comp wrd,d0 ; bne e_illins
csb_1W: move.l (sp)+,a0 ; mov (sp)+,d0 csb_1W: move.l (sp)+,a0 ; mov (sp)+,d0
mov 4(a0),d1 ; sub.l #1,d1
move.l a0,a3 move.l a0,a3
!Use a3 as a general register !Use a3 as a general register
mov 4(a0),d1 ; sub.l #1,d1
blt 2f
move.l wrd,d2 ; add.l #4,d2 move.l wrd,d2 ; add.l #4,d2
1: add.l d2,a0 ; comp (a0),d0 1: add.l d2,a0 ; comp (a0),d0
dbeq d1,1b ; bne 2f dbeq d1,1b ; bne 2f

View file

@ -2921,11 +2921,12 @@ csb.z: mov (sp)+,r0; br 1f;
csb.l: jsr pc,wrdoff; csb.l: jsr pc,wrdoff;
1: sub $2,r0; jne e.illins; 1: sub $2,r0; jne e.illins;
csb.1W: mov (sp)+,r0; mov (sp)+,r1; csb.1W: mov (sp)+,r0; mov (sp)+,r1;
mov 2(r0),r5; mov r0,pcx; mov r0,pcx; mov 2(r0),r5
/use pcx as ordinary register /use pcx as ordinary register
ble 3f
2: add $4,r0; cmp (r0),r1; 2: add $4,r0; cmp (r0),r1;
beq 4f; sob r5,2b; beq 4f; sob r5,2b;
mov (pcx),pcx; jeq e.case; next 3: mov (pcx),pcx; jeq e.case; next
4: mov 2(r0),pcx; jeq e.case; next 4: mov 2(r0),pcx; jeq e.case; next
rck.l: jsr pc,wrdoff; br 1f; rck.l: jsr pc,wrdoff; br 1f;