fixed csb so that it also handles 0 cases
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2f11dce5ef
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@ -80,9 +80,10 @@ csb_z: mov (sp)+,d0 ; bra 0f
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csb_l: adroff ; move.w (a5),d0
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csb_l: adroff ; move.w (a5),d0
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0: comp wrd,d0 ; bne e_illins
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0: comp wrd,d0 ; bne e_illins
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csb_1W: move.l (sp)+,a0 ; mov (sp)+,d0
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csb_1W: move.l (sp)+,a0 ; mov (sp)+,d0
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mov 4(a0),d1 ; sub.l #1,d1
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move.l a0,a3
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move.l a0,a3
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!Use a3 as a general register
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!Use a3 as a general register
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mov 4(a0),d1 ; sub.l #1,d1
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blt 2f
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move.l wrd,d2 ; add.l #4,d2
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move.l wrd,d2 ; add.l #4,d2
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1: add.l d2,a0 ; comp (a0),d0
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1: add.l d2,a0 ; comp (a0),d0
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dbeq d1,1b ; bne 2f
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dbeq d1,1b ; bne 2f
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@ -2921,11 +2921,12 @@ csb.z: mov (sp)+,r0; br 1f;
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csb.l: jsr pc,wrdoff;
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csb.l: jsr pc,wrdoff;
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1: sub $2,r0; jne e.illins;
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1: sub $2,r0; jne e.illins;
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csb.1W: mov (sp)+,r0; mov (sp)+,r1;
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csb.1W: mov (sp)+,r0; mov (sp)+,r1;
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mov 2(r0),r5; mov r0,pcx;
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mov r0,pcx; mov 2(r0),r5
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/use pcx as ordinary register
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/use pcx as ordinary register
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ble 3f
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2: add $4,r0; cmp (r0),r1;
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2: add $4,r0; cmp (r0),r1;
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beq 4f; sob r5,2b;
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beq 4f; sob r5,2b;
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mov (pcx),pcx; jeq e.case; next
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3: mov (pcx),pcx; jeq e.case; next
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4: mov 2(r0),pcx; jeq e.case; next
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4: mov 2(r0),pcx; jeq e.case; next
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rck.l: jsr pc,wrdoff; br 1f;
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rck.l: jsr pc,wrdoff; br 1f;
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