Revert change; addis/ori requires different handling to addis/lwz due to ori's
payload being unsigned while lwz's payload is signed.
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3c0bc205fc
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14aab21204
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@ -119,13 +119,14 @@ static uint32_t get_powerpc_valu(char* addr, uint16_t type)
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/* branch instruction */
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/* branch instruction */
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return opcode1 & 0x03fffffd;
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return opcode1 & 0x03fffffd;
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}
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}
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else
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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((opcode2 & 0xfc000000) == 0x60000000))
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{
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{
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/* If it's not a branch, we're just going to assume that the user
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/* addis / ori instruction pair */
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* knows what they're doing and this is a addis/ori pair (or
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* compatible). */
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return ((opcode1 & 0xffff) << 16) | (opcode2 & 0xffff);
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return ((opcode1 & 0xffff) << 16) | (opcode2 & 0xffff);
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}
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}
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assert(0 && "unrecognised PowerPC instruction");
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}
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}
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/*
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/*
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@ -259,17 +260,17 @@ static void put_powerpc_valu(char* addr, uint32_t value, uint16_t type)
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i |= value & 0x03fffffd;
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i |= value & 0x03fffffd;
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write4(i, addr, type);
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write4(i, addr, type);
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}
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}
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else
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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((opcode2 & 0xfc000000) == 0x60000000))
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{
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{
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/* If it's not a branch, we're just going to assume that the user
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* knows what they're doing and this is a addis/ori pair (or
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* compatible). */
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uint16_t hi = value >> 16;
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uint16_t hi = value >> 16;
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uint16_t lo = value & 0xffff;
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uint16_t lo = value & 0xffff;
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write4((opcode1 & 0xffff0000) | hi, addr+0, type);
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write4((opcode1 & 0xffff0000) | hi, addr+0, type);
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write4((opcode2 & 0xffff0000) | lo, addr+4, type);
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write4((opcode2 & 0xffff0000) | lo, addr+4, type);
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}
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}
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else
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assert(0 && "unrecognised PowerPC instruction");
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}
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}
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/*
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/*
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