From 17efc329f83c547c6917b6128d911763c3ba0ca0 Mon Sep 17 00:00:00 2001 From: ceriel Date: Mon, 16 Nov 1992 17:24:25 +0000 Subject: [PATCH] Separated the m68020 syntax from the table, so that we can also create a m68000 code generator producing m68020 syntax --- mach/m68020/ncg/mach.c | 26 +++++++++++++----- mach/m68020/ncg/table | 60 ++++++++++++++++++++++++------------------ mach/m68k2/ncg/mach.c | 26 +++++++++++++----- mach/m68k2/ncg/table | 60 ++++++++++++++++++++++++------------------ mach/m68k4/ncg/mach.c | 26 +++++++++++++----- mach/m68k4/ncg/table | 60 ++++++++++++++++++++++++------------------ mach/moon3/ncg/mach.c | 26 +++++++++++++----- mach/moon3/ncg/table | 60 ++++++++++++++++++++++++------------------ 8 files changed, 216 insertions(+), 128 deletions(-) diff --git a/mach/m68020/ncg/mach.c b/mach/m68020/ncg/mach.c index a7eb6ebf3..6ab31edb1 100644 --- a/mach/m68020/ncg/mach.c +++ b/mach/m68020/ncg/mach.c @@ -10,6 +10,11 @@ */ #include + +#if TBL68020 +#define SYNTAX_68020 1 +#endif + #include con_part(sz,w) register sz; word w; { @@ -100,7 +105,7 @@ regreturn() register struct regsav_t *p; if (regnr > 1) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"movem.l (-%ld,a6),", nlocals); #else fprintf(codefile,"movem.l -%ld(a6),", nlocals); @@ -113,7 +118,7 @@ regreturn() putc('\n',codefile); } else if (regnr == 1) { p = regsav; -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.l (-%ld,a6),%s\n",nlocals, p->rs_reg); #else fprintf(codefile,"move.l -%ld(a6),%s\n",nlocals, p->rs_reg); @@ -131,9 +136,18 @@ f_regsave() fprintf(codefile,"link\ta6,#-%ld\n",nlocals); #else if (nlocals > 32768) { - fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\ntst.b -40(sp)\n", nlocals); + fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\n", nlocals); } - else fprintf(codefile,"link\ta6,#-%ld\ntst.b -40(sp)\n",nlocals); + else fprintf(codefile,"link\ta6,#-%ld\n",nlocals); +#endif +#ifndef NOSTACKTEST + fprintf(codefile, "tst.b %s\n", +#ifdef SYNTAX_68020 + "(-40, sp)" +#else + "-40(sp)" +#endif + ); #endif if (regnr > 1) { fputs("movem.l ", codefile); @@ -150,7 +164,7 @@ f_regsave() /* initialise register-parameters */ for (p = regsav; p < ®sav[regnr]; p++) { if (p->rs_off >= 0) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.%c (%ld,a6),%s\n", #else fprintf(codefile,"move.%c %ld(a6),%s\n", @@ -247,7 +261,7 @@ mes(type) word type ; { && ! gdb_flag #endif ) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fputs("jsr (___u_LiB)\n", codefile); #else fputs("jsr ___u_LiB\n", codefile); diff --git a/mach/m68020/ncg/table b/mach/m68020/ncg/table index 3a0019c68..4de64ee6e 100644 --- a/mach/m68020/ncg/table +++ b/mach/m68020/ncg/table @@ -21,6 +21,10 @@ Something very wrong here! Something very wrong here! #endif +#if TBL68020 +#define SYNTAX_68020 1 +#endif + /* #define FANCY_MODES 1 /* On the M68020, there are some real fancy addressing modes. Their use makes the code a bit shorter, but also much slower. @@ -170,8 +174,8 @@ extend1_4 = {D_REG4 reg;} 4 cost(0,0) reg . #endif extend2 = {D_REG4 reg;} 4 cost(0,0) reg . -#ifndef TBL68020 - /* Part (ii) */ +#ifndef SYNTAX_68020 + /* Part (ii) in m68k2/4 syntax */ absolute4 = {ADDR bd;} 4 cost(4,8) bd . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) @@ -196,16 +200,35 @@ regAcon = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) bd "(" reg "," xreg ".l)" . /* note: in the m68k[24] version %sc always equals 1 */ +#endif -t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . -t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . - -#else /* TBL68020 */ - /* Part (iii) */ +#ifdef SYNTAX_68020 + /* Part (ii) in m68020 syntax */ absolute4 = {ADDR bd;} 4 cost(4,7) "(" bd ")" . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) "(" bd "," reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(4,9) "(" bd "," reg "," xreg ".l*" sc ")" . +absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . +absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . + +LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . +#if WORD_SIZE==2 +/* pointers may go into DLOCAL's */ +DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . +#endif +local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . +regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . +regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) + "(" bd "," reg "," xreg ".l*" sc ")" . +#endif +#ifdef TBL68020 + /* Part (iii) */ abs_index4 = {INT sc; D_REG4 xreg; ADDR bd;} 4 cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off4 = {A_REG reg; INT bd; ADDR od;} 4 cost(6,19) @@ -220,10 +243,6 @@ ABS_indoff4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) ABSIND_off4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index2 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off2 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -238,10 +257,6 @@ ABS_indoff2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index1 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off1 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -256,18 +271,8 @@ ABS_indoff1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . -#if WORD_SIZE==2 -/* pointers may go into DLOCAL's */ -DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . -#endif ILOCAL = {INT bd;} WORD_SIZE cost(4,16) "([" bd ",a6])" . -/* check this out !!! ??? */ -local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . -regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . -regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) - "(" bd "," reg "," xreg ".l*" sc ")" . off_con = {A_REG reg; INT bd; ADDR od;} 4 cost(6,18) "([" bd "," reg "]," od ")". off_regXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd; ADDR od;} 4 cost(6,18) @@ -288,7 +293,10 @@ DREG_pair = {D_REG4 reg1; D_REG4 reg2;} 8 cost(2,0) reg1 ":" reg2 . #define t_regAregXcon regAregXcon #define t_regAcon regAcon -#endif /* TBL68020 */ +#else /* TBL68020 */ +t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . +t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . +#endif #if WORD_SIZE!=2 #define DLOCAL LOCAL diff --git a/mach/m68k2/ncg/mach.c b/mach/m68k2/ncg/mach.c index a7eb6ebf3..6ab31edb1 100644 --- a/mach/m68k2/ncg/mach.c +++ b/mach/m68k2/ncg/mach.c @@ -10,6 +10,11 @@ */ #include + +#if TBL68020 +#define SYNTAX_68020 1 +#endif + #include con_part(sz,w) register sz; word w; { @@ -100,7 +105,7 @@ regreturn() register struct regsav_t *p; if (regnr > 1) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"movem.l (-%ld,a6),", nlocals); #else fprintf(codefile,"movem.l -%ld(a6),", nlocals); @@ -113,7 +118,7 @@ regreturn() putc('\n',codefile); } else if (regnr == 1) { p = regsav; -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.l (-%ld,a6),%s\n",nlocals, p->rs_reg); #else fprintf(codefile,"move.l -%ld(a6),%s\n",nlocals, p->rs_reg); @@ -131,9 +136,18 @@ f_regsave() fprintf(codefile,"link\ta6,#-%ld\n",nlocals); #else if (nlocals > 32768) { - fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\ntst.b -40(sp)\n", nlocals); + fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\n", nlocals); } - else fprintf(codefile,"link\ta6,#-%ld\ntst.b -40(sp)\n",nlocals); + else fprintf(codefile,"link\ta6,#-%ld\n",nlocals); +#endif +#ifndef NOSTACKTEST + fprintf(codefile, "tst.b %s\n", +#ifdef SYNTAX_68020 + "(-40, sp)" +#else + "-40(sp)" +#endif + ); #endif if (regnr > 1) { fputs("movem.l ", codefile); @@ -150,7 +164,7 @@ f_regsave() /* initialise register-parameters */ for (p = regsav; p < ®sav[regnr]; p++) { if (p->rs_off >= 0) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.%c (%ld,a6),%s\n", #else fprintf(codefile,"move.%c %ld(a6),%s\n", @@ -247,7 +261,7 @@ mes(type) word type ; { && ! gdb_flag #endif ) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fputs("jsr (___u_LiB)\n", codefile); #else fputs("jsr ___u_LiB\n", codefile); diff --git a/mach/m68k2/ncg/table b/mach/m68k2/ncg/table index 3a0019c68..4de64ee6e 100644 --- a/mach/m68k2/ncg/table +++ b/mach/m68k2/ncg/table @@ -21,6 +21,10 @@ Something very wrong here! Something very wrong here! #endif +#if TBL68020 +#define SYNTAX_68020 1 +#endif + /* #define FANCY_MODES 1 /* On the M68020, there are some real fancy addressing modes. Their use makes the code a bit shorter, but also much slower. @@ -170,8 +174,8 @@ extend1_4 = {D_REG4 reg;} 4 cost(0,0) reg . #endif extend2 = {D_REG4 reg;} 4 cost(0,0) reg . -#ifndef TBL68020 - /* Part (ii) */ +#ifndef SYNTAX_68020 + /* Part (ii) in m68k2/4 syntax */ absolute4 = {ADDR bd;} 4 cost(4,8) bd . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) @@ -196,16 +200,35 @@ regAcon = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) bd "(" reg "," xreg ".l)" . /* note: in the m68k[24] version %sc always equals 1 */ +#endif -t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . -t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . - -#else /* TBL68020 */ - /* Part (iii) */ +#ifdef SYNTAX_68020 + /* Part (ii) in m68020 syntax */ absolute4 = {ADDR bd;} 4 cost(4,7) "(" bd ")" . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) "(" bd "," reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(4,9) "(" bd "," reg "," xreg ".l*" sc ")" . +absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . +absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . + +LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . +#if WORD_SIZE==2 +/* pointers may go into DLOCAL's */ +DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . +#endif +local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . +regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . +regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) + "(" bd "," reg "," xreg ".l*" sc ")" . +#endif +#ifdef TBL68020 + /* Part (iii) */ abs_index4 = {INT sc; D_REG4 xreg; ADDR bd;} 4 cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off4 = {A_REG reg; INT bd; ADDR od;} 4 cost(6,19) @@ -220,10 +243,6 @@ ABS_indoff4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) ABSIND_off4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index2 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off2 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -238,10 +257,6 @@ ABS_indoff2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index1 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off1 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -256,18 +271,8 @@ ABS_indoff1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . -#if WORD_SIZE==2 -/* pointers may go into DLOCAL's */ -DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . -#endif ILOCAL = {INT bd;} WORD_SIZE cost(4,16) "([" bd ",a6])" . -/* check this out !!! ??? */ -local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . -regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . -regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) - "(" bd "," reg "," xreg ".l*" sc ")" . off_con = {A_REG reg; INT bd; ADDR od;} 4 cost(6,18) "([" bd "," reg "]," od ")". off_regXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd; ADDR od;} 4 cost(6,18) @@ -288,7 +293,10 @@ DREG_pair = {D_REG4 reg1; D_REG4 reg2;} 8 cost(2,0) reg1 ":" reg2 . #define t_regAregXcon regAregXcon #define t_regAcon regAcon -#endif /* TBL68020 */ +#else /* TBL68020 */ +t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . +t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . +#endif #if WORD_SIZE!=2 #define DLOCAL LOCAL diff --git a/mach/m68k4/ncg/mach.c b/mach/m68k4/ncg/mach.c index a7eb6ebf3..6ab31edb1 100644 --- a/mach/m68k4/ncg/mach.c +++ b/mach/m68k4/ncg/mach.c @@ -10,6 +10,11 @@ */ #include + +#if TBL68020 +#define SYNTAX_68020 1 +#endif + #include con_part(sz,w) register sz; word w; { @@ -100,7 +105,7 @@ regreturn() register struct regsav_t *p; if (regnr > 1) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"movem.l (-%ld,a6),", nlocals); #else fprintf(codefile,"movem.l -%ld(a6),", nlocals); @@ -113,7 +118,7 @@ regreturn() putc('\n',codefile); } else if (regnr == 1) { p = regsav; -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.l (-%ld,a6),%s\n",nlocals, p->rs_reg); #else fprintf(codefile,"move.l -%ld(a6),%s\n",nlocals, p->rs_reg); @@ -131,9 +136,18 @@ f_regsave() fprintf(codefile,"link\ta6,#-%ld\n",nlocals); #else if (nlocals > 32768) { - fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\ntst.b -40(sp)\n", nlocals); + fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\n", nlocals); } - else fprintf(codefile,"link\ta6,#-%ld\ntst.b -40(sp)\n",nlocals); + else fprintf(codefile,"link\ta6,#-%ld\n",nlocals); +#endif +#ifndef NOSTACKTEST + fprintf(codefile, "tst.b %s\n", +#ifdef SYNTAX_68020 + "(-40, sp)" +#else + "-40(sp)" +#endif + ); #endif if (regnr > 1) { fputs("movem.l ", codefile); @@ -150,7 +164,7 @@ f_regsave() /* initialise register-parameters */ for (p = regsav; p < ®sav[regnr]; p++) { if (p->rs_off >= 0) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.%c (%ld,a6),%s\n", #else fprintf(codefile,"move.%c %ld(a6),%s\n", @@ -247,7 +261,7 @@ mes(type) word type ; { && ! gdb_flag #endif ) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fputs("jsr (___u_LiB)\n", codefile); #else fputs("jsr ___u_LiB\n", codefile); diff --git a/mach/m68k4/ncg/table b/mach/m68k4/ncg/table index 3a0019c68..4de64ee6e 100644 --- a/mach/m68k4/ncg/table +++ b/mach/m68k4/ncg/table @@ -21,6 +21,10 @@ Something very wrong here! Something very wrong here! #endif +#if TBL68020 +#define SYNTAX_68020 1 +#endif + /* #define FANCY_MODES 1 /* On the M68020, there are some real fancy addressing modes. Their use makes the code a bit shorter, but also much slower. @@ -170,8 +174,8 @@ extend1_4 = {D_REG4 reg;} 4 cost(0,0) reg . #endif extend2 = {D_REG4 reg;} 4 cost(0,0) reg . -#ifndef TBL68020 - /* Part (ii) */ +#ifndef SYNTAX_68020 + /* Part (ii) in m68k2/4 syntax */ absolute4 = {ADDR bd;} 4 cost(4,8) bd . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) @@ -196,16 +200,35 @@ regAcon = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) bd "(" reg "," xreg ".l)" . /* note: in the m68k[24] version %sc always equals 1 */ +#endif -t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . -t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . - -#else /* TBL68020 */ - /* Part (iii) */ +#ifdef SYNTAX_68020 + /* Part (ii) in m68020 syntax */ absolute4 = {ADDR bd;} 4 cost(4,7) "(" bd ")" . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) "(" bd "," reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(4,9) "(" bd "," reg "," xreg ".l*" sc ")" . +absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . +absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . + +LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . +#if WORD_SIZE==2 +/* pointers may go into DLOCAL's */ +DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . +#endif +local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . +regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . +regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) + "(" bd "," reg "," xreg ".l*" sc ")" . +#endif +#ifdef TBL68020 + /* Part (iii) */ abs_index4 = {INT sc; D_REG4 xreg; ADDR bd;} 4 cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off4 = {A_REG reg; INT bd; ADDR od;} 4 cost(6,19) @@ -220,10 +243,6 @@ ABS_indoff4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) ABSIND_off4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index2 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off2 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -238,10 +257,6 @@ ABS_indoff2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index1 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off1 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -256,18 +271,8 @@ ABS_indoff1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . -#if WORD_SIZE==2 -/* pointers may go into DLOCAL's */ -DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . -#endif ILOCAL = {INT bd;} WORD_SIZE cost(4,16) "([" bd ",a6])" . -/* check this out !!! ??? */ -local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . -regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . -regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) - "(" bd "," reg "," xreg ".l*" sc ")" . off_con = {A_REG reg; INT bd; ADDR od;} 4 cost(6,18) "([" bd "," reg "]," od ")". off_regXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd; ADDR od;} 4 cost(6,18) @@ -288,7 +293,10 @@ DREG_pair = {D_REG4 reg1; D_REG4 reg2;} 8 cost(2,0) reg1 ":" reg2 . #define t_regAregXcon regAregXcon #define t_regAcon regAcon -#endif /* TBL68020 */ +#else /* TBL68020 */ +t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . +t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . +#endif #if WORD_SIZE!=2 #define DLOCAL LOCAL diff --git a/mach/moon3/ncg/mach.c b/mach/moon3/ncg/mach.c index a7eb6ebf3..6ab31edb1 100644 --- a/mach/moon3/ncg/mach.c +++ b/mach/moon3/ncg/mach.c @@ -10,6 +10,11 @@ */ #include + +#if TBL68020 +#define SYNTAX_68020 1 +#endif + #include con_part(sz,w) register sz; word w; { @@ -100,7 +105,7 @@ regreturn() register struct regsav_t *p; if (regnr > 1) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"movem.l (-%ld,a6),", nlocals); #else fprintf(codefile,"movem.l -%ld(a6),", nlocals); @@ -113,7 +118,7 @@ regreturn() putc('\n',codefile); } else if (regnr == 1) { p = regsav; -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.l (-%ld,a6),%s\n",nlocals, p->rs_reg); #else fprintf(codefile,"move.l -%ld(a6),%s\n",nlocals, p->rs_reg); @@ -131,9 +136,18 @@ f_regsave() fprintf(codefile,"link\ta6,#-%ld\n",nlocals); #else if (nlocals > 32768) { - fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\ntst.b -40(sp)\n", nlocals); + fprintf(codefile, "move.l a6,-(sp)\nmove.l sp,a6\nsub #%ld,sp\n", nlocals); } - else fprintf(codefile,"link\ta6,#-%ld\ntst.b -40(sp)\n",nlocals); + else fprintf(codefile,"link\ta6,#-%ld\n",nlocals); +#endif +#ifndef NOSTACKTEST + fprintf(codefile, "tst.b %s\n", +#ifdef SYNTAX_68020 + "(-40, sp)" +#else + "-40(sp)" +#endif + ); #endif if (regnr > 1) { fputs("movem.l ", codefile); @@ -150,7 +164,7 @@ f_regsave() /* initialise register-parameters */ for (p = regsav; p < ®sav[regnr]; p++) { if (p->rs_off >= 0) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fprintf(codefile,"move.%c (%ld,a6),%s\n", #else fprintf(codefile,"move.%c %ld(a6),%s\n", @@ -247,7 +261,7 @@ mes(type) word type ; { && ! gdb_flag #endif ) { -#ifdef TBL68020 +#ifdef SYNTAX_68020 fputs("jsr (___u_LiB)\n", codefile); #else fputs("jsr ___u_LiB\n", codefile); diff --git a/mach/moon3/ncg/table b/mach/moon3/ncg/table index 3a0019c68..4de64ee6e 100644 --- a/mach/moon3/ncg/table +++ b/mach/moon3/ncg/table @@ -21,6 +21,10 @@ Something very wrong here! Something very wrong here! #endif +#if TBL68020 +#define SYNTAX_68020 1 +#endif + /* #define FANCY_MODES 1 /* On the M68020, there are some real fancy addressing modes. Their use makes the code a bit shorter, but also much slower. @@ -170,8 +174,8 @@ extend1_4 = {D_REG4 reg;} 4 cost(0,0) reg . #endif extend2 = {D_REG4 reg;} 4 cost(0,0) reg . -#ifndef TBL68020 - /* Part (ii) */ +#ifndef SYNTAX_68020 + /* Part (ii) in m68k2/4 syntax */ absolute4 = {ADDR bd;} 4 cost(4,8) bd . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) @@ -196,16 +200,35 @@ regAcon = {A_REG reg; INT bd;} 4 cost(2,6) bd "(" reg ")" . regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) bd "(" reg "," xreg ".l)" . /* note: in the m68k[24] version %sc always equals 1 */ +#endif -t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . -t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . - -#else /* TBL68020 */ - /* Part (iii) */ +#ifdef SYNTAX_68020 + /* Part (ii) in m68020 syntax */ absolute4 = {ADDR bd;} 4 cost(4,7) "(" bd ")" . offsetted4 = {A_REG reg; INT bd;} 4 cost(2,6) "(" bd "," reg ")" . index_off4 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(4,9) "(" bd "," reg "," xreg ".l*" sc ")" . +absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . +absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . +offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . +index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) + "(" bd "," reg "," xreg ".l*" sc ")" . + +LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . +#if WORD_SIZE==2 +/* pointers may go into DLOCAL's */ +DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . +#endif +local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . +regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . +regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) + "(" bd "," reg "," xreg ".l*" sc ")" . +#endif +#ifdef TBL68020 + /* Part (iii) */ abs_index4 = {INT sc; D_REG4 xreg; ADDR bd;} 4 cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off4 = {A_REG reg; INT bd; ADDR od;} 4 cost(6,19) @@ -220,10 +243,6 @@ ABS_indoff4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) ABSIND_off4 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} 4 cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute2 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted2 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off2 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index2 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off2 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -238,10 +257,6 @@ ABS_indoff2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off2 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -absolute1 = {ADDR bd;} WORD_SIZE cost(4,7) "(" bd ")" . -offsetted1 = {A_REG reg; INT bd;} WORD_SIZE cost(2,6) "(" bd "," reg ")" . -index_off1 = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} WORD_SIZE cost(4,9) - "(" bd "," reg "," xreg ".l*" sc ")" . abs_index1 = {INT sc; D_REG4 xreg; ADDR bd;} WORD_SIZE cost(6,9) "(" bd "," xreg ".l*" sc ")" . OFF_off1 = {A_REG reg; INT bd; ADDR od;} WORD_SIZE cost(6,19) @@ -256,18 +271,8 @@ ABS_indoff1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) ABSIND_off1 = {INT sc; D_REG4 xreg; ADDR bd; ADDR od;} WORD_SIZE cost(8,22) "([" bd "," xreg ".l*" sc "]," od ")" . -LOCAL = {INT bd;} WORD_SIZE cost(2,6) "(" bd ",a6)" . -#if WORD_SIZE==2 -/* pointers may go into DLOCAL's */ -DLOCAL = {INT bd;} 4 cost(2,6) "(" bd ",a6)" . -#endif ILOCAL = {INT bd;} WORD_SIZE cost(4,16) "([" bd ",a6])" . -/* check this out !!! ??? */ -local_addr = {INT bd;} 4 cost(2,3) "(" bd ",a6)" . -regAcon = {A_REG reg; INT bd;} 4 cost(2,3) "(" bd "," reg ")" . -regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,7) - "(" bd "," reg "," xreg ".l*" sc ")" . off_con = {A_REG reg; INT bd; ADDR od;} 4 cost(6,18) "([" bd "," reg "]," od ")". off_regXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd; ADDR od;} 4 cost(6,18) @@ -288,7 +293,10 @@ DREG_pair = {D_REG4 reg1; D_REG4 reg2;} 8 cost(2,0) reg1 ":" reg2 . #define t_regAregXcon regAregXcon #define t_regAcon regAcon -#endif /* TBL68020 */ +#else /* TBL68020 */ +t_regAregXcon = {A_REG reg; D_REG4 xreg; INT sc; INT bd;} 4 cost(2,8) . +t_regAcon = {A_REG reg; INT bd;} 4 cost(2,6) . +#endif #if WORD_SIZE!=2 #define DLOCAL LOCAL