*** empty log message ***
This commit is contained in:
parent
b11d9ce683
commit
1b972eff60
12
mach/6809/as/mach0.c
Normal file
12
mach/6809/as/mach0.c
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#define DUK
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#define RCSID0 "$Header$"
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/*
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* Motorola 6809 options
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*/
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#define BYTES_REVERSED
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#define WORDS_REVERSED
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#define THREE_PASS
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#define LISTING
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#define RELOCATION
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#define NOLD
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40
mach/6809/as/mach1.c
Normal file
40
mach/6809/as/mach1.c
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#define RCSID1 "$Header$"
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/*
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* Motorola 6809 C declarations
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*/
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extern int dpvalue INIT(-1); /* for setdp pseudo-op */
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#ifndef extern
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extern int regbit[];
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#else
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int regbit[] = { /* push-pull coding */
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6, /* D */
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0x10, /* X */
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0x20, /* Y */
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0x40, /* U */
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0x40, /* S */
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0x80, /* PC */
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-1, -1,
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2, /* A */
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4, /* B */
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1, /* CC */
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8, /* DP */
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};
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#endif
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/*
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* Motorola 6809 register names
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*/
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#define D 0
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#define X 1
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#define Y 2
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#define U 3
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#define S 4
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#define PC 5
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#define A 8
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#define B 9
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#define CC 10
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#define DP 11
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19
mach/6809/as/mach2.c
Normal file
19
mach/6809/as/mach2.c
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#define RCSID2 "$Header$"
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/*
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* Motorola 6809 tokens
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*/
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%token <y_word> REG
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%token <y_word> ALL
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%token <y_word> SETDP
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%token <y_word> NOARG
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%token <y_word> BRANCH
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%token <y_word> LBRNCH
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%token <y_word> SBRNCH
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%token <y_word> STACK
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%token <y_word> IMMED
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%token <y_word> TWOREG
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%token <y_word> XOP
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%type <y_word> reglist xyus xmode
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166
mach/6809/as/mach3.c
Normal file
166
mach/6809/as/mach3.c
Normal file
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@ -0,0 +1,166 @@
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#define RCSID3 "$Header$"
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/*
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* Motorola 6809 keywords
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*/
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0, REG, A, "a",
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0, REG, B, "b",
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0, REG, CC, "cc",
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0, REG, DP, "dp",
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0, REG, D, "d",
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0, REG, X, "x",
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0, REG, Y, "y",
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0, REG, U, "u",
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0, REG, S, "s",
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0, REG, PC, "pc",
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0, ALL, 0xFF, "all",
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0, SETDP, 0, "setdp",
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0, NOARG, 0x3A, "abx",
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0, NOARG, 0x19, "daa",
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0, NOARG, 0x3D, "mul",
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0, NOARG, 0x12, "nop",
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0, NOARG, 0x10, "page2",
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0, NOARG, 0x11, "page3",
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0, NOARG, 0x3B, "rti",
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0, NOARG, 0x4F, "clra",
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0, NOARG, 0x5F, "clrb",
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0, NOARG, 0x4A, "deca",
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0, NOARG, 0x5A, "decb",
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0, NOARG, 0x43, "coma",
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0, NOARG, 0x53, "comb",
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0, NOARG, 0x44, "lsra",
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0, NOARG, 0x54, "lsrb",
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0, NOARG, 0x40, "nega",
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0, NOARG, 0x50, "negb",
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0, NOARG, 0x46, "rora",
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0, NOARG, 0x56, "rorb",
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0, NOARG, 0x47, "asra",
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0, NOARG, 0x57, "asrb",
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0, NOARG, 0x49, "rola",
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0, NOARG, 0x59, "rolb",
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0, NOARG, 0x48, "asla",
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0, NOARG, 0x58, "aslb",
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0, NOARG, 0x48, "lsla",
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0, NOARG, 0x58, "lslb",
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0, NOARG, 0x4C, "inca",
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0, NOARG, 0x5C, "incb",
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0, NOARG, 0x4D, "tsta",
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0, NOARG, 0x5D, "tstb",
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0, NOARG, 0x39, "rts",
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0, NOARG, 0x1D, "sex",
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0, NOARG, 0x3F, "swi",
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0, NOARG, 0x103F, "swi2",
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0, NOARG, 0x113F, "swi3",
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0, NOARG, 0x13, "sync",
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0, BRANCH, 0x20, "bra",
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0, BRANCH, 0x21, "brn",
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0, BRANCH, 0x22, "bhi",
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0, BRANCH, 0x23, "bls",
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0, BRANCH, 0x24, "bhs",
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0, BRANCH, 0x24, "bcc",
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0, BRANCH, 0x25, "blo",
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0, BRANCH, 0x25, "bcs",
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0, BRANCH, 0x26, "bne",
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0, BRANCH, 0x27, "beq",
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0, BRANCH, 0x28, "bvc",
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0, BRANCH, 0x29, "bvs",
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0, BRANCH, 0x2A, "bpl",
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0, BRANCH, 0x2B, "bmi",
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0, BRANCH, 0x2C, "bge",
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0, BRANCH, 0x2D, "blt",
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0, BRANCH, 0x2E, "bgt",
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0, BRANCH, 0x2F, "ble",
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0, BRANCH, 0x8D, "bsr",
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0, STACK, 0x34, "pshs",
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0, STACK, 0x35, "puls",
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0, STACK, 0x36, "pshu",
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0, STACK, 0x37, "pulu",
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0, IMMED, 0x1A, "orcc",
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0, IMMED, 0x1C, "andcc",
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0, IMMED, 0x3C, "cwai",
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0, TWOREG, 0x1E, "exg",
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0, TWOREG, 0x1F, "tfr",
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0, XOP, 0xA0, "suba",
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0, XOP, 0xA1, "cmpa",
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0, XOP, 0xA2, "sbca",
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0, XOP, 0xA4, "anda",
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0, XOP, 0xA5, "bita",
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0, XOP, 0xA6, "lda",
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0, XOP, 0xA8, "eora",
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0, XOP, 0xA9, "adca",
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0, XOP, 0xAA, "ora",
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0, XOP, 0xAB, "adda",
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0, XOP, 0xE0, "subb",
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0, XOP, 0xE1, "cmpb",
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0, XOP, 0xE2, "sbcb",
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0, XOP, 0xE4, "andb",
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0, XOP, 0xE5, "bitb",
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0, XOP, 0xE6, "ldb",
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0, XOP, 0xE8, "eorb",
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0, XOP, 0xE9, "adcb",
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0, XOP, 0xEA, "orb",
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0, XOP, 0xEB, "addb",
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0, XOP, 0x30, "leax",
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0, XOP, 0x31, "leay",
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0, XOP, 0x32, "leas",
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0, XOP, 0x33, "leau",
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0, XOP, 0x60, "neg",
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0, XOP, 0x63, "com",
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0, XOP, 0x64, "lsr",
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0, XOP, 0x66, "ror",
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0, XOP, 0x67, "asr",
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0, XOP, 0x68, "asl",
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0, XOP, 0x68, "lsl",
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0, XOP, 0x69, "rol",
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0, XOP, 0x6A, "dec",
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0, XOP, 0x6C, "inc",
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0, XOP, 0x6D, "tst",
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0, XOP, 0x6F, "clr",
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0, XOP, 0x6E, "jmp",
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0, XOP, 0xA3, "subd",
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0, XOP, 0x10A3, "cmpd",
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0, XOP, 0x11A3, "cmpu",
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0, XOP, 0xAC, "cmpx",
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0, XOP, 0x10AC, "cmpy",
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0, XOP, 0x11AC, "cmps",
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0, XOP, 0xAE, "ldx",
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0, XOP, 0x10AE, "ldy",
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0, XOP, 0xE3, "addd",
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0, XOP, 0xEC, "ldd",
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0, XOP, 0xEE, "ldu",
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0, XOP, 0x10EE, "lds",
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0, XOP, 0xA7, "sta",
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0, XOP, 0xAD, "jsr",
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0, XOP, 0xAF, "stx",
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0, XOP, 0x10AF, "sty",
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0, XOP, 0xE7, "stb",
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0, XOP, 0xED, "std",
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0, XOP, 0xEF, "stu",
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0, XOP, 0x10EF, "sts",
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0, LBRNCH, 0x21, "lbrn",
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0, LBRNCH, 0x22, "lbhi",
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0, LBRNCH, 0x23, "lbls",
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0, LBRNCH, 0x24, "lbhs",
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0, LBRNCH, 0x24, "lbcc",
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0, LBRNCH, 0x25, "lblo",
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0, LBRNCH, 0x25, "lbcs",
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0, LBRNCH, 0x26, "lbne",
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0, LBRNCH, 0x27, "lbeq",
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0, LBRNCH, 0x28, "lbvc",
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0, LBRNCH, 0x29, "lbvs",
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0, LBRNCH, 0x2A, "lbpl",
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0, LBRNCH, 0x2B, "lbmi",
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0, LBRNCH, 0x2C, "lbge",
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0, LBRNCH, 0x2D, "lblt",
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0, LBRNCH, 0x2E, "lbgt",
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0, LBRNCH, 0x2F, "lble",
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0, SBRNCH, 0x16, "lbra",
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0, SBRNCH, 0x17, "lbsr",
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0, NOARG, 0x1CFE, "clc",
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0, NOARG, 0x1A01, "sec",
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0, NOARG, 0x1CEF, "cli",
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0, NOARG, 0x1A10, "sei",
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0, NOARG, 0x1CFD, "clv",
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0, NOARG, 0x1A02, "sev",
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0, NOARG, 0x3CFF, "wai",
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204
mach/6809/as/mach4.c
Normal file
204
mach/6809/as/mach4.c
Normal file
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@ -0,0 +1,204 @@
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#define RCSID4 "$Header$"
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/*
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* (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
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*
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* This product is part of the Amsterdam Compiler Kit.
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*
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* Permission to use, sell, duplicate or disclose this software must be
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* obtained in writing. Requests for such permissions may be sent to
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*
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* Dr. Andrew S. Tanenbaum
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* Wiskundig Seminarium
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* Vrije Universiteit
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* Postbox 7161
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* 1007 MC Amsterdam
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* The Netherlands
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*
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||||
*/
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/*
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* Motorola 6809 parsing rules
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*/
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operation
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: SETDP expr
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{ dpvalue = $2.val;}
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|
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NOARG
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{ emit1or2($1);}
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|
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BRANCH expr
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{ branch($1,$2);}
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|
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LBRNCH expr
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{ emit1(0x10); emit1($1);
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$2.val -= (DOTVAL+2);
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#ifdef RELOCATION
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newrelo($2.typ, RELPC|RELO2|RELBR);
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#endif
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emit2($2.val);
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}
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|
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SBRNCH expr
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{ emit1($1);
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$2.val -= (DOTVAL+2);
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#ifdef RELOCATION
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newrelo($2.typ, RELPC|RELO2|RELBR);
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#endif
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emit2($2.val);
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}
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|
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IMMED '#' expr
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{ emit1($1);
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#ifdef RELOCATION
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newrelo($3.typ, RELO1);
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#endif
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emit1($3.val);
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}
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|
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XOP '#' expr
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{ emit1or2($1 - 0x20);
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switch ($1 & 0x0F) {
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case 0x03:
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case 0x0C:
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case 0x0E:
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#ifdef RELOCATION
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newrelo($3.typ, RELO2|RELBR);
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#endif
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emit2($3.val);
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break;
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default:
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#ifdef RELOCATION
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newrelo($3.typ, RELO1);
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#endif
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emit1($3.val);
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break;
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}
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}
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|
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XOP '<' expr
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{ if (0 <= $1 && $1 < 0x80)
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emit1(($1-0x10) & 0x3F);
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else
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emit1or2($1 - 0x10);
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#ifdef RELOCATION
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newrelo($3.typ, RELO1);
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#endif
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emit1($3.val);
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}
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|
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XOP '>' expr
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{ emit1or2($1 + 0x10);
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#ifdef RELOCATION
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newrelo($3.typ, RELO2|RELBR);
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#endif
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emit2($3.val);
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}
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|
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STACK reglist
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{ emit1($1); emit1($2);}
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|
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TWOREG REG ',' REG
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{
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emit1($1);
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emit1($2 << 4 | $4);
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}
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||||
|
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XOP REG
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{ switch ($2) {
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case A: emit1($1 - 0x20);
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||||
break;
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||||
case B: emit1($1 - 0x10);
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||||
break;
|
||||
default:serror("register error");
|
||||
}
|
||||
}
|
||||
|
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||||
XOP expr ',' REG
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||||
{ emit1or2($1);
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||||
offset($4,$2,0);
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||||
}
|
||||
|
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||||
XOP '(' expr ',' REG ')'
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||||
{ emit1or2($1);
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||||
offset($5,$3,0x10);
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||||
}
|
||||
|
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||||
XOP '(' expr ')'
|
||||
{ emit1or2($1);
|
||||
emit1(0x9F);
|
||||
#ifdef RELOCATION
|
||||
newrelo($3.typ, RELO1);
|
||||
#endif
|
||||
emit1($3.val);
|
||||
}
|
||||
|
|
||||
XOP xmode
|
||||
{ emit1or2($1);
|
||||
emit1($2);
|
||||
}
|
||||
|
|
||||
XOP '(' xmode ')'
|
||||
{ if (($3 & 0x8D) == 0x80)
|
||||
serror("invalid index mode");
|
||||
emit1or2($1);
|
||||
emit1($3 + 0x10);
|
||||
}
|
||||
|
|
||||
XOP expr
|
||||
{ if (($2.typ & S_TYP) == S_ABS &&
|
||||
((unsigned)$2.val >> 8) == dpvalue
|
||||
) {
|
||||
if (0 <= $1 && $1 < 0x80)
|
||||
emit1(($1-0x20) & 0x3F);
|
||||
else
|
||||
emit1or2($1 - 0x10);
|
||||
emit1($2.val);
|
||||
} else {
|
||||
emit1or2($1 + 0x10);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2|RELBR);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
}
|
||||
;
|
||||
reglist : ALL
|
||||
| REG
|
||||
{ if (($$ = regbit[$1]) < 0) serror("register error");}
|
||||
|
|
||||
reglist ',' REG
|
||||
{ register i;
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||||
if ((i = regbit[$3]) < 0 || ($1 & i) != 0)
|
||||
serror("register error");
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||||
$$ = $1 | i;
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||||
}
|
||||
;
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||||
xyus : REG
|
||||
{ if (($$ = regno($1)) < 0) serror("register error");}
|
||||
;
|
||||
xmode : ',' xyus '+' '+'
|
||||
{ $$ = 0x81 + $2;}
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||||
|
|
||||
',' xyus '+'
|
||||
{ $$ = 0x80 + $2;}
|
||||
|
|
||||
',' xyus
|
||||
{ $$ = 0x84 + $2;}
|
||||
|
|
||||
',' '-' '-' xyus
|
||||
{ $$ = 0x83 + $4;}
|
||||
|
|
||||
',' '-' xyus
|
||||
{ $$ = 0x82 + $3;}
|
||||
|
|
||||
REG ',' xyus
|
||||
{ switch($1) {
|
||||
case A: $$ = 0x86 + $3; break;
|
||||
case B: $$ = 0x85 + $3; break;
|
||||
case D: $$ = 0x8B + $3; break;
|
||||
default: serror("register error");
|
||||
}
|
||||
}
|
||||
;
|
99
mach/6809/as/mach5.c
Normal file
99
mach/6809/as/mach5.c
Normal file
|
@ -0,0 +1,99 @@
|
|||
#define RCSID5 "$Header$"
|
||||
|
||||
/*
|
||||
* Motorola 6809 special routines
|
||||
*/
|
||||
|
||||
branch(opc, exp)
|
||||
register int opc;
|
||||
expr_t exp;
|
||||
{
|
||||
register int sm, dist;
|
||||
int saving;
|
||||
|
||||
dist = exp.val - (DOTVAL + 2);
|
||||
if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
|
||||
dist -= DOTGAIN;
|
||||
sm = fitb(dist);
|
||||
if ((exp.typ & ~S_DOT) != DOTTYP)
|
||||
sm = 0;
|
||||
if (opc == 0x8D || opc == 0x20)
|
||||
saving = 1;
|
||||
else
|
||||
saving = 2;
|
||||
if ((sm = small(sm,saving)) == 0) {
|
||||
dist--;
|
||||
if (opc == 0x8D) /* bsr */
|
||||
opc = 0x17;
|
||||
else if (opc == 0x20) /* bra */
|
||||
opc = 0x16;
|
||||
else {
|
||||
emit1(0x10);
|
||||
dist--;
|
||||
}
|
||||
}
|
||||
emit1(opc);
|
||||
if (sm == 0) {
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELPC|RELO2|RELBR);
|
||||
#endif
|
||||
emit2(dist);
|
||||
} else
|
||||
emit1(lowb(dist));
|
||||
}
|
||||
|
||||
regno(r) register r; {
|
||||
switch (r) {
|
||||
case X: return 0;
|
||||
case Y: return 0x20;
|
||||
case U: return 0x40;
|
||||
case S: return 0x60;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
emit1or2(n) {
|
||||
if (n & ~0xFF)
|
||||
emit1(n >> 8);
|
||||
emit1(n);
|
||||
}
|
||||
|
||||
offset(reg, exp, ind)
|
||||
register int reg, ind;
|
||||
expr_t exp;
|
||||
{
|
||||
if (reg == PC) {
|
||||
int sm, dist;
|
||||
|
||||
dist = exp.val - (DOTVAL + 2);
|
||||
if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
|
||||
dist -= DOTGAIN;
|
||||
sm = fitb(dist);
|
||||
if ((exp.typ & S_TYP) != DOTTYP)
|
||||
sm = 0;
|
||||
if (small(sm,0)) {
|
||||
emit1(0x8C + ind);
|
||||
emit1(dist);
|
||||
} else {
|
||||
emit1(0x8D + ind);
|
||||
emit1(dist - 1);
|
||||
}
|
||||
} else if ((reg = regno(reg)) < 0)
|
||||
serror("register error");
|
||||
else if ((exp.typ & S_TYP) == S_ABS && exp.val == 0)
|
||||
emit1(0x84 + reg + ind); /* XOP 0, REG == XOP , REG */
|
||||
else if (ind == 0 && (exp.typ & S_TYP) == S_ABS &&
|
||||
-16 <= exp.val && exp.val <= 15
|
||||
)
|
||||
emit1(reg + ind + (exp.val & 037));
|
||||
else if ((exp.typ&S_TYP)==S_ABS && -256<=exp.val && exp.val<=255) {
|
||||
emit1(0x88 + reg + ind);
|
||||
emit1(exp.val);
|
||||
} else {
|
||||
emit1(0x89 + reg + ind);
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELO2|RELBR);
|
||||
#endif
|
||||
emit2(exp.val);
|
||||
}
|
||||
}
|
Loading…
Reference in a new issue