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Add a few more error checks and adjustments to reglap.

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In util/ncgg, add two more errors for tables using reglap:
 - "Two sizes of reg_float can't be same size"
 - "Missing reg_float of size %d to contain %s"

In mach/proto/ncg, rename macro isregvar_size() to PICK_REGVAR(), so
the macro doesn't look like a function.  This macro sometimes doesn't
evaluate its second argument.

In mach/powerpc/ncg/mach.c, change type of lfs_set to uint32_t, and
change the left shifts from 1U<<regno to (uint32_t)1<<regno, because
1U would be too small for machines with 16-bit int.
This commit is contained in:
George Koehler 2017-10-18 22:00:12 -04:00
parent 73ad5a227d
commit 2a92f9bf4d
6 changed files with 38 additions and 13 deletions
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7
mach/powerpc/ncg/mach.c
View file

@ -9,6 +9,7 @@
*/
#include <limits.h>
#include <stdint.h>
static long framesize;
@ -106,7 +107,7 @@ char *segname[] = {
static long savedf[32];
static long savedi[32];
static int savedtop;
static unsigned long lfs_set;
static uint32_t lfs_set;
/* Calculate the register score of a local variable. */
int
@ -172,7 +173,7 @@ regsave(const char* regname, long offset, int size)
savedf[regnum] = offset;
framesize += 8;
if (size == 4)
lfs_set |= (1U << regnum);
lfs_set |= ((uint32_t)1<<regnum);
break;
case 'r':
savedi[regnum] = offset;
@ -236,7 +237,7 @@ f_regsave(void)
for (reg = 31; reg >= 0; reg--)
if (savedf[reg] >= 0)
fprintf(codefile, "%s f%d, %ld(fp)\n",
(lfs_set & (1U << reg)) ? "lfs" : "lfd",
(lfs_set & ((uint32_t)1<<reg)) ? "lfs" : "lfd",
reg, savedf[reg]);
for (reg = 31; reg >= 0; reg--)

2
mach/proto/ncg/compute.c
View file

@ -385,7 +385,7 @@ compute(node, presult) register node_p node; register result_t *presult; {
return;
case EX_REGVAR:
assert(leaf1.e_typ == EV_INT);
i = isregvar_size((long) leaf1.e_v.e_con, node->ex_rnode);
i = PICK_REGVAR((long) leaf1.e_v.e_con, node->ex_rnode);
if (i<=0) {
presult->e_typ = EV_UNDEF;
return;

8
mach/proto/ncg/regvar.h
View file

@ -28,8 +28,12 @@ void fixregvars(int);
int isregvar(long);
#ifdef REGLAP
int isregvar_size(long, int);
#else
#define isregvar_size(off, size) isregvar(off)
#endif
int isregtyp(long);
void unlinkregs(void);
#ifdef REGLAP
#define PICK_REGVAR(off, size) isregvar_size(off, size)
#else
#define PICK_REGVAR(off, size) isregvar(off)
#endif

8
mach/proto/ncg/subr.c
View file

@ -121,8 +121,8 @@ instance(instno,token) register token_p token; {
case IN_D_DESCR:
compute(&enodes[inp->in_info[1]], &result);
assert(result.e_typ==EV_INT);
regno = isregvar_size(result.e_v.e_con,
tokens[inp->in_info[0]].t_size);
regno = PICK_REGVAR(result.e_v.e_con,
tokens[inp->in_info[0]].t_size);
if (regno > 0) {
token->t_token = -1;
token->t_att[0].ar = regno;
@ -211,8 +211,8 @@ cinstance(instno,token,tp,regno) register token_p token,tp; {
compute(&enodes[inp->in_info[1]], &result);
curtoken = ct;
assert(result.e_typ==EV_INT);
regno = isregvar_size(result.e_v.e_con,
tokens[inp->in_info[0]].t_size);
regno = PICK_REGVAR(result.e_v.e_con,
tokens[inp->in_info[0]].t_size);
if (regno > 0) {
token->t_token = -1;
token->t_att[0].ar = regno;

3
util/ncgg/cgg.y
View file

@ -130,8 +130,9 @@ machtable
: constants
properties
registers
{ check_reglap(); }
tokens
{ make_std_sets(); }
{ make_std_sets(); }
sets
instructions
moves

23
util/ncgg/subr.c
View file

@ -254,9 +254,11 @@ add_regvar(int rvnum, reginfo *regp, int rv)
wrong = 0;
if (overlap) {
/* reglap = size of overlap float */
if (reglap==0)
if (reglap==0) {
reglap = regp->ri_size;
else if (reglap!=regp->ri_size)
if (reglap == rvsize[reg_float])
error("Two sizes of reg_float can't be same size");
} else if (reglap!=regp->ri_size)
wrong = 1;
} else {
if (nregvar[rv]==0)
@ -322,6 +324,23 @@ regline(rl,pl,rv) varinfo *rl,*pl; {
regclass++;
}
void
check_reglap() {
reginfo *regp;
int i;
if (reglap == 0)
return;
/* reglap: Check that every reg_float has size == reglap. */
for (i = 0; i < nregvar[reg_float]; i++) {
regp = &l_regs[rvnumbers[reg_float][i]];
if (regp->ri_size != reglap)
error("Missing reg_float of size %d to contain %s",
reglap, regp->ri_name);
}
}
setallreg(vi) struct varinfo *vi; {
nallreg=0;