fixes from Nigel Hall
This commit is contained in:
ceriel
parent
41007486bf
commit
304f03a836
2 changed files with 197 additions and 156 deletions
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@ -9,8 +9,9 @@
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#define newilb(x) fprintf(codefile,"%s:\n",x)
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#define newdlb(x) fprintf(codefile,"%s:\n",x)
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#define newplb(x) fprintf(codefile,".align 2\n%s:\n",x)
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#define dlbdlb(x,y) fprintf(codefile,"%s = %s\n",x,y)
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#define newlbss(l,x) fprintf(codefile,"%s:.space\t%ld\n",l,x);
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#define newlbss(l,x) fprintf(codefile,".comm\t%s,%ld\n",l,x)
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#define cst_fmt "%ld"
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#define off_fmt "%ld"
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@ -2,13 +2,28 @@ rcsid = "$Header$"
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/*****************************************************************
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* *
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* N S 1 6 0 3 2 B A C K - E N D T A B L E *
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* N S 1 6 0 3 2 B A C K - E N D T A B L E *
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* *
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* *
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* Author: Annita Wilschut. *
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* *
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* Corrections: Nigel Hall *
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* *
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*****************************************************************/
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/* The handling of arrays was not complete. Tables extended
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* in order to handle access to other lexical levels between
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* local and global. Corrections to ordering of tokens made.
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*
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* The token length was added to cope with the length field
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* of MOVMi instructions. The lengths adjusted by division by 4.
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*
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* The compare procedures did not return a result. Caused
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* an extra word to be popped off the stack. The "cmi txx ior" &
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* "txx and" sequences needed their branch criterion inverting.
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*
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*/
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/*
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* Deze tabel implementeert, naast gewone, ook floating point
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* instructies. Bij gebrek aan een floating point processor
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@ -16,7 +31,7 @@ rcsid = "$Header$"
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* getest. Wanneer NOFLOAT "aan" is worden er zeker geen
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* floating point instructies gegenereerd. Na verwijdering van
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* alle ifdef's worden er bij de vertaling van een programma dat
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* geen floating point gebruikt, hoogst waarschhijnlijk ook
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* geen floating point gebruikt, hoogst waarschijnlijk ook
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* geen floating point instructies gegenereerd. Dit is echter niet
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* uitgebreid getest.
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*/
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@ -38,6 +53,7 @@ PROGRAMCOUNTER
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STACKPOINTER
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STATICBASE
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LOCALBASE
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PROCREG /* processor register - used by LPRi & SPRi */
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REGISTERS
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@ -50,10 +66,10 @@ f23("f2")=f2+f3,
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f45("f4")=f4+f5,
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f67("f6")=f6+f7 : DFREG.
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r01("r0")=r0+r1,r23("r2")=r2+r3 : REGPAIR.
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sp : STACKPOINTER, MEMREG.
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sp : STACKPOINTER, MEMREG, PROCREG.
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pc : PROGRAMCOUNTER.
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fp : LOCALBASE, MEMREG.
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sb : STATICBASE, MEMREG.
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fp : LOCALBASE, MEMREG, PROCREG.
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sb : STATICBASE, MEMREG, PROCREG.
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TOKENS
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@ -94,6 +110,8 @@ memregrelcon4 = { MEMREG reg; ADDR disp1; ADDR disp2;} 4 .
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label = {ADDR disp; } 4 disp .
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regrelsid = {INT ind; REG reg1; REG reg2; } 4 ind "(" reg1
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")[" reg2 ":d]" .
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memregrelsid = {INT ind; MEMREG reg1; REG reg2; } 4 ind "(" reg1
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")[" reg2 ":d]" .
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abssid = {ADDR disp; REG reg; } 4 "@" disp "[" reg ":d]" .
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@ -107,33 +125,33 @@ SETS
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src1 = regrel1 + memregrel1 + memrel1 + absolute1 .
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src2 = regrel2 + memregrel2 + memrel2 + absolute2 .
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src4 = REG + const4 + LOCAL + regrel4 + memrel4 +
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memregrel4 + memregrelsid + abssid + absolute4 +
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memregrel4 + regrelsid + memregrelsid + abssid + absolute4 +
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addr_external.
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con4 = regcon4 + memregcon4 + memregrelcon4 .
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tossrc4 = TOS + src4 .
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consrc4 = con4 + src4 .
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fsrc4 = FREG + LOCAL + regrel4 + memrel4 +
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memregrel4 + memregrelsid + abssid + absolute4 .
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memregrel4 + memregrelsid + abssid + absolute4 .
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tosfsrc4 = TOS + fsrc4 .
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fsrc8 = DFREG + DLOCAL + regrel8 + memrel8 +
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memregrel8 + absolute8 .
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memregrel8 + absolute8 .
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tosfsrc8 = TOS + fsrc8 .
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dst1 = src1 .
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tosdst1 = TOS + dst1 .
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dst2 = src2 .
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tosdst2 = TOS + dst2 .
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dst4 = REG + LOCAL + regrel4 + memregrel4 + memrel4 +
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absolute4 + memregrelsid + abssid .
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absolute4 + regrelsid + memregrelsid + abssid .
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tosdst4 = TOS + dst4 .
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fdst4 = FREG + LOCAL + regrel4 + memregrel4 + memrel4 +
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absolute4 + memregrelsid + abssid .
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absolute4 + regrelsid + memregrelsid + abssid .
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tosfdst4 = TOS + fdst4 .
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fdst8 = fsrc8 .
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tosfdst8 = tosfsrc8 .
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regrel = regrel1 + regrel2 + regrel4 +regrel8 .
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memregrel = memregrel1 + memregrel2 + memregrel4 +memregrel8 .
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memrel = memrel1 + memrel2 + memrel4 +memrel8 .
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rel = regrel + memregrel + memrel + memregrelsid
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rel = regrel + memregrel + memrel + regrelsid + memregrelsid
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+ fprelsid + sprelsid .
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absolute = absolute1 + absolute2 + absolute4 + absolute8 + abssid .
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regs = REG + FREG + DFREG + MEMREG + REGPAIR .
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@ -213,7 +231,7 @@ sfsd tosdst4:wo .
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tbitd tossrc4:ro, tosdst4:ro .
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cbitd tossrc4:ro, tosdst4:rw .
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sbitd tossrc4:ro, tosdst4:rw .
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movmd tosdst4:ro, tosdst4:rw, const4 .
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movmd tossrc4:ro, tosdst4:rw, const4 .
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indexd REG, tossrc4:ro, tossrc4:ro .
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brxx label .
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beq label .
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@ -234,7 +252,8 @@ jsr tosdst4+label .
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ret const4:ro .
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adjspd tossrc4:ro .
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exit label .
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sprd MEMREG:rw, tossrc4:ro .
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lprd PROCREG:rw, tossrc4:ro .
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sprd PROCREG:ro, tossrc4:rw .
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@ -367,7 +386,7 @@ uses REG
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gen addr {memregrel4, %1.reg, %1.disp}, %a
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yields %a
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from LOCAL yields {memregrel4, fp, %1.ind}
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from LOCAL yields {memregrel4, fp, %1.ind}
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from addr_local
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uses REG
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@ -385,7 +404,7 @@ gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, %a
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yields %a
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from memregrel4 yields {memregrelcon4, %1.reg,
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%1.disp, 0}
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%1.disp, 0}
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from src1
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uses REG
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@ -407,7 +426,7 @@ from memrel8 yields {memrel4, %1.reg,
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%1.disp1, %1.disp1}
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from regrel8 yields {regrel4, %1.reg, %1.disp+4}
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{regrel4, %1.reg, %1.disp}
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{regrel4, %1.reg, %1.disp}
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from memregrel8 yields {memregrel4, %1.reg, %1.disp+4}
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{memregrel4, %1.reg, %1.disp}
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@ -415,7 +434,7 @@ from memregrel8 yields {memregrel4, %1.reg, %1.disp+4}
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PATTERNS
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/**********************************************************************
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* Group1 : load instructions *
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* Group1 : load instructions *
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**********************************************************************/
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pat loc yields {const4, $1}
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@ -493,7 +512,7 @@ pat lal yields {addr_local, $1}
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pat lae yields {addr_external, $1}
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pat loi $1==1
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pat loi $1==1
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with exact MEMREG yields {memregrel1, %1, 0}
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with REG yields {regrel1, %1, 0}
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with exact memregcon4 yields {memregrel1, %1.reg, %1.disp}
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@ -539,10 +558,10 @@ pat loi defined($1)
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with REG STACK
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uses REG = {const4, $1}
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gen addd %a, %1
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1:
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subd {const4, 4}, %1
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movd {regrel4, %1, 0}, {TOS}
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acbd {const4, 0-4}, %a, {label, "1b"}
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1:
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subd {const4, 4}, %1
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movd {regrel4, %1, 0}, {TOS}
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acbd {const4, 0-4}, %a, {label, "1b"}
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pat los $1==4
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kills ALL
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@ -795,7 +814,7 @@ with exact addr_external consrc4 consrc4
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with regcon4 consrc4 consrc4
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kills allmincon
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gen move %2, {regrel4, %1.reg, %1.disp+$1}
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move %3, {regrel4, %1.reg, %1.disp+$1+4}
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move %3, {regrel4, %1.reg, %1.disp+$1+4}
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#ifndef NOFLOAT
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with exact addr_local DFREG
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kills allmincon
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@ -841,7 +860,7 @@ gen addd %1, {absolute4, $1}
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pat adi $1 == 4
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with exact MEMREG const4 yields {memregcon4, %1, %2.num}
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with exact REG const4 yields {regcon4, %1, %2.num}
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with exact const4 REG yields {regcon4, %2, %1.num}
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with exact const4 REG yields {regcon4, %2, %1.num}
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with exact memregrel4 const4 yields {memregrelcon4, %1.reg,
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%1.disp, %2.num}
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with exact memregcon4 const4 yields {memregcon4, %1.reg,
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@ -853,7 +872,7 @@ with exact memregrelcon4 const4 yields {memregrelcon4, %1.reg,
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with exact addr_local const4 yields {addr_local, %1.ind+%2.num}
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with exact LOCAL const4 yields {memregrelcon4, fp,
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%1.ind, %2.num}
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with exact const4 LOCAL yields {memregrelcon4, fp,
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with exact const4 LOCAL yields {memregrelcon4, fp,
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%2.ind, %1.num}
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with exact const4 addr_local yields {addr_local, %2.ind+%1.num}
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with exact MEMREG addr_external yields {memregcon4, %1, %2.disp}
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@ -1004,7 +1023,7 @@ pat mlu $1 == 4
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with src4 src4
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uses reusing %1, REGPAIR
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gen move %1, %a.1
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meid %2, %a yields %a.1
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meid %2, %a yields %a.1
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pat dvu $1 == 4
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kills ALL
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@ -1023,7 +1042,7 @@ with REG
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pat sru $1 == 4
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with REG REG
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gen negd %1, %1
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lshd %1, %2 yields %2
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lshd %1, %2 yields %2
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/*****************************************************************
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@ -1191,7 +1210,7 @@ pat ads $1==4 leaving adi 4
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pat sbs $1==4 leaving sbi 4
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/*****************************************************************
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* Group7 : increment/decrement/zero *
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* Group7 : increment/decrement/zero *
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*****************************************************************/
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pat inc
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@ -1269,7 +1288,7 @@ pat zer $1==8 yields {const4, 0}
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{const4, 0}
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pat zer $1==12 yields {const4, 0}
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{const4, 0}
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{const4, 0}
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{const4, 0}
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pat zer $1>12
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@ -1280,7 +1299,7 @@ with STACK
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acbd {const4, 0-1}, %a, {label, "1b"}
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/*****************************************************************
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* Group8 : convert *
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* Group8 : convert *
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*****************************************************************/
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pat loc loc cii $1==4 && $2==4
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@ -1371,7 +1390,7 @@ pat cfu
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leaving loc 18 trp
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/*****************************************************************
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* Group9 : logical *
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* Group9 : logical *
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*****************************************************************/
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pat loe loc and ste $3==4 && $1==$4
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@ -1410,7 +1429,7 @@ with REG src4
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pat and $1>4
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with STACK
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gen move {const4, $1}, r0
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addr {memregrel4, sp, $1}, r1
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addr {memregrel4, sp, $1}, r1
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1:
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andd {TOS}, {regrel4, r1, 0}
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addr {regrel4, r1, 4}, r1
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@ -1481,7 +1500,7 @@ with REG src4
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pat ior $1>4
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with STACK
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gen move {const4, $1}, r0
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addr {memregrel4, sp, $1}, r1
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addr {memregrel4, sp, $1}, r1
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1:
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ord {TOS}, {regrel4, r1, 0}
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addr {regrel4, r1, 4}, r1
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@ -1506,7 +1525,7 @@ with REG src4
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pat xor $1>4
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with STACK
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gen move {const4, $1}, r0
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addr {memregrel4, sp, $1}, r1
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addr {memregrel4, sp, $1}, r1
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1:
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xord {TOS}, {regrel4, r1, 0}
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addr {regrel4, r1, 4}, r1
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@ -1558,7 +1577,7 @@ with REG REG
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rotd %1, %2 yields %2
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/*****************************************************************
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* Group10 : sets *
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* Group10 : sets *
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*****************************************************************/
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pat inn zeq $1==4
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@ -1579,9 +1598,9 @@ with src4 REG
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pat inn $1==4
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with src4 REG
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uses REG
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gen tbitd %1, %2
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gen tbitd %1, %2
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sfsd %a
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cmpd {const4,0}, %1
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cmpd {const4,0}, %1
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ble {label, "1f"}
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xord %a, %a
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1: yields %a
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@ -1591,8 +1610,8 @@ with src4 STACK
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uses REG
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gen tbitd %1, {TOS}
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adjspd {const4, 0-4}
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sfsd %a
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cmpd {const4,0}, %1
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sfsd %a
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cmpd {const4,0}, %1
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ble {label, "1f"}
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xord %a, %a
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1: yields %a
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@ -1602,11 +1621,11 @@ with src4 src4 STACK
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uses REG
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gen tbitd %2, {TOS}
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adjspd {const4, 0-4}
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sfsd %a
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cmpd {const4,0}, %2
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sfsd %a
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cmpd {const4,0}, %2
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ble {label, "1f"}
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xord %a, %a
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1: yields %a
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1: yields %a
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pat set $1==4
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with src4
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@ -1631,7 +1650,7 @@ with src4 src4 STACK
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sbitd %2, {TOS}
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/*****************************************************************
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* Group11 : array *
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* Group11 : array *
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*****************************************************************/
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pat lae aar $2==2 && rom($1,3)==1 && rom($1,1)==0
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@ -1652,6 +1671,10 @@ with REG
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leaving adi 2
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pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)==0
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with REG REG
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uses REG
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gen addr {regrelsid, 0, %2, %1}, %a
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yields %a
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with REG addr_local
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uses REG
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gen addr {memregrelsid, %2.ind, fp, %1}, %a
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@ -1663,70 +1686,85 @@ uses REG
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with leaving lae $1 aar $2
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pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)!=0
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with REG REG
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uses REG
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gen subd {const4, rom($1,1)}, %1
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addr {regrelsid, 0, %2, %1}, %a
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yields %a
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with REG addr_local
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uses REG
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gen subd {const4, rom($1,1)}, %1
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addr {memregrelsid, %2.ind, fp, %1}, %a
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addr {memregrelsid, %2.ind, fp, %1}, %a
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yields %a
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with REG addr_external
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uses REG
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gen subd {const4, rom($1,1)}, %1
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addr {abssid, %2.disp, %1}, %a
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addr {abssid, %2.disp, %1}, %a
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yields %a
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with leaving lae $1 aar $2
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with leaving lae $1 aar $2
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pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)==0
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with REG addr_local yields {memregrelsid, %2.ind, fp, %1}
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with REG addr_external yields {abssid, %2.disp, %1}
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with leaving lae $1 lar $2
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with REG REG yields {regrelsid, 0, %2, %1}
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with REG addr_local yields {memregrelsid, %2.ind, fp, %1}
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with REG addr_external yields {abssid, %2.disp, %1}
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with leaving lae $1 lar $2
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pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)!=0
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with REG REG
|
||||
gen subd {const4, rom($1,1)}, %1 yields {regrelsid, 0, %2, %1}
|
||||
with REG addr_local
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
yields {memregrelsid, %2.ind, fp, %1}
|
||||
gen subd {const4, rom($1,1)}, %1 yields {memregrelsid, %2.ind, fp, %1}
|
||||
with REG addr_external
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
yields {abssid, %2.disp, %1}
|
||||
with leaving lae $1 lar $2
|
||||
gen subd {const4, rom($1,1)}, %1 yields {abssid, %2.disp, %1}
|
||||
with leaving lae $1 lar $2
|
||||
|
||||
pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)==0
|
||||
with src4 REG addr_local
|
||||
with REG REG src4
|
||||
kills allmincon
|
||||
gen move %1, {memregrelsid, %3.ind, fp, %2}
|
||||
with src4 REG addr_external
|
||||
gen movd %3, {regrelsid, 0, %2, %1}
|
||||
with REG addr_local src4
|
||||
kills allmincon
|
||||
gen move %1, {abssid, %3.disp, %2}
|
||||
gen move %3, {memregrelsid, %2.ind, fp, %1}
|
||||
with REG addr_external src4
|
||||
kills allmincon
|
||||
gen move %3, {abssid, %2.disp, %1}
|
||||
with leaving lae $1 sar $2
|
||||
|
||||
pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)!=0
|
||||
with src4 REG addr_local
|
||||
pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)!=0
|
||||
with REG REG src4
|
||||
kills allmincon
|
||||
gen subd {const4, rom($1,1)}, %2
|
||||
move %1, {memregrelsid, %3.ind, fp, %2}
|
||||
with src4 REG addr_external
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
movd %3, {regrelsid, 0, %2, %1}
|
||||
with REG addr_local src4
|
||||
kills allmincon
|
||||
gen subd {const4, rom($1,1)}, %2
|
||||
move %1, {abssid, %3.disp, %2}
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
move %3, {memregrelsid, %2.ind, fp, %1}
|
||||
with REG addr_external src4
|
||||
kills allmincon
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
move %3, {abssid, %2.disp, %1}
|
||||
with leaving lae $1 sar $2
|
||||
|
||||
pat lae aar $2==4 && rom($1,1)==0
|
||||
with src4 REG
|
||||
gen indexd %2, {const4, rom($1,3)-1}, %1 yields %2
|
||||
with REG src4
|
||||
gen indexd %1, {const4, rom($1,3)-1}, %2
|
||||
yields %1
|
||||
|
||||
pat lae aar $2==4 && rom($1,1)!=0
|
||||
with REG REG
|
||||
gen subd {const4,rom($1,1)}, %1
|
||||
indexd %2, {const4, rom($1,3)-1}, %1 yields %2
|
||||
with REG src4
|
||||
gen subd {const4, rom($1,1)}, %1
|
||||
indexd %1, {const4, rom($1,3)-1}, %2
|
||||
yields %1
|
||||
|
||||
pat lae sar defined(rom($1,3))
|
||||
leaving lae $1
|
||||
aar $2
|
||||
sti rom($1,3)
|
||||
leaving lae $1
|
||||
aar $2
|
||||
sti rom($1,3)
|
||||
|
||||
pat lae lar defined(rom($1,3))
|
||||
leaving lae $1
|
||||
aar $2
|
||||
loi rom($1,3)
|
||||
leaving lae $1
|
||||
aar $2
|
||||
loi rom($1,3)
|
||||
|
||||
pat aar defined($1)
|
||||
kills ALL
|
||||
|
|
@ -1756,50 +1794,50 @@ kills ALL
|
|||
gen jsr {absolute4, ".sar"}
|
||||
|
||||
/*****************************************************************
|
||||
* Group12 : compare *
|
||||
* Group12 : compare *
|
||||
*****************************************************************/
|
||||
|
||||
proc cmitxxand
|
||||
with src4 src4 REG
|
||||
gen cmpd %2, %1
|
||||
gen cmpd %1, %2
|
||||
brxx* {label, "1f"}
|
||||
xord %3, %3
|
||||
1:
|
||||
movqd {const4, 0}, %3
|
||||
1: yields %3
|
||||
|
||||
proc cmitxxior
|
||||
with src4 src4 REG
|
||||
gen cmpd %2, %1
|
||||
gen cmpd %1, %2
|
||||
brxx* {label, "1f"}
|
||||
sbitd {const4, 0}, %3
|
||||
1:
|
||||
1: yields %3
|
||||
|
||||
proc txxand
|
||||
with src4 REG
|
||||
gen cmpd {const4, 0}, %1
|
||||
gen cmpqd {const4, 0}, %1
|
||||
brxx* {label, "1f"}
|
||||
xord %2, %2
|
||||
1:
|
||||
movqd {const4, 0}, %2
|
||||
1: yields %2
|
||||
|
||||
proc txxior
|
||||
with src4 REG
|
||||
gen cmpd {const4, 0}, %1
|
||||
gen cmpqd {const4, 0}, %1
|
||||
brxx* {label, "1f"}
|
||||
sbitd {const4, 0}, %2
|
||||
1:
|
||||
1: yields %2
|
||||
|
||||
pat cmi tlt and $1==4 && $3==4 call cmitxxand("blt")
|
||||
pat cmi tle and $1==4 && $3==4 call cmitxxand("ble")
|
||||
pat cmi tlt and $1==4 && $3==4 call cmitxxand("bgt")
|
||||
pat cmi tle and $1==4 && $3==4 call cmitxxand("bge")
|
||||
pat cmi teq and $1==4 && $3==4 call cmitxxand("beq")
|
||||
pat cmi tne and $1==4 && $3==4 call cmitxxand("bne")
|
||||
pat cmi tge and $1==4 && $3==4 call cmitxxand("bge")
|
||||
pat cmi tgt and $1==4 && $3==4 call cmitxxand("bgt")
|
||||
pat cmi tge and $1==4 && $3==4 call cmitxxand("ble")
|
||||
pat cmi tgt and $1==4 && $3==4 call cmitxxand("blt")
|
||||
|
||||
pat cmi tlt ior $1==4 && $3==4 call cmitxxior("blt")
|
||||
pat cmi tle ior $1==4 && $3==4 call cmitxxior("ble")
|
||||
pat cmi teq ior $1==4 && $3==4 call cmitxxior("beq")
|
||||
pat cmi tne ior $1==4 && $3==4 call cmitxxior("bne")
|
||||
pat cmi tge ior $1==4 && $3==4 call cmitxxior("bge")
|
||||
pat cmi tgt ior $1==4 && $3==4 call cmitxxior("bgt")
|
||||
pat cmi tlt ior $1==4 && $3==4 call cmitxxior("ble")
|
||||
pat cmi tle ior $1==4 && $3==4 call cmitxxior("blt")
|
||||
pat cmi teq ior $1==4 && $3==4 call cmitxxior("bne")
|
||||
pat cmi tne ior $1==4 && $3==4 call cmitxxior("beq")
|
||||
pat cmi tge ior $1==4 && $3==4 call cmitxxior("bgt")
|
||||
pat cmi tgt ior $1==4 && $3==4 call cmitxxior("bge")
|
||||
|
||||
pat tlt and $2==4 call txxand("bgt")
|
||||
pat tle and $2==4 call txxand("bge")
|
||||
|
|
@ -1808,12 +1846,12 @@ pat tne and $2==4 call txxand("bne")
|
|||
pat tge and $2==4 call txxand("ble")
|
||||
pat tgt and $2==4 call txxand("blt")
|
||||
|
||||
pat tlt ior $2==4 call txxior("bgt")
|
||||
pat tle ior $2==4 call txxior("bge")
|
||||
pat teq ior $2==4 call txxior("beq")
|
||||
pat tne ior $2==4 call txxior("bne")
|
||||
pat tge ior $2==4 call txxior("ble")
|
||||
pat tgt ior $2==4 call txxior("blt")
|
||||
pat tlt ior $2==4 call txxior("ble")
|
||||
pat tle ior $2==4 call txxior("blt")
|
||||
pat teq ior $2==4 call txxior("bne")
|
||||
pat tne ior $2==4 call txxior("beq")
|
||||
pat tge ior $2==4 call txxior("bgt")
|
||||
pat tgt ior $2==4 call txxior("bge")
|
||||
|
||||
pat cmi $1==4
|
||||
with src4 REG
|
||||
|
|
@ -1826,10 +1864,10 @@ uses REG = {const4, 0}
|
|||
gen cmpf %1, %2
|
||||
beq {label, "1f"}
|
||||
bgt {label, "2f"}
|
||||
movd {const4, 1}, %a
|
||||
movqd {const4, 1}, %a
|
||||
br {label, "1f"}
|
||||
2:
|
||||
movd {const4, 0-1}, %a
|
||||
movqd {const4, 0-1}, %a
|
||||
1: yields %a
|
||||
|
||||
pat cmf $1==8
|
||||
|
|
@ -1838,10 +1876,10 @@ uses REG = {const4, 0}
|
|||
gen cmpl %1, %2
|
||||
beq {label, "1f"}
|
||||
bgt {label, "2f"}
|
||||
movd {const4, 1}, %a
|
||||
movqd {const4, 1}, %a
|
||||
br {label, "1f"}
|
||||
2:
|
||||
movd {const4, 0-1}, %a
|
||||
movqd {const4, 0-1}, %a
|
||||
1: yields %a
|
||||
|
||||
#else
|
||||
|
|
@ -1888,15 +1926,15 @@ with src4
|
|||
gen cmpqd {const4, 0}, %1
|
||||
sxx* %a yields %a
|
||||
|
||||
pat tlt call txx("sgtd")
|
||||
pat tle call txx("sged")
|
||||
pat teq call txx("seqd")
|
||||
pat tne call txx("sned")
|
||||
pat tge call txx("sled")
|
||||
pat tgt call txx("sltd")
|
||||
pat tlt call txx("sgtd")
|
||||
pat tle call txx("sged")
|
||||
pat teq call txx("seqd")
|
||||
pat tne call txx("sned")
|
||||
pat tge call txx("sled")
|
||||
pat tgt call txx("sltd")
|
||||
|
||||
/*****************************************************************
|
||||
* Group13 : branch *
|
||||
* Group13 : branch *
|
||||
*****************************************************************/
|
||||
|
||||
proc bxx example beq
|
||||
|
|
@ -2001,7 +2039,7 @@ pat zge call zxx("ble")
|
|||
pat zgt call zxx("blt")
|
||||
|
||||
/*****************************************************************
|
||||
* Group14 : procedure call *
|
||||
* Group14 : procedure call *
|
||||
*****************************************************************/
|
||||
|
||||
pat cal
|
||||
|
|
@ -2036,7 +2074,7 @@ pat lfr $1==4 yields r0
|
|||
pat lfr $1==8 yields r1 r0
|
||||
|
||||
/*****************************************************************
|
||||
* Group15 : miscellaneous *
|
||||
* Group15 : miscellaneous *
|
||||
*****************************************************************/
|
||||
|
||||
pat asp
|
||||
|
|
@ -2053,26 +2091,26 @@ with const4 STACK
|
|||
pat blm $1==0
|
||||
|
||||
pat blm $1==4
|
||||
with REG REG
|
||||
with tosdst4 tossrc4
|
||||
kills allmincon
|
||||
gen move {regrel4, %2, 0}, {regrel4, %1, 0}
|
||||
gen movd %2, %1
|
||||
|
||||
pat blm $1>4 && $1<=16
|
||||
with REG REG
|
||||
kills allmincon
|
||||
gen movmd %2, %1, {const4, $1}
|
||||
gen movmd {regrel4, %2, 0}, {regrel4, %1, 0}, {const4, $1/4}
|
||||
with exact addr_external addr_external
|
||||
kills allmincon
|
||||
gen movmd {absolute4, %2.disp}, {absolute4, %1.disp}, {const4, $1}
|
||||
gen movmd {absolute4, %2.disp}, {absolute4, %1.disp}, {const4, $1/4}
|
||||
with exact addr_external addr_local
|
||||
kills allmincon
|
||||
gen movmd {LOCAL, %2.ind}, {absolute4, %1.disp}, {const4, $1}
|
||||
gen movmd {LOCAL, %2.ind}, {absolute4, %1.disp}, {const4, $1/4}
|
||||
with exact addr_local addr_external
|
||||
kills allmincon
|
||||
gen movmd {absolute4, %2.disp}, {LOCAL, %1.ind}, {const4, $1}
|
||||
gen movmd {absolute4, %2.disp}, {LOCAL, %1.ind}, {const4, $1/4}
|
||||
with exact addr_local addr_local
|
||||
kills allmincon
|
||||
gen movmd {LOCAL, %2.ind}, {LOCAL, %1.ind}, {const4, $1}
|
||||
gen movmd {LOCAL, %2.ind}, {LOCAL, %1.ind}, {const4, $1/4}
|
||||
|
||||
pat blm $1>16
|
||||
with REG REG
|
||||
|
|
@ -2201,21 +2239,23 @@ uses REG
|
|||
|
||||
pat sim
|
||||
with src24
|
||||
kills ALL
|
||||
gen movw %1, {absolute2, ".ignmask"}
|
||||
|
||||
pat str $1==0
|
||||
with src4
|
||||
kills ALL
|
||||
gen sprd fp, %1
|
||||
with src4 STACK
|
||||
gen lprd fp, %1
|
||||
|
||||
pat str $1==1
|
||||
with src4
|
||||
kills ALL
|
||||
gen sprd sp, %1
|
||||
with src4 STACK
|
||||
gen lprd sp, %1
|
||||
|
||||
pat str $1==2
|
||||
with src4
|
||||
gen move %1, {absolute4, ".reghp"}
|
||||
kills ALL
|
||||
gen movd %1, {TOS}
|
||||
jsr {absolute4, ".strhp"}
|
||||
adjspd {const4, 0-4}
|
||||
|
||||
pat trp
|
||||
kills ALL
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue