Added some patterns, and avoided a bug in the VAX assembler
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ceriel
parent
729490c212
commit
3fc90a8000
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@ -4,6 +4,16 @@
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/*#define DORCK /* define if you want RCK */
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#define FLOAT4 /* define if you want better 4-byte FP arithmetic */
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#define FLOAT8 /* define if you want better 8-byte FP arithmetic */
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#define ASBUG_AVOID /* define if you want to avoid a bug in the BSD 4.1 VAX
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assembler, that sometimes generates "*1" for
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(r1). This is avoided by generating 0(r1), which is
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optimized by the assembler to (r1).
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*/
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#ifdef ASBUG_AVOID
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#define REGDEFFORMAT "0(%[reg])"
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#else
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#define REGDEFFORMAT "(%[reg])"
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#endif
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#define NC nocoercions :
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#define BSIZE 4
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@ -91,10 +101,10 @@ EXTERNAL4 = {STRING ind;} 4 cost=(4,6) "%[ind]"
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EXTERNAL8 = {STRING ind;} 8 cost=(4,9) "%[ind]"
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DOUBLE = {STRING ind;} 4 cost=(4,6) "$%[ind]"
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/* Now tokens for the target machine */
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regdef1 = {REGISTER reg;} 4 cost=(0,3) "(%[reg])"
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regdef2 = {REGISTER reg;} 4 cost=(0,3) "(%[reg])"
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regdef4 = {REGISTER reg;} 4 cost=(0,3) "(%[reg])"
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regdef8 = {REGISTER reg;} 8 cost=(0,6) "(%[reg])"
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regdef1 = {REGISTER reg;} 4 cost=(0,3) REGDEFFORMAT
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regdef2 = {REGISTER reg;} 4 cost=(0,3) REGDEFFORMAT
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regdef4 = {REGISTER reg;} 4 cost=(0,3) REGDEFFORMAT
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regdef8 = {REGISTER reg;} 8 cost=(0,6) REGDEFFORMAT
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#ifdef REGVARS
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reginc1 = {REGISTER reg;} 4 cost=(0,3) "(%[reg])+"
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reginc2 = {REGISTER reg;} 4 cost=(0,3) "(%[reg])+"
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@ -271,7 +281,7 @@ loc $1>=256 && $1<65536 | | | {CONST2,$1} | |
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loc | | | {CONST4,$1} | |
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ldc | | | {CONST8,$1} | |
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#ifdef REGVARS
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lol inreg($1)==2 | | | regvar($1) | |
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lol inreg($1)==2 | | REMREG($1) | regvar($1) | |
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#endif REGVARS
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lol $1 < 0 | | | {LOCAL4,LB,$1,4} | |
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lol $1 >= 0 | | | {LOCAL4,AP,$1,4} | |
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@ -676,6 +686,11 @@ adi sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"addl3\t%[1],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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adi lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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"addl3\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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adi sil $1==4 && $2<0
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| source4 source4 |
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@ -729,6 +744,11 @@ sbi sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"subl3\t%[1],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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sbi lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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"subl3\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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sbi sil $1==4 && $2<0
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| source4 source4 |
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@ -786,6 +806,11 @@ mli sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"mull3\t%[1],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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mli lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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"mull3\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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mli sil $1==4 && $2<0
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| source4 source4 |
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@ -839,6 +864,11 @@ dvi sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"divl3\t%[1],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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dvi lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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"divl3\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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dvi sil $1==4 && $2<0
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| source4 source4 |
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@ -902,6 +932,14 @@ rmi sil $1==4 && inreg($2)==2
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"mull2\t%[1],%[a]"
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"subl3\t%[a],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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rmi lol stf $1==4 && inreg($2)==2
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| Xsource4 Xsource4 |
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REMEXTANDLOC
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allocate(REG)
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"divl3\t%[1],%[2],%[a]"
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"mull2\t%[1],%[a]"
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"subl3\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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rmi sil $1==4 && $2<0
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| Xsource4 Xsource4 |
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@ -961,6 +999,11 @@ ngi sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"mnegl\t%[1],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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ngi lol stf $1==4 && inreg($2)==2
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| source4 |
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REMEXTANDLOC
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"mnegl\t%[1],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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ngi sil $1==4 && $2<0
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| source4 |
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@ -1010,6 +1053,11 @@ sli sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"ashl\t%[1],%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | |
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sli lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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"ashl\t%[1],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | |
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#endif REGVARS
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sli sil $1==4 && $2<0
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| source4 source4 |
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@ -1092,6 +1140,17 @@ sri sil $1==4 && inreg($2)==2
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REMEXTANDLOC
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"ashl\t$$%(0-%[1.num]%),%[2],(%(regvar($2)%))"
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setcc({regdef4,regvar($2)}) | | | (6,10)+%[1]+%[2]
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sri lol stf $1==4 && inreg($2)==2
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| source4 source4 |
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REMEXTANDLOC
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allocate(%[1], REG)
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"mnegl\t%[1],%[a]"
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"ashl\t%[a],%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | | (9,14)+%[1]+%[2]
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... | NC CONST source4 |
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REMEXTANDLOC
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"ashl\t$$%(0-%[1.num]%),%[2],$3(%(regvar($2)%))"
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setcc({displ4,regvar($2),tostring($3)}) | | | (6,10)+%[1]+%[2]
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#endif REGVARS
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sri sil $1==4 && $2<0
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| source4 source4 |
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