Added register variables: registers si and di
This commit is contained in:
ceriel
parent
3997e07366
commit
470dcc3d11
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@ -77,9 +77,70 @@ prolog(nlocals) full nlocals; {
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default:
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printf("\tsub\tsp,%d\n",nlocals); break;
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}
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}
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#ifdef REGVARS
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long si_off;
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long di_off;
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int firstreg;
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regscore(off, size, typ, score, totyp)
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long off;
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{
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if (size != 2) return -1;
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if (typ == reg_pointer || typ == reg_loop) score *= 3;
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else score *= 2;
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score -= 2; /* cost of saving */
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if (off >= 0) score -= 3;
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return score;
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}
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i_regsave()
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{
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si_off = -1;
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di_off = -1;
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firstreg = 0;
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}
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f_regsave()
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{
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}
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regsave(regstr, off, size)
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char *regstr;
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long off;
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{
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if (strcmp(regstr, "si") == 0) {
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if (! firstreg) firstreg = -1;
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si_off = off;
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fputs("push si\n", codefile);
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if (off >= 0)
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fprintf(codefile, "mov si,%ld(bp)\n", off);
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}
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else {
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assert( ! strcmp(regstr, "di"));
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if (! firstreg) firstreg = 1;
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di_off = off;
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fputs("push di\n", codefile);
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if (off >= 0)
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fprintf(codefile, "mov di,%ld(bp)\n", off);
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}
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}
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regreturn()
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{
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if (firstreg == 1) {
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if (si_off != -1) fputs("pop si\n", codefile);
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fputs("pop di\n", codefile);
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}
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else if (firstreg == -1) {
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if (di_off != -1) fputs("pop di\n", codefile);
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fputs("pop si\n", codefile);
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}
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fputs("mov sp,bp\npop bp\nret\n", codefile);
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}
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#endif REGVARS
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mes(type) word type ; {
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int argt ;
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@ -19,6 +19,8 @@
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#define SL 4
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#define SSL "4"
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#define REGVARS
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/********************************************************
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* Back end tables for Intel 8086 *
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* Author : Ed Keizer *
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@ -84,8 +86,13 @@ ax = ("ax", 2, al, ah), REG, GENREG, ACC.
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bx = ("bx", 2, bl, bh), REG, GENREG, BREG, BXREG, ADDREG.
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cx = ("cx", 2, cl, ch), REG, GENREG, CXREG, SHIFT_CREG.
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dx = ("dx", 2, dl, dh), REG, GENREG, DXREG.
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#ifdef REGVARS
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si = ("si", 2) regvar, RREG, RADDREG.
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di = ("di", 2) regvar, RREG, RADDREG.
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#else
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si = ("si", 2), REG, IREG, SIREG, ADDREG.
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di = ("di", 2), REG, IREG, DIREG, ADDREG.
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#endif
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bp = ("bp", 2), BREG.
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TOKENS:
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@ -141,10 +148,16 @@ X_REG = REG*SCRATCH
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X_BXREG = BXREG*SCRATCH
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X_DXREG = DXREG*SCRATCH
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X_CXREG = CXREG*SCRATCH
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#ifndef REGVARS
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X_SIREG = SIREG*SCRATCH
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X_DIREG = DIREG*SCRATCH
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#endif
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X_ADDREG = ADDREG*SCRATCH
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#ifdef REGVARS
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IREG = RREG
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#endif
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/* Mode refering to a word in memory */
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memory2 = EXTERN2 + ind_reg2 + ind_regoff2 + ind_bpregoff2 + LOCAL2
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@ -153,11 +166,28 @@ memory1 = EXTERN1 + ind_reg1 + ind_regoff1 + ind_bpregoff1 + LOCAL1
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/* Modes allowed in instructions */
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const = ANYCON + ADDR_EXTERN
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anyreg = REG + BREG
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register = REG
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#ifdef REGVARS
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+ RREG
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#endif
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anyreg = register + BREG
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addreg = ADDREG
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#ifdef REGVARS
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+ RADDREG
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#endif
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rm = anyreg + memory2
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rmnoacc = RREG + BREG + CXREG + DXREG + memory2
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rmorconst = const + rm
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regorconst = const + anyreg
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dest = REG + memory2
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#ifdef REGVARS
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/* Needed because there is a shortage of ADDREG-registers.
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This is the main penalty for having register variables.
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*/
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regorconstnoaddr = const + RREG + ACC + CXREG + DXREG
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#else
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regorconstnoaddr = regorconst
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#endif
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dest = register + memory2
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rm1 = REG1 + memory1
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rmorconst1 = const + rm1
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@ -176,7 +206,8 @@ referals = indirects + locals
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/* Miscellaneous */
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halfindir = reg_off + bpreg_off + ADDR_LOCAL
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some_off = halfindir + ADDR_EXTERN + ADDREG
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some_off = halfindir + ADDR_EXTERN + addreg
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x_word = rmorconst + halfindir
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a_word = rmorconst + rm1 + halfindir
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no_reg_off = rmorconst + rm1 + ADDR_LOCAL
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@ -191,16 +222,27 @@ CODE:
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loc | | | {ANYCON, $1} | |
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ldc | | | {ANYCON, highw(1)} {ANYCON, loww(1)} | |
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lol | | | {LOCAL2, $1, 2} | |
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#ifdef REGVARS
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lol inreg($1)==2 | | | regvar($1) | |
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#endif
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lol | | | {LOCAL2, $1, 2} | |
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loe | | | {EXTERN2, $1} | |
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loe loe $1==$2 | | allocate(ADDREG={EXTERN2, $1}) | %[a] %[a] | |
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lol lol $1==$2 | | allocate(ADDREG={LOCAL2, $1, 2})| %[a] %[a] | |
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loe loe $1==$2 | | allocate(REG={EXTERN2, $1}) | %[a] %[a] | |
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#ifdef REGVARS
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lol lol $1==$2 && inreg($1)!=2
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| | allocate(REG={LOCAL2, $1, 2})| %[a] %[a] | |
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#else
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lol lol $1==$2 | | allocate(REG={LOCAL2, $1, 2})| %[a] %[a] | |
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#endif
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#ifdef REGVARS
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lil inreg($1)==2 | | | {ind_reg2, regvar($1)} | |
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#endif
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lil | | allocate(ADDREG={ind_regoff2, bp, tostring($1)})
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| {ind_reg2, %[a]} | |
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lof | nocoercions : reg_off |
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| {ind_regoff2, %[1.reg],
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%[1.off]+"+"+tostring($1)} | |
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... | ADDREG | | {ind_regoff2,%[1],tostring($1)} | |
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... | addreg | | {ind_regoff2,%[1],tostring($1)} | |
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... | nocoercions : bpreg_off |
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| {ind_bpregoff2,%[1.reg], %[1.ind]+$1} | |
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... | nocoercions : ADDR_EXTERN|
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@ -233,7 +275,7 @@ lxa $1 > 2 | | allocate(ADDREG={ind_regoff2,bp,SSL},
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samecc erase(%[a]) erase(%[b])
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| {reg_off, %[a], SSL } | |
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dch | | | | loi 2 |
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loi $1==2 | ADDREG | | {ind_reg2, %[1]} | |
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loi $1==2 | addreg | | {ind_reg2, %[1]} | |
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... | nocoercions : reg_off |
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| {ind_regoff2, %[1.reg], %[1.off]} | |
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... | nocoercions : bpreg_off |
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@ -242,7 +284,7 @@ loi $1==2 | ADDREG | | {ind_reg2, %[1]} | |
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| {EXTERN2, %[1.off]} | |
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... | nocoercions : ADDR_LOCAL |
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| {LOCAL2, %[1.ind],2} | |
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loi $1==1 | ADDREG | | {ind_reg1, %[1]} | |
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loi $1==1 | addreg | | {ind_reg1, %[1]} | |
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... | nocoercions : reg_off |
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| {ind_regoff1, %[1.reg], %[1.off]} | |
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... | nocoercions : bpreg_off |
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@ -251,7 +293,7 @@ loi $1==1 | ADDREG | | {ind_reg1, %[1]} | |
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| {EXTERN1, %[1.off]} | |
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... | nocoercions : ADDR_LOCAL |
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| {LOCAL1, %[1.ind],1} | |
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loi $1==4 | ADDREG | | {ind_regoff2,%[1],"2"} {ind_reg2,%[1]}| |
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loi $1==4 | addreg | | {ind_regoff2,%[1],"2"} {ind_reg2,%[1]}| |
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... | nocoercions : reg_off |
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| {ind_regoff2,%[1.reg], %[1.off]+"+2"}
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{ind_regoff2,%[1.reg], %[1.off]} | |
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@ -262,24 +304,27 @@ loi $1==4 | ADDREG | | {ind_regoff2,%[1],"2"} {ind_reg2,%[1]}| |
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{LOCAL2,%[1.ind]+2,2} {LOCAL2,%[1.ind],2} | |
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... | nocoercions : ADDR_EXTERN| | {EXTERN2, %[1.off]+"+2"}
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{EXTERN2, %[1.off]} | |
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loi $1>4 | X_SIREG |
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loi $1>4 | |
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remove(ALL)
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allocate(CXREG={ANYCON,$1})
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"sub sp,cx"
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"sar cx,1"
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allocate(CXREG={ANYCON,$1/2})
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"mov ax,si"
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"mov bx,di"
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"sub sp,%($1%)"
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"mov di,sp"
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"rep movs"
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erase(%[a]) erase(%[1]) | | | (8,8+$1*9)
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... | X_SIREG |
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"mov si,ax"
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"mov di,bx"
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erase(%[a]) | | | (16,16+$1*9)
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... | X_BXREG |
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remove(ALL)
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allocate(CXREG={ANYCON,$1})
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"call .loi"
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erase(%[a]) erase(%[1]) | | | (3,32+$1*9)
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los $1==2 | X_CXREG X_SIREG |
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erase(%[a]) erase(%[1]) | | | (3,40+$1*9)
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los $1==2 | X_CXREG X_BXREG |
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remove(ALL)
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"call .loi"
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erase(%[1]) erase(%[2]) | | |
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los !defined($1)| rm X_CXREG X_SIREG |
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los !defined($1)| rm X_CXREG X_BXREG |
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remove(ALL)
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"cmp %[1],2"
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"jne .unknown"
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@ -292,7 +337,7 @@ ldf | nocoercions : reg_off |
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%[1.off]+"+2+"+tostring($1)}
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{ind_regoff2, %[1.reg],
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%[1.off]+"+"+tostring($1)} | |
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... | ADDREG |
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... | addreg |
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| {ind_regoff2, %[1], tostring($1+2)}
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{ind_regoff2, %[1], tostring($1)} | |
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... | nocoercions : bpreg_off |
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@ -317,6 +362,13 @@ lol lal sti $1==$2 && $3<=2 | | | | |
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* because we seem to have evaluated an expression just now. *
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****************************************************************/
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#ifdef REGVARS
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stl inreg($1)==2
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| rmorconst |
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move(%[1], regvar($1)) | | |
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... | nocoercions : STACK |
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"pop %(regvar($1)%)" samecc | | |(1,8)
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#endif
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stl | regorconst |
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remove(indexed)
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remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
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@ -327,14 +379,25 @@ ste | regorconst |
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remove(indirects)
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move(%[1], {EXTERN2, $1 }) | | |
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... | nocoercions : STACK | "pop ($1)" samecc | | |
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sil | regorconst |
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#ifdef REGVARS
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sil inreg($1)==2| regorconst |
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remove(referals)
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move(%[1],regvar($1)) | | |
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... | nocoercions : STACK |
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"pop (%(regvar($1)%)" samecc | | |(2,26)
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#endif
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sil | regorconstnoaddr |
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allocate(ADDREG={ind_regoff2, bp, tostring($1)})
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remove(referals)
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move(%[1], {ind_reg2, %[a]}) | | |
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stf | ADDREG regorconst |
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... | STACK |
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allocate(ADDREG={ind_regoff2, bp, tostring($1)})
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remove(referals)
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"pop (%[a])" samecc | | | (2,26)
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stf | addreg regorconst |
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remove(referals)
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move(%[2],{ind_regoff2,%[1],tostring($1)})| | |
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... | nocoercions : ADDREG STACK |
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... | nocoercions : addreg STACK |
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remove(referals)
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"pop $1(%[1])" samecc | | |
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... | reg_off regorconst |
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@ -344,7 +407,7 @@ stf | ADDREG regorconst |
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... | nocoercions : halfindir STACK |
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remove(referals)
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"pop $1+%[1]" samecc | | |
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... | ADDR_LOCAL | | | stl %[1.ind]+$1 |
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... | nocoercions : ADDR_LOCAL | | | stl %[1.ind]+$1 |
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... | bpreg_off regorconst |
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remove(all_locals)
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remove(indexed)
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@ -355,10 +418,10 @@ stf | ADDREG regorconst |
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remove(indirects)
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move(%[2],{EXTERN2,%[1.off]+"+"+tostring($1)})| | |
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*/
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sti $1==2 | ADDREG regorconst |
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sti $1==2 | addreg regorconst |
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remove(referals)
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move(%[2],{ind_reg2,%[1]}) | | |
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... | nocoercions : ADDREG STACK |
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... | nocoercions : addreg STACK |
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remove(referals)
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"pop (%[1])" samecc | | |
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... | reg_off regorconst |
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@ -382,7 +445,7 @@ sti $1==2 | ADDREG regorconst |
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... | nocoercions : ADDR_EXTERN STACK |
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remove(indirects)
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"pop (%[1])" samecc | | |
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sti $1==1 | ADDREG regorconst12 |
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sti $1==1 | addreg regorconst12 |
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remove(referals)
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move(%[2],{ind_reg1,%[1]}) | | |
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... | reg_off regorconst12 |
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@ -401,7 +464,7 @@ sti $1==1 | ADDREG regorconst12 |
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%[ind]<=%[1.ind] && %[ind]+%[size]>%[1.ind] )
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move(%[2],{ind_regoff1, bp, tostring(%[1.ind])})
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| | |
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sti $1==4 | ADDREG regorconst regorconst |
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sti $1==4 | addreg regorconst regorconst |
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remove(referals)
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move(%[2],{ind_reg2,%[1]})
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move(%[3],{ind_regoff2,%[1],"2"}) | | |
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@ -424,13 +487,23 @@ sti $1==4 | ADDREG regorconst regorconst |
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move(%[2],{ind_regoff2, bp, tostring(%[1.ind])})
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move(%[3],{ind_regoff2, bp,
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tostring(%[1.ind]+2)})| | |
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sti $1>4 | X_DIREG |
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sti $1>4 | |
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remove(ALL)
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allocate(CXREG={ANYCON,$1/2})
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"mov ax,si"
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"mov bx,di"
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"mov si,sp"
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"pop di"
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"rep movs"
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"mov sp,si"
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erase(%[1]) erase(%[a]) | | | (5,4+$1*8)
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"mov si,ax"
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"mov di,bx"
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erase(%[a]) | | | (14,12+$1*8)
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... | X_BXREG |
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remove(ALL)
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allocate(CXREG={ANYCON,$1})
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"call .sti"
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erase(%[a]) erase(%[1]) | | | (3,40+$1*9)
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/* This sort of construction gives problems in the codegenerator
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because of the potential verly large lookahead
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... | X_ADDREG |
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@ -439,17 +512,17 @@ sti $1>4 | X_DIREG |
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"add %[1],2"
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erase(%[1]) | %[1] | sti $1-2 | (5,30)
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*/
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sts $1==2 | X_CXREG X_DIREG |
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sts $1==2 | X_CXREG X_BXREG |
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remove(ALL)
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"call .sti"
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erase(%[1]) erase(%[2]) | | |
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sdl | | | | stl $1 stl $1+2 |
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sde | | | | ste $1 ste $1+"+2" |
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sdf | ADDREG regorconst regorconst |
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sdf | addreg regorconst regorconst |
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remove(referals)
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move(%[2],{ind_regoff2,%[1],tostring($1)})
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move(%[3],{ind_regoff2,%[1],tostring($1+2)})| | |
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... | nocoercions : ADDREG STACK |
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... | nocoercions : addreg STACK |
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remove(referals)
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"pop $1(%[1])"
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"pop %($1+2%)(%[1])" samecc | | |
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@ -555,26 +628,26 @@ mli $1==2 | X_ACC rm |
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but mul is faster
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*/
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nocc erase(%[1]) | %[1] | |(2,118)+%[2]
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... | rm-ACC X_ACC |
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allocate(%[1],DXREG)
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... | rmnoacc rmorconst |
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allocate(%[1],%[2],ACC=%[2],DXREG)
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"mul %[1]"
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nocc erase(%[2]) | %[2] | |(2,118)+%[1]
|
||||
mli $1==4 | SIREG DIREG BXREG X_ACC |
|
||||
nocc erase(%[a]) | ax | |(2,118)+%[1]
|
||||
mli $1==4 | X_ACC X_DXREG |
|
||||
remove(ALL)
|
||||
"call .mli4"
|
||||
erase(ax) setcc(dx) | dx ax | |
|
||||
erase(ax) erase(dx) setcc(dx) | dx ax | |
|
||||
/* Not now,
|
||||
mli !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
"call .mli" | | |
|
||||
*/
|
||||
dvi $1==2 | rm-ACC X_ACC |
|
||||
allocate(DXREG)
|
||||
dvi $1==2 | rmnoacc rmorconst |
|
||||
allocate(%[1], %[2], ACC=%[2], DXREG)
|
||||
"cwd"
|
||||
"idiv %[1]"
|
||||
erase(%[2]) | ax | |(3,176)+%[1]
|
||||
erase(%[a]) | ax | |(3,176)+%[1]
|
||||
dvi $1==4 | | remove(ALL)
|
||||
"call .dvi4" | cx ax | |
|
||||
"call .dvi4" | dx ax | |
|
||||
/*
|
||||
dvi !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
|
|
@ -586,13 +659,13 @@ loc loc cii dvi loc loc cii $1==2 && $2==4 && $4==4 && $5==4 && $6==2
|
|||
"idiv %[1]"
|
||||
erase(%[2]) erase(%[3]) | ax | |(2,171)+%[1]
|
||||
#endif
|
||||
rmi $1==2 | rm-ACC X_ACC |
|
||||
allocate(DXREG)
|
||||
rmi $1==2 | rmnoacc rmorconst |
|
||||
allocate(%[1], %[2], ACC=%[2], DXREG)
|
||||
"cwd"
|
||||
"idiv %[1]"
|
||||
erase(%[2]) | dx | |(3,176)+%[1]
|
||||
erase(%[a]) | dx | |(3,176)+%[1]
|
||||
rmi $1==4 | | remove(ALL)
|
||||
"call .rmi4" | bx dx | |
|
||||
"call .rmi4" | dx ax | |
|
||||
/*
|
||||
rmi !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
|
|
@ -613,12 +686,6 @@ ngi $1==4 | X_REG X_REG |
|
|||
"sbb %[2],0"
|
||||
setcc(%[2]) erase(%[1]) erase(%[2])
|
||||
| %[2] %[1] | | (8,10)
|
||||
... | X_REG-ACC X_ACC |
|
||||
"neg %[2]"
|
||||
"neg %[1]"
|
||||
"sbb %[2],0"
|
||||
setcc(%[2]) erase(%[1]) erase(%[2])
|
||||
| %[2] %[1] | | (7,10)
|
||||
/*
|
||||
ngi !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
|
|
@ -676,23 +743,23 @@ sri !defined($1)| X_ACC |
|
|||
adu | | | | adi $1 |
|
||||
sbu | | | | sbi $1 |
|
||||
mlu | | | | mli $1 |
|
||||
dvu $1==2 | rm-ACC X_ACC |
|
||||
allocate(%[1],DXREG={ANYCON,0})
|
||||
dvu $1==2 | rmnoacc rmorconst |
|
||||
allocate(%[2],ACC=%[2],DXREG={ANYCON,0})
|
||||
"div %[1]"
|
||||
erase(%[2]) erase(%[a]) | %[2] | |(2,149)+%[1]
|
||||
erase(%[b]) erase(%[a]) | ax | |(2,149)+%[1]
|
||||
dvu $1==4 | | remove(ALL)
|
||||
"call .dvu4" | cx ax | |
|
||||
"call .dvu4" | dx ax | |
|
||||
/*
|
||||
dvu !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
"call .dvu" erase(%[1]) | | |
|
||||
*/
|
||||
rmu $1==2 | rm-ACC X_ACC |
|
||||
allocate(%[1],DXREG={ANYCON,0})
|
||||
rmu $1==2 | rmnoacc rmorconst |
|
||||
allocate(%[2],ACC=%[2],DXREG={ANYCON,0})
|
||||
"div %[1]"
|
||||
erase(%[2]) erase(%[a]) | dx | |(3,149)+%[1]
|
||||
erase(%[b]) erase(%[a]) | dx | |(3,149)+%[1]
|
||||
rmu $1==4 | | remove(ALL)
|
||||
"call .rmu4" | bx dx | |
|
||||
"call .rmu4" | dx ax | |
|
||||
/*
|
||||
rmu !defined($1)| X_ACC |
|
||||
remove(ALL)
|
||||
|
|
@ -862,6 +929,7 @@ ads $1==2 | nocoercions : ANYCON reg_off | |
|
|||
"add %[1.reg],%[2.reg]"
|
||||
erase(%[1.reg]) setcc(%[1.reg]) |
|
||||
{reg_off,%[1.reg],%[1.off]+"+"+%[2.off]} | | (2,3)
|
||||
#ifndef REGVARS
|
||||
... | IREG ADDR_LOCAL | | {bpreg_off,%[1],%[2.ind]} | |
|
||||
/*
|
||||
... | (REG-IREG) ADDR_LOCAL |
|
||||
|
|
@ -869,6 +937,10 @@ ads $1==2 | nocoercions : ANYCON reg_off | |
|
|||
"add %[a],bp"
|
||||
| {reg_off, %[a], tostring(%[2.ind])} | | (2,3)
|
||||
*/
|
||||
#else
|
||||
... | nocoercions: RREG ADDR_LOCAL | |
|
||||
{bpreg_off,%[1],%[2.ind]} | |
|
||||
#endif
|
||||
#ifdef DEEPER
|
||||
... | X_REG rmorconst |
|
||||
"add %[1],%[2]"
|
||||
|
|
@ -922,6 +994,11 @@ sbs $1==2 | nocoercions : ANYCON reg_off | |
|
|||
inc | X_REG |
|
||||
"inc %[1]"
|
||||
setcc(%[1]) erase(%[1]) | %[1] | |(1,2)
|
||||
#ifdef REGVARS
|
||||
inl inreg($1)==2| |
|
||||
"inc %(regvar($1)%)"
|
||||
setcc(regvar($1)) | | |(1,2)
|
||||
#endif
|
||||
inl | | remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"inc $1(bp)"
|
||||
|
|
@ -932,6 +1009,11 @@ ine | | remove(indirects)
|
|||
dec | X_REG |
|
||||
"dec %[1]"
|
||||
setcc(%[1]) erase(%[1]) | %[1] | |(1,2)
|
||||
#ifdef REGVARS
|
||||
del inreg($1)==2| |
|
||||
"dec %(regvar($1)%)"
|
||||
setcc(regvar($1)) | | |(1,2)
|
||||
#endif
|
||||
del | | remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"dec $1(bp)"
|
||||
|
|
@ -939,6 +1021,10 @@ del | | remove(indexed)
|
|||
dee | | remove(indirects)
|
||||
"dec ($1)"
|
||||
setcc({EXTERN2,$1}) | | |(4,21)
|
||||
#ifdef REGVARS
|
||||
zrl inreg($1)==2| |
|
||||
move({ANYCON,0},regvar($1)) | | |
|
||||
#endif
|
||||
zrl | | remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
move({ANYCON,0},{LOCAL2,$1,2})
|
||||
|
|
@ -974,6 +1060,11 @@ zer !defined($1)| X_CXREG |
|
|||
"loop 1b"
|
||||
samecc erase(%[1]) | | |
|
||||
|
||||
#ifdef REGVARS
|
||||
lol adi stl $1==$3 && $2==2 && inreg($1)==2 | rmorconst |
|
||||
"add %(regvar($1)%),%[1]"
|
||||
setcc(regvar($1)) | | |
|
||||
#endif
|
||||
lol adi stl $1==$3 && $2==2 | regorconst |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
|
|
@ -984,6 +1075,11 @@ ldl adi sdl $1==$3 && $2==4 | regorconst regorconst |
|
|||
remove(locals, %[ind]>=$1 && %[ind]<$1+4 )
|
||||
"add $1(bp),%[1]"
|
||||
"adc %($1+2%)(bp),%[2]" | | |
|
||||
#ifdef REGVARS
|
||||
lol ngi stl $1==$3 && $2==2 && inreg($1)==2 | |
|
||||
"neg %(regvar($1)%)"
|
||||
setcc(regvar($1)) | | |
|
||||
#endif
|
||||
lol ngi stl $1==$3 && $2==2 | |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
|
|
@ -995,83 +1091,145 @@ ldl ngi sdl $1==$3 && $2==4 | |
|
|||
"neg $1(bp)"
|
||||
"neg %($1+2%)(bp)"
|
||||
"sbb %($1+2%)(bp),0" | | |
|
||||
lol ads stl $1==$3 && $2==2 | regorconst |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"add $1(bp),%[1]"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
lol ads stl $1==$3 && $2==2 | | | | lol $1 adi 2 stl $1 |
|
||||
#ifdef REGVARS
|
||||
lol lol adp stl $1==$2 && $1==$4 && inreg($1)==2 | |
|
||||
allocate(ADDREG=regvar($1)) | %[a] | lol $2 adp $3 stl $2 |
|
||||
lol inl $1==$2 && inreg($1)==2 | |
|
||||
allocate(REG=regvar($1)) | %[a] | inl $1 |
|
||||
lol del $1==$2 && inreg($1)==2 | |
|
||||
allocate(REG=regvar($1)) | %[a] | del $1 |
|
||||
#endif
|
||||
lol lol adp stl $1==$2 && $1==$4 | |
|
||||
allocate(ADDREG={LOCAL2,$1,2}) | %[a] | lol $2 adp $3 stl $2 |
|
||||
lol adp stl $1==$3 && $2==1 | |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"inc $1(bp)"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
lol adp stl $1==$3 && $2==0-1 | |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"dec $1(bp)"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
lol inl $1==$2 | | allocate(REG={LOCAL2,$1,2}) | %[a] | inl $1 |
|
||||
lol del $1==$2 | | allocate(REG={LOCAL2,$1,2}) | %[a] | del $1 |
|
||||
lol adp stl $1==$3 && $2==1 | | | | inl $1 |
|
||||
lol adp stl $1==$3 && $2==0-1 | | | | del $1 |
|
||||
#ifdef REGVARS
|
||||
lol adp stl $1==$3 && inreg($1)==2 | |
|
||||
"add %(regvar($1)%),$2"
|
||||
setcc(regvar($1)) | | |
|
||||
#endif
|
||||
lol adp stl $1==$3 | |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"add $1(bp),$2"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
#ifdef REGVARS
|
||||
lol and stl $1==$3 && $2==2 && inreg($1)==2 | rmorconst |
|
||||
"and %(regvar($1)%),%[1]"
|
||||
setcc(regvar($1)) | | |
|
||||
#endif
|
||||
lol and stl $1==$3 && $2==2 | regorconst |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"and $1(bp),%[1]"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
#ifdef REGVARS
|
||||
lol ior stl $1==$3 && $2==2 && inreg($1)==2 | rmorconst |
|
||||
"or %(regvar($1)%),%[1]"
|
||||
setcc(regvar($1)) | | |
|
||||
#endif
|
||||
lol ior stl $1==$3 && $2==2 | regorconst |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"or $1(bp),%[1]"
|
||||
setcc({LOCAL2, $1, 2}) | | |
|
||||
#ifdef REGVARS
|
||||
lol com stl $1==$3 && $2==2 && inreg($1)==2 | |
|
||||
"not %(regvar($1)%)"
|
||||
samecc | | |
|
||||
#endif
|
||||
lol com stl $1==$3 && $2==2 | |
|
||||
remove(indexed)
|
||||
remove(locals, %[ind]>=$1 && %[ind]<$1+2 )
|
||||
"not $1(bp)"
|
||||
samecc | | |
|
||||
lil adi sil $1==$3 && $2==2 | regorconst |
|
||||
#ifdef REGVARS
|
||||
lil adi sil $1==$3 && $2==2 && inreg($1)==2 | regorconst |
|
||||
remove(referals)
|
||||
"add (%(regvar($1)%)),%[1]"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil adi sil $1==$3 && $2==2 | regorconstnoaddr |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"add (%[a]),%[1]"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
#ifdef REGVARS
|
||||
lil ngi sil $1==$3 && $2==2 && inreg($1)==2 | |
|
||||
remove(referals)
|
||||
"neg (%(regvar($1)%))"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil ngi sil $1==$3 && $2==2 | |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"neg (%[a])"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
lil ads sil $1==$3 && $2==2 | regorconst |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
lil ads sil $1==$3 && $2==2 | | | | lil $1 adi 2 sil $1 |
|
||||
#ifdef REGVARS
|
||||
lil adp sil $1==$3 && $2==1 && inreg($1)==2 | |
|
||||
remove(referals)
|
||||
"add (%[a]),%[1]"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
"inc (%(regvar($1)%))"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil adp sil $1==$3 && $2==1 | |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"inc (%[a])"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
#ifdef REGVARS
|
||||
lil adp sil $1==$3 && $2==0-1 && inreg($1)==2 | |
|
||||
remove(referals)
|
||||
"dec (%(regvar($1)%))"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil adp sil $1==$3 && $2==0-1 | |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"dec (%[a])"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
#ifdef REGVARS
|
||||
lil adp sil $1==$3 && inreg($1)==2 | |
|
||||
remove(referals)
|
||||
"add (%(regvar($1)%)),$2"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil adp sil $1==$3 | |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"add (%[a]),$2"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
lil and sil $1==$3 && $2==2 | regorconst |
|
||||
#ifdef REGVARS
|
||||
lil and sil $1==$3 && $2==2 && inreg($1)==2 | regorconst |
|
||||
remove(referals)
|
||||
"and (%(regvar($1)%)),%[1]"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil and sil $1==$3 && $2==2 | regorconstnoaddr |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"and (%[a]),%[1]"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
lil ior sil $1==$3 && $2==2 | regorconst |
|
||||
#ifdef REGVARS
|
||||
lil ior sil $1==$3 && $2==2 && inreg($1)==2 | regorconst |
|
||||
remove(referals)
|
||||
"or (%(regvar($1)%)),%[1]"
|
||||
setcc({ind_reg2, regvar($1)}) | | |
|
||||
#endif
|
||||
lil ior sil $1==$3 && $2==2 | regorconstnoaddr |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
"or (%[a]),%[1]"
|
||||
setcc({ind_reg2, %[a]}) | | |
|
||||
#ifdef REGVARS
|
||||
lil com sil $1==$3 && $2==2 && inreg($1)==2 | |
|
||||
remove(referals)
|
||||
"not (%(regvar($1)%))"
|
||||
samecc | | |
|
||||
#endif
|
||||
lil com sil $1==$3 && $2==2 | |
|
||||
allocate(ADDREG={LOCAL2, $1, 2})
|
||||
remove(referals)
|
||||
|
|
@ -1100,6 +1258,8 @@ loe ads ste $1==$3 && $2==2 | regorconst |
|
|||
setcc({EXTERN2, $1}) | | |
|
||||
loe loe adp ste $1==$4 && $1==$4 | |
|
||||
allocate(ADDREG={EXTERN2,$1}) | %[a] | loe $1 adp $3 ste $1 |
|
||||
loe ine $1==$2 | | allocate(REG={EXTERN2,$1}) | %[a] | ine $1 |
|
||||
loe dee $1==$2 | | allocate(REG={EXTERN2,$1}) | %[a] | dee $1 |
|
||||
loe adp ste $1==$3 && $2==1 | |
|
||||
remove(indirects)
|
||||
"inc ($1)"
|
||||
|
|
@ -1135,7 +1295,7 @@ cii | CXREG DXREG X_ACC |
|
|||
erase(%[3]) | %[3] | |
|
||||
ciu | | | | cuu |
|
||||
cui | | | | cuu |
|
||||
cuu | CXREG BXREG X_ACC |
|
||||
cuu | CXREG DXREG X_ACC |
|
||||
remove(ALL)
|
||||
"call .cuu"
|
||||
erase(%[3]) | %[3] | |
|
||||
|
|
@ -1461,18 +1621,18 @@ aar $1==2 | halfindir X_ACC X_ADDREG |
|
|||
lae sar defined(rom(1,3)) | | | | lae $1 aar $2 sti rom(1,3) |
|
||||
lae lar defined(rom(1,3)) | | | | lae $1 aar $2 loi rom(1,3) |
|
||||
aar !defined($1) | | remove(ALL)
|
||||
"call .iaar" | di | |
|
||||
sar $1==2 | X_SIREG X_ACC X_DIREG |
|
||||
"call .iaar" | bx | |
|
||||
sar $1==2 | X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"call .sar2"
|
||||
erase(%[1]) erase(%[2]) erase(%[3])
|
||||
erase(%[1]) erase(%[2])
|
||||
| | |
|
||||
sar !defined($1) | | remove(ALL)
|
||||
"call .isar" | | |
|
||||
lar $1==2 | X_DIREG X_ACC X_SIREG |
|
||||
lar $1==2 | X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"call .lar2"
|
||||
erase(%[1]) erase(%[2]) erase(%[3])
|
||||
erase(%[1]) erase(%[2])
|
||||
| | |
|
||||
lar !defined($1) | | remove(ALL)
|
||||
"call .ilar" | | |
|
||||
|
|
@ -1539,7 +1699,7 @@ cmf !defined($1) | X_CXREG |
|
|||
"call .cmf" erase(%[1]) | | |
|
||||
|
||||
/* The costs with cmp are the cost of the 8086 cmp instruction */
|
||||
cmp | NO REG rmorconst |
|
||||
cmp | NO register rmorconst |
|
||||
allocate(REG = {ANYCON,0})
|
||||
"cmp %[1],%[2]"
|
||||
"je 2f"
|
||||
|
|
@ -1549,7 +1709,7 @@ cmp | NO REG rmorconst |
|
|||
"1:\tdec %[a]\n2:"
|
||||
setcc(%[a])
|
||||
erase(%[a]) | %[a] | |(4,4)
|
||||
... | rmorconst REG |
|
||||
... | rmorconst register |
|
||||
allocate(REG = {ANYCON,0})
|
||||
"cmp %[1],%[2]"
|
||||
"je 2f"
|
||||
|
|
@ -2080,28 +2240,59 @@ cai | rm | remove(ALL)
|
|||
"call %[1]" | | |
|
||||
lfr $1==2 | | | ax | |
|
||||
lfr $1==4 | | | dx ax | |
|
||||
lfr $1==6 | | | bx dx ax | |
|
||||
lfr $1==8 | | | cx bx dx ax | |
|
||||
lfr $1==6 | | remove(ALL)
|
||||
"call .lfr6" | | |
|
||||
lfr $1==8 | | remove(ALL)
|
||||
"call .lfr8" | | |
|
||||
ret $1==0 | | remove(ALL)
|
||||
#ifdef REGVARS
|
||||
return
|
||||
#else
|
||||
"mov sp,bp"
|
||||
"pop bp"
|
||||
"ret" | | |
|
||||
"ret"
|
||||
#endif
|
||||
| | |
|
||||
ret $1==2 | ACC |
|
||||
remove(ALL)
|
||||
#ifdef REGVARS
|
||||
return
|
||||
#else
|
||||
"mov sp,bp"
|
||||
"pop bp"
|
||||
"ret" | | |
|
||||
"ret"
|
||||
#endif
|
||||
| | |
|
||||
ret $1==4 | ACC DXREG |
|
||||
remove(ALL)
|
||||
#ifdef REGVARS
|
||||
return
|
||||
#else
|
||||
"mov sp,bp"
|
||||
"pop bp"
|
||||
"ret" | | |
|
||||
ret $1==6 | ACC DXREG BXREG |
|
||||
"ret"
|
||||
#endif
|
||||
| | |
|
||||
ret $1==6 | STACK |
|
||||
"call .ret6"
|
||||
#ifdef REGVARS
|
||||
return
|
||||
#else
|
||||
"mov sp,bp"
|
||||
"pop bp"
|
||||
"ret" | | |
|
||||
ret $1==8 | ACC DXREG BXREG CXREG |
|
||||
"ret"
|
||||
#endif
|
||||
| | |
|
||||
ret $1==8 | STACK |
|
||||
"call .ret8"
|
||||
#ifdef REGVARS
|
||||
return
|
||||
#else
|
||||
"mov sp,bp"
|
||||
"pop bp"
|
||||
"ret" | | |
|
||||
"ret"
|
||||
#endif
|
||||
| | |
|
||||
|
||||
/************************************************
|
||||
* Group 15 : Miscellaneous instructions *
|
||||
|
|
@ -2109,11 +2300,11 @@ ret $1==8 | ACC DXREG BXREG CXREG |
|
|||
|
||||
asp $1==2 | nocoercions : a_word | | | |
|
||||
... | STACK |
|
||||
allocate(IREG) /* GENREG may contain lfr area */
|
||||
allocate(BXREG)
|
||||
"pop %[a]" erase(%[a]) samecc | | | (1,8)
|
||||
asp $1==4 | nocoercions : a_word a_word | | | |
|
||||
... | STACK |
|
||||
allocate(IREG) /* GENREG may contain lfr area */
|
||||
allocate(BXREG)
|
||||
"pop %[a]" "pop %[a]"
|
||||
erase(%[a]) samecc | | | (2,16)
|
||||
asp $1==0-2 | | /* Anything will do */ | bp | |
|
||||
|
|
@ -2130,49 +2321,49 @@ ass !defined($1)| rm rmorconst |
|
|||
"jne .unknown"
|
||||
"add sp,%[2]" | | |
|
||||
blm $1==0 | | | | asp 4 |
|
||||
blm $1>0 | X_DIREG X_SIREG |
|
||||
blm $1>0 | |
|
||||
remove(ALL)
|
||||
allocate(CXREG={ANYCON,$1/2})
|
||||
"rep movs"
|
||||
erase(%[1]) erase(%[2]) erase(%[a])
|
||||
"call .blm"
|
||||
erase(%[a])
|
||||
| | |
|
||||
bls $1==2 | X_CXREG X_DIREG X_SIREG |
|
||||
bls $1==2 | X_CXREG |
|
||||
remove(ALL)
|
||||
"sar cx,1"
|
||||
"rep movs"
|
||||
erase(%[1]) erase(%[2]) erase(%[3])
|
||||
"call .blm"
|
||||
erase(%[1])
|
||||
| | |
|
||||
bls !defined($1)| rm-CXREG-DIREG-SIREG X_CXREG X_DIREG X_SIREG |
|
||||
bls !defined($1)| rm-CXREG X_CXREG |
|
||||
remove(ALL)
|
||||
"cmp %[1],2"
|
||||
"jne .unknown"
|
||||
"sar cx,1"
|
||||
"rep movs"
|
||||
erase(%[2]) erase(%[3]) erase(%[4])
|
||||
"call .blm"
|
||||
erase(%[2])
|
||||
| | |
|
||||
csa $1==2 | X_SIREG X_BXREG |
|
||||
csa $1==2 | X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"jmp .csa2"
|
||||
erase(%[1]) erase(%[2]) | | |
|
||||
csa !defined($1)| rm-SIREG-BXREG X_SIREG X_BXREG |
|
||||
csa !defined($1)| rm-BXREG-ACC X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"cmp %[1],2"
|
||||
"jne .unknown"
|
||||
"jmp .csa2"
|
||||
erase(%[2]) erase(%[3]) | | |
|
||||
csb $1==2 | X_SIREG X_DXREG |
|
||||
csb $1==2 | X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"jmp .csb2"
|
||||
erase(%[1]) erase(%[2]) | | |
|
||||
csb !defined($1)| rm-SIREG-DIREG X_SIREG X_DXREG |
|
||||
csb !defined($1)| rm-BXREG-ACC X_BXREG X_ACC |
|
||||
remove(ALL)
|
||||
"cmp %[1],2"
|
||||
"jne .unknown"
|
||||
"jmp .csb2"
|
||||
erase(%[2]) erase(%[3]) | | |
|
||||
dup $1==2 | REG | | %[1] %[1] | |
|
||||
dup $1==2 | regorconst | | %[1] %[1] | |
|
||||
... | ACC1 | | %[1] %[1] | |
|
||||
dup $1==4 | REG REG | | %[2] %[1] %[2] %[1] | |
|
||||
dup $1==4 | regorconst regorconst | | %[2] %[1] %[2] %[1] | |
|
||||
dup | | remove(ALL)
|
||||
move({ANYCON, $1}, cx)
|
||||
"call .dup"
|
||||
|
|
@ -2218,9 +2409,9 @@ mon | X_ACC |
|
|||
"call .mon" | | |
|
||||
nop | | remove(ALL)
|
||||
"call .nop" | | |
|
||||
rck $1==2 | SIREG ACC |
|
||||
rck $1==2 | BXREG ACC |
|
||||
"call .rck" | ax | |
|
||||
rck !defined($1)| rm-SIREG-ACC SIREG ACC |
|
||||
rck !defined($1)| rm-BXREG-ACC BXREG ACC |
|
||||
"cmp %[1],2"
|
||||
"jne .unknown"
|
||||
"call .rck" | ax | |
|
||||
|
|
@ -2299,15 +2490,15 @@ MOVES:
|
|||
(ACC, EXTERN1, "movb %[2],%[1.1]" samecc, (3,16))
|
||||
(EXTERN2, ACC, "mov %[2],%[1]" samecc, (3,14))
|
||||
(EXTERN1, ACC1, "movb %[2],%[1]" samecc, (3,14))
|
||||
(rm, REG, "mov %[2],%[1]" samecc, (2,2) + %[1] )
|
||||
(rm, register, "mov %[2],%[1]" samecc, (2,2) + %[1] )
|
||||
(anyreg, dest, "mov %[2],%[1]" samecc, (2,3) + %[2] )
|
||||
(halfindir, REG, "lea %[2],%[1]" samecc, (2,3) + %[1] )
|
||||
(halfindir, register, "lea %[2],%[1]" samecc, (2,3) + %[1] )
|
||||
(rm1, REG1, "movb %[2],%[1]" samecc, (2,2) + %[1] )
|
||||
(REG1, rm1, "movb %[2],%[1]" samecc, (2,3) + %[2] )
|
||||
(GENREG, rm1, "movb %[2],%[1.1]" samecc, (2,3) + %[2] )
|
||||
(ANYCON %[val]==0, REG, "xor %[2],%[2]" setcc(%[2]), (2,3))
|
||||
(ANYCON %[val]==0, register, "xor %[2],%[2]" setcc(%[2]), (2,3))
|
||||
(ANYCON %[val]==0, REG1, "xorb %[2],%[2]" setcc(%[2]),(2,3))
|
||||
(const, REG, "mov %[2],%[1]" samecc, (3,4))
|
||||
(const, register, "mov %[2],%[1]" samecc, (3,4))
|
||||
(const, REG1, "movb %[2],%[1]" samecc, (2,4))
|
||||
(const, dest, "mov %[2],%[1]" samecc, (4,4) + %[2] )
|
||||
(const, rm1, "movb %[2],%[1]" samecc, (3,4) + %[2] )
|
||||
|
|
@ -2326,7 +2517,7 @@ STACKS:
|
|||
(const, REG, move(%[1],%[a])
|
||||
"push %[a]"
|
||||
samecc , (4,11) )
|
||||
(const, , ".data\n1: .word %[1]\n.text"
|
||||
(const, , ".sect .data\n1: .data2 %[1]\n.sect text"
|
||||
"push (1b)"
|
||||
samecc , (6,24) )
|
||||
(rm1, GENREG, move({ANYCON,0},%[a])
|
||||
|
|
@ -2346,9 +2537,6 @@ STACKS:
|
|||
(bpreg_off, , move(%[1],%[1.reg])
|
||||
"push %[1.reg]"
|
||||
samecc , ( 6,17) + %[1] )
|
||||
(ADDR_LOCAL %[ind]==0, ,
|
||||
"push bp"
|
||||
samecc , ( 1,10) )
|
||||
(halfindir, REG,move(%[1],%[a])
|
||||
"push %[a]"
|
||||
samecc , ( 6,17) + %[1] )
|
||||
|
|
|
|||
Loading…
Reference in a new issue