Don't write out constant data as big-endian! Some other cleanups.
--HG-- branch : dtrg-videocore
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98e745d04c
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472f778342
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@ -30,4 +30,3 @@ typedef unsigned long quad;
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#undef VALWIDTH
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#define VALWIDTH 8
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#define FIXUPFLAGS (RELBR | RELWR)
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@ -10,9 +10,7 @@
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int framesize;
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/*
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* machine dependent back end routines for the Zilog Z80.
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*/
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/* Write out a constant data section. */
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con_part(int sz, word w)
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{
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@ -20,19 +18,12 @@ con_part(int sz, word w)
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part_size++;
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if (part_size == TEM_WSIZE)
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part_flush();
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if (sz == 1) {
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w &= 0xFF;
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w <<= 8*(3-part_size);
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part_word |= w;
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} else if (sz == 2) {
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w &= 0xFFFF;
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if (part_size == 0) {
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/* Shift 8 for m68k2, 16 otherwise */
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w <<= 4 * TEM_WSIZE;
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}
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if (sz == 1 || sz == 2) {
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w &= (sz == 1 ? 0xFF : 0xFFFF);
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w <<= 8 * part_size;
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part_word |= w;
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} else {
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assert(sz == TEM_WSIZE);
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assert(sz == 4);
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part_word = w;
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}
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part_size += sz;
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@ -40,7 +31,6 @@ con_part(int sz, word w)
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con_mult(word sz)
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{
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if (argval != 4)
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fatal("bad icon/ucon size");
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fprintf(codefile,".data4 %s\n", str);
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@ -48,9 +38,9 @@ con_mult(word sz)
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#define CODE_GENERATOR
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#define IEEEFLOAT
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#define FL_MSL_AT_LOW_ADDRESS 1
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#define FL_MSW_AT_LOW_ADDRESS 1
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#define FL_MSB_AT_LOW_ADDRESS 1
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#define FL_MSL_AT_LOW_ADDRESS 0
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#define FL_MSW_AT_LOW_ADDRESS 0
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#define FL_MSB_AT_LOW_ADDRESS 0
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#include <con_float>
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void prolog(full nlocals)
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@ -149,7 +139,7 @@ static void saveloadregs(const char* op)
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if (minreg != 32)
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{
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fprintf(codefile, "! saving registers %d to %d\n", minreg, maxreg);
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assert(minreg == 6);
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assert((minreg == 6) || (minreg == 16));
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fprintf(codefile, "%s r6-r%d\n", op, maxreg);
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}
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@ -221,6 +221,12 @@ STACKINGRULES
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comment {LABEL, "push stackable"}
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push %1
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from OP+GPRI to STACK
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uses GPR0
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gen
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move %1, %a
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push %a
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from OP+GPRI to STACK
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gen
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comment {LABEL, "push via scratch"}
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