some added patterns for M688881, and a fix
This commit is contained in:
ceriel
parent
4dfa2310fc
commit
56e985729d
4 changed files with 296 additions and 8 deletions
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@ -2845,6 +2845,11 @@ with any4-sconsts any4-sconsts
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kills all_indir, LOCAL %bd==$1
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gen move %1, {LOCAL, $1}
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move %2, {LOCAL, $1+4}
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#if TBL68881
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with exact FD_REG
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kills all_indir, LOCAL %bd==$1
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gen fmove_d %1, {LOCAL, $1}
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#endif
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with exact STACK
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kills all_indir, LOCAL %bd==$1
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gen move_l {post_inc4, sp}, {LOCAL,$1}
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@ -2855,6 +2860,11 @@ with any4-sconsts any4-sconsts
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kills posextern
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gen move %1, {absolute4, $1}
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move %2, {absolute4, $1+4}
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#if TBL68881
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with exact FD_REG
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kills posextern
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gen fmove_d %1, {absolute4, $1}
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#endif
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with exact STACK
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kills posextern
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gen move_l {post_inc4, sp}, {absolute4,$1}
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@ -3018,6 +3028,68 @@ with shconreg DD_REG
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*/
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#if TBL68881
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pat adf stl $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat adf sdl $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat sbf stl $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving stl $2
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pat sbf sdl $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sdl $2
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pat mlf stl $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat mlf sdl $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat dvf stl $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving stl $2
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pat dvf sdl $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sdl $2
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pat ngf stl $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving stl $2
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pat ngf sdl $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sdl $2
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pat adf ste $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat adf sde $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat sbf ste $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving ste $2
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pat sbf sde $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sde $2
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pat mlf ste $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat mlf sde $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat dvf ste $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving ste $2
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pat dvf sde $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sde $2
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pat ngf ste $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving ste $2
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pat ngf sde $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sde $2
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pat adf $1==4
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with FS_REG STACK
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gen fadd_s {indirect4,sp},%1
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@ -4146,13 +4218,13 @@ with DD_REG AA_REG AA_REG
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2:
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pat csa $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csa"}
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pat csb $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csb"}
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@ -2845,6 +2845,11 @@ with any4-sconsts any4-sconsts
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kills all_indir, LOCAL %bd==$1
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gen move %1, {LOCAL, $1}
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move %2, {LOCAL, $1+4}
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#if TBL68881
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with exact FD_REG
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kills all_indir, LOCAL %bd==$1
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gen fmove_d %1, {LOCAL, $1}
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#endif
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with exact STACK
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kills all_indir, LOCAL %bd==$1
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gen move_l {post_inc4, sp}, {LOCAL,$1}
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@ -2855,6 +2860,11 @@ with any4-sconsts any4-sconsts
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kills posextern
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gen move %1, {absolute4, $1}
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move %2, {absolute4, $1+4}
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#if TBL68881
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with exact FD_REG
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kills posextern
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gen fmove_d %1, {absolute4, $1}
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#endif
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with exact STACK
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kills posextern
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gen move_l {post_inc4, sp}, {absolute4,$1}
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@ -3018,6 +3028,68 @@ with shconreg DD_REG
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*/
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#if TBL68881
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pat adf stl $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat adf sdl $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat sbf stl $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving stl $2
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pat sbf sdl $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sdl $2
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pat mlf stl $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat mlf sdl $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat dvf stl $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving stl $2
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pat dvf sdl $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sdl $2
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pat ngf stl $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving stl $2
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pat ngf sdl $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sdl $2
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pat adf ste $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat adf sde $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat sbf ste $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving ste $2
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pat sbf sde $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sde $2
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pat mlf ste $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat mlf sde $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat dvf ste $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving ste $2
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pat dvf sde $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sde $2
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pat ngf ste $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving ste $2
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pat ngf sde $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sde $2
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pat adf $1==4
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with FS_REG STACK
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gen fadd_s {indirect4,sp},%1
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@ -4146,13 +4218,13 @@ with DD_REG AA_REG AA_REG
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2:
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pat csa $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csa"}
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pat csb $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csb"}
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@ -2845,6 +2845,11 @@ with any4-sconsts any4-sconsts
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kills all_indir, LOCAL %bd==$1
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gen move %1, {LOCAL, $1}
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move %2, {LOCAL, $1+4}
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#if TBL68881
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with exact FD_REG
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kills all_indir, LOCAL %bd==$1
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gen fmove_d %1, {LOCAL, $1}
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#endif
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with exact STACK
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kills all_indir, LOCAL %bd==$1
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gen move_l {post_inc4, sp}, {LOCAL,$1}
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@ -2855,6 +2860,11 @@ with any4-sconsts any4-sconsts
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kills posextern
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gen move %1, {absolute4, $1}
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move %2, {absolute4, $1+4}
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#if TBL68881
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with exact FD_REG
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kills posextern
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gen fmove_d %1, {absolute4, $1}
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#endif
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with exact STACK
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kills posextern
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gen move_l {post_inc4, sp}, {absolute4,$1}
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@ -3018,6 +3028,68 @@ with shconreg DD_REG
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*/
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#if TBL68881
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pat adf stl $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat adf sdl $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat sbf stl $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving stl $2
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pat sbf sdl $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sdl $2
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pat mlf stl $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat mlf sdl $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat dvf stl $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving stl $2
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pat dvf sdl $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sdl $2
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pat ngf stl $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving stl $2
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pat ngf sdl $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sdl $2
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pat adf ste $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat adf sde $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat sbf ste $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving ste $2
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pat sbf sde $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sde $2
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pat mlf ste $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat mlf sde $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat dvf ste $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving ste $2
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pat dvf sde $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sde $2
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pat ngf ste $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving ste $2
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pat ngf sde $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sde $2
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pat adf $1==4
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with FS_REG STACK
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gen fadd_s {indirect4,sp},%1
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@ -4146,13 +4218,13 @@ with DD_REG AA_REG AA_REG
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2:
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pat csa $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csa"}
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pat csb $1==4
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with any4 any4 STACK
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with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
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gen move %1,a0
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move %2,d0
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jmp {absolute4, ".csb"}
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@ -2845,6 +2845,11 @@ with any4-sconsts any4-sconsts
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kills all_indir, LOCAL %bd==$1
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gen move %1, {LOCAL, $1}
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move %2, {LOCAL, $1+4}
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#if TBL68881
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with exact FD_REG
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kills all_indir, LOCAL %bd==$1
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gen fmove_d %1, {LOCAL, $1}
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#endif
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with exact STACK
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kills all_indir, LOCAL %bd==$1
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gen move_l {post_inc4, sp}, {LOCAL,$1}
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@ -2855,6 +2860,11 @@ with any4-sconsts any4-sconsts
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kills posextern
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gen move %1, {absolute4, $1}
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move %2, {absolute4, $1+4}
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#if TBL68881
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with exact FD_REG
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kills posextern
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gen fmove_d %1, {absolute4, $1}
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#endif
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with exact STACK
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kills posextern
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gen move_l {post_inc4, sp}, {absolute4,$1}
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@ -3018,6 +3028,68 @@ with shconreg DD_REG
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*/
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#if TBL68881
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pat adf stl $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat adf sdl $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat sbf stl $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving stl $2
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pat sbf sdl $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sdl $2
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pat mlf stl $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving stl $2
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pat mlf sdl $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sdl $2
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pat dvf stl $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving stl $2
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pat dvf sdl $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sdl $2
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pat ngf stl $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving stl $2
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pat ngf sdl $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sdl $2
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pat adf ste $1==4
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with FS_REG STACK
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gen fadd_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat adf sde $1==8
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with FD_REG STACK
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gen fadd_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat sbf ste $1==4
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with FS_REG FS_REG STACK
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gen fsub %1,%2 yields %2 leaving ste $2
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pat sbf sde $1==8
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with FD_REG FD_REG STACK
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gen fsub %1,%2 yields %2 leaving sde $2
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pat mlf ste $1==4
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with FS_REG STACK
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gen fmul_s {post_inc4,sp},%1 yields %1 leaving ste $2
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pat mlf sde $1==8
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with FD_REG STACK
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gen fmul_d {post_inc4,sp},%1 yields %1 leaving sde $2
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pat dvf ste $1==4
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with FS_REG FS_REG STACK
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gen fdiv %1,%2 yields %2 leaving ste $2
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pat dvf sde $1==8
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with FD_REG FD_REG STACK
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gen fdiv %1,%2 yields %2 leaving sde $2
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pat ngf ste $1==4
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with FS_REG STACK
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gen fneg %1 yields %1 leaving ste $2
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pat ngf sde $1==8
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with FD_REG STACK
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gen fneg %1 yields %1 leaving sde $2
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pat adf $1==4
|
||||
with FS_REG STACK
|
||||
gen fadd_s {indirect4,sp},%1
|
||||
|
|
@ -4146,13 +4218,13 @@ with DD_REG AA_REG AA_REG
|
|||
2:
|
||||
|
||||
pat csa $1==4
|
||||
with any4 any4 STACK
|
||||
with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
|
||||
gen move %1,a0
|
||||
move %2,d0
|
||||
jmp {absolute4, ".csa"}
|
||||
|
||||
pat csb $1==4
|
||||
with any4 any4 STACK
|
||||
with any4 D_REG+LOCAL+const+ILOCAL+absolute4 STACK
|
||||
gen move %1,a0
|
||||
move %2,d0
|
||||
jmp {absolute4, ".csb"}
|
||||
|
|
|
|||
Loading…
Reference in a new issue