diff --git a/mach/mips/as/instructions.dat b/mach/mips/as/instructions.dat index 98c4dbbe9..10619f8b3 100644 --- a/mach/mips/as/instructions.dat +++ b/mach/mips/as/instructions.dat @@ -234,8 +234,8 @@ 01001100000001101 "suxc1" FD=fpr ',' RT=gpr '(' RS=gpr ')' 111001 "swc1" FT=fpr ',' IMM=e16 '(' RS=gpr ')' 01001100000001000 "swxc1" FD=fpr ',' RT=gpr '(' RS=gpr ')' -01000100000001001 "trunc" ".l" F=fmt FS=fpr ',' FD=fpr -01000100000001101 "trunc" ".w" F=fmt FS=fpr ',' FD=fpr +01000100000001001 "trunc" ".l" F=fmt FD=fpr ',' FS=fpr +01000100000001101 "trunc" ".w" F=fmt FD=fpr ',' FS=fpr # Generic coprocessor instructions. diff --git a/mach/mips/as/mach4.c b/mach/mips/as/mach4.c index 443ca1e49..0befb2dc1 100644 --- a/mach/mips/as/mach4.c +++ b/mach/mips/as/mach4.c @@ -2,10 +2,12 @@ | OP_LI GPR ',' extabsexp { word_t reg = $2; - word_t val = $4; + uint32_t val = $4; - if ((val < -0x8000) || (val > 0xffff)) + if (((int32_t)val >= -0x8000) && ((int32_t)val <= 0x7fff)) emit4(0x24000000 | (reg<<16) | (val & 0xffff)); /* addiu reg, zero, value */ + else if (val <= 0xffff) + emit4(0x34000000 | (reg<<16) | val); /* ori reg, zero, value */ else { emit4(0x3c000000 | (reg<<16) | (val>>16)); /* lui reg, value */ @@ -16,7 +18,7 @@ { word_t reg = $2; word_t type = $4.typ & S_TYP; - word_t val = $4.val; + uint32_t val = $4.val; if (type != S_ABS) newrelo($4.typ, RELO2HI | FIXUPFLAGS);