*** empty log message ***
This commit is contained in:
keie
parent
68e92c8319
commit
57acada057
5
mach/i86/as/READ_ME
Normal file
5
mach/i86/as/READ_ME
Normal file
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@ -0,0 +1,5 @@
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The mach?.c files in this directory were made for an earlier version of
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the universal assembler and are too dependent on its innards.
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I have no idea in what way they should be changed.
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Duk Bekema
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10
mach/i86/as/mach0.c
Normal file
10
mach/i86/as/mach0.c
Normal file
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@ -0,0 +1,10 @@
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#define DUK
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#define RCSID0 "$Header$"
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/*
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* INTEL 8086 options
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*/
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#define THREE_PASS /* branch and offset optimization */
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#define LISTING /* enable listing facilities */
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#define RELOCATION
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#define NOLD
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37
mach/i86/as/mach1.c
Normal file
37
mach/i86/as/mach1.c
Normal file
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@ -0,0 +1,37 @@
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#define RCSID1 "$Header$"
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/*
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* INTEL 8086 C declarations
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*/
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#define low6(z) (z & 077)
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#define fit6(z) (low6(z) == z)
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extern int mrg_1,mrg_2;
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extern expr_t exp_1,exp_2;
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#ifndef ASLD
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extern int rel_1, rel_2;
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#endif
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#ifndef extern
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extern char sr_m[8];
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#else
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char sr_m[8] = {
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-1, -1, -1, 7, -1, 6, 4, 5
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};
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#endif
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#ifndef extern
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extern char dr_m[8][8];
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#else
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char dr_m[8][8] = {
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, 0, 1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, 2, 3,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1
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};
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#endif
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28
mach/i86/as/mach2.c
Normal file
28
mach/i86/as/mach2.c
Normal file
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@ -0,0 +1,28 @@
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#define RCSID2 "$Header$"
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/*
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* INTEL 8086 tokens
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*/
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%token <y_word> R16
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%token <y_word> R8
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%token <y_word> RSEG
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%token <y_word> PREFIX
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%token <y_word> NOOP_1
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%token <y_word> NOOP_2
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%token <y_word> JOP
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%token <y_word> PUSHOP
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%token <y_word> IOOP
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%token <y_word> ADDOP
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%token <y_word> ROLOP
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%token <y_word> INCOP
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%token <y_word> NOTOP
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%token <y_word> CALLOP
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%token <y_word> CALFOP
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%token <y_word> LEAOP
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%token <y_word> ESC
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%token <y_word> INT
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%token <y_word> RET
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%token <y_word> XCHG
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%token <y_word> TEST
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%token <y_word> MOV
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176
mach/i86/as/mach3.c
Normal file
176
mach/i86/as/mach3.c
Normal file
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@ -0,0 +1,176 @@
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#define RCSID3 "$Header$"
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/*
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* INTEL 8086 keywords
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*/
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0, R16, 0, "ax",
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0, R16, 1, "cx",
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0, R16, 2, "dx",
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0, R16, 3, "bx",
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0, R16, 4, "sp",
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0, R16, 5, "bp",
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0, R16, 6, "si",
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0, R16, 7, "di",
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0, R8, 0, "al",
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0, R8, 1, "cl",
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0, R8, 2, "dl",
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0, R8, 3, "bl",
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0, R8, 4, "ah",
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0, R8, 5, "ch",
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0, R8, 6, "dh",
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0, R8, 7, "bh",
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0, RSEG, 0, "es",
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0, RSEG, 1, "cs",
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0, RSEG, 2, "ss",
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0, RSEG, 3, "ds",
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0, PREFIX, 046, "eseg",
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0, PREFIX, 056, "cseg",
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0, PREFIX, 066, "sseg",
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0, PREFIX, 076, "dseg",
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0, PREFIX, 0360, "lock",
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0, PREFIX, 0362, "rep",
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0, PREFIX, 0362, "repne",
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0, PREFIX, 0362, "repnz",
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0, PREFIX, 0363, "repe",
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0, PREFIX, 0363, "repz",
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0, NOOP_1, 047, "daa",
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0, NOOP_1, 057, "das",
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0, NOOP_1, 067, "aaa",
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0, NOOP_1, 077, "aas",
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0, NOOP_1, 0220, "nop",
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0, NOOP_1, 0230, "cbw",
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0, NOOP_1, 0231, "cwd",
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0, NOOP_1, 0233, "wait",
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0, NOOP_1, 0234, "pushf",
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0, NOOP_1, 0235, "popf",
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0, NOOP_1, 0236, "sahf",
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0, NOOP_1, 0237, "lahf",
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0, NOOP_1, 0244, "movsb",
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0, NOOP_1, 0245, "movs",
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0, NOOP_1, 0246, "cmpsb",
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0, NOOP_1, 0247, "cmps",
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0, NOOP_1, 0252, "stosb",
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0, NOOP_1, 0253, "stos",
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0, NOOP_1, 0254, "lodsb",
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0, NOOP_1, 0255, "lods",
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0, NOOP_1, 0256, "scasb",
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0, NOOP_1, 0257, "scas",
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0, NOOP_1, 0316, "into",
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0, NOOP_1, 0317, "iret",
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0, NOOP_1, 0327, "xlat",
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0, NOOP_1, 0364, "hlt",
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0, NOOP_1, 0365, "cmc",
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0, NOOP_1, 0370, "clc",
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0, NOOP_1, 0371, "stc",
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0, NOOP_1, 0372, "cli",
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0, NOOP_1, 0373, "sti",
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0, NOOP_1, 0374, "cld",
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0, NOOP_1, 0375, "std",
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0, NOOP_2, 0324+012<<8, "aam",
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0, NOOP_2, 0325+012<<8, "aad",
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0, JOP, 0340, "loopne",
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0, JOP, 0340, "loopnz",
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0, JOP, 0341, "loope",
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0, JOP, 0341, "loopz",
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0, JOP, 0342, "loop",
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0, JOP, 0343, "jcxz",
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0, JOP, 0160, "jo",
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0, JOP, 0161, "jno",
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0, JOP, 0162, "jb",
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0, JOP, 0162, "jnae",
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0, JOP, 0163, "jae",
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0, JOP, 0163, "jnb",
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0, JOP, 0164, "je",
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0, JOP, 0164, "jz",
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0, JOP, 0165, "jne",
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0, JOP, 0165, "jnz",
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0, JOP, 0166, "jbe",
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0, JOP, 0166, "jna",
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0, JOP, 0167, "ja",
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0, JOP, 0167, "jnbe",
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0, JOP, 0170, "js",
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0, JOP, 0171, "jns",
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0, JOP, 0172, "jp",
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0, JOP, 0172, "jpe",
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0, JOP, 0173, "jnp",
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0, JOP, 0173, "jpo",
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0, JOP, 0174, "jl",
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0, JOP, 0174, "jnge",
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0, JOP, 0175, "jge",
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0, JOP, 0175, "jnl",
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0, JOP, 0176, "jle",
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0, JOP, 0176, "jng",
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0, JOP, 0177, "jg",
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0, JOP, 0177, "jnle",
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0, PUSHOP, 0, "push",
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0, PUSHOP, 1, "pop",
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0, IOOP, 0344, "inb",
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0, IOOP, 0345, "in",
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0, IOOP, 0346, "outb",
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0, IOOP, 0347, "out",
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0, ADDOP, 000, "addb",
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0, ADDOP, 001, "add",
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0, ADDOP, 010, "orb",
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0, ADDOP, 011, "or",
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0, ADDOP, 020, "adcb",
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0, ADDOP, 021, "adc",
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0, ADDOP, 030, "sbbb",
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0, ADDOP, 031, "sbb",
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0, ADDOP, 040, "andb",
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0, ADDOP, 041, "and",
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0, ADDOP, 050, "subb",
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0, ADDOP, 051, "sub",
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0, ADDOP, 060, "xorb",
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0, ADDOP, 061, "xor",
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0, ADDOP, 070, "cmpb",
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0, ADDOP, 071, "cmp",
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0, ROLOP, 000, "rolb",
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0, ROLOP, 001, "rol",
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0, ROLOP, 010, "rorb",
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0, ROLOP, 011, "ror",
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0, ROLOP, 020, "rclb",
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0, ROLOP, 021, "rcl",
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0, ROLOP, 030, "rcrb",
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0, ROLOP, 031, "rcr",
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0, ROLOP, 040, "salb",
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0, ROLOP, 040, "shlb",
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0, ROLOP, 041, "sal",
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0, ROLOP, 041, "shl",
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0, ROLOP, 050, "shrb",
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0, ROLOP, 051, "shr",
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0, ROLOP, 070, "sarb",
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0, ROLOP, 071, "sar",
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0, INCOP, 000, "incb",
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0, INCOP, 001, "inc",
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0, INCOP, 010, "decb",
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0, INCOP, 011, "dec",
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0, NOTOP, 020, "notb",
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0, NOTOP, 021, "not",
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0, NOTOP, 030, "negb",
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0, NOTOP, 031, "neg",
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0, NOTOP, 040, "mulb",
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0, NOTOP, 041, "mul",
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0, NOTOP, 050, "imulb",
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0, NOTOP, 051, "imul",
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0, NOTOP, 060, "divb",
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0, NOTOP, 061, "div",
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0, NOTOP, 070, "idivb",
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0, NOTOP, 071, "idiv",
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0, CALLOP, 020+(0350<<8), "call",
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0, CALLOP, 040+(0351<<8), "jmp",
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0, CALFOP, 030+(0232<<8), "callf",
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0, CALFOP, 050+(0352<<8), "jmpf",
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0, LEAOP, 0215, "lea",
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0, LEAOP, 0304, "les",
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0, LEAOP, 0305, "lds",
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0, ESC, 0, "esc",
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0, INT, 0, "int",
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0, RET, 0303, "ret",
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0, RET, 0313, "retf",
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0, XCHG, 0, "xchgb",
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0, XCHG, 1, "xchg",
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0, TEST, 0, "testb",
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0, TEST, 1, "test",
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0, MOV, 0, "movb",
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0, MOV, 1, "mov",
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132
mach/i86/as/mach4.c
Normal file
132
mach/i86/as/mach4.c
Normal file
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@ -0,0 +1,132 @@
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#define RCSID4 "$Header$"
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/*
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* (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
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*
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* This product is part of the Amsterdam Compiler Kit.
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*
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||||
* Permission to use, sell, duplicate or disclose this software must be
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* obtained in writing. Requests for such permissions may be sent to
|
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*
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||||
* Dr. Andrew S. Tanenbaum
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* Wiskundig Seminarium
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* Vrije Universiteit
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* Postbox 7161
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* 1007 MC Amsterdam
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* The Netherlands
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*
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||||
*/
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operation
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: prefix oper
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;
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prefix : /* empty */
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| prefix PREFIX
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{ emit1($2);}
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;
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oper : NOOP_1
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{ emit1($1);}
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| NOOP_2
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{ emit2($1);}
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| JOP expr
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{ branch($1,$2);}
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| PUSHOP ea_1
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{ pushop($1);}
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| IOOP expr
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{ emit1($1);
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#ifdef RELOCATION
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newrelo($2.typ, RELO1);
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#endif
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emit1($2.val);
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}
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| IOOP R16
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{ if ($2!=2) serror("register error");
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emit1($1+010);
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}
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| ADDOP ea_ea
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{ addop($1);}
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| ROLOP ea_ea
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{ rolop($1);}
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| INCOP ea_1
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{ incop($1);}
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| NOTOP ea_1
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{ regsize($1); emit1(0366|($1&1)); ea_1($1&070);}
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| CALLOP ea_1
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{ callop($1&0xFFFF);}
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| CALFOP expr ':' expr
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{ emit1($1>>8);
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#ifdef RELOCATION
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newrelo($4.typ, RELO2);
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#endif
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emit2($4.val);
|
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#ifdef RELOCATION
|
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newrelo($2.typ, RELO2);
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#endif
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emit2($2.val);
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}
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| CALFOP mem
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{ emit1(0377); ea_2($1&0xFF);}
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| LEAOP R16 ',' mem
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{ emit1($1); ea_2($2<<3);}
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| ESC absexp ',' mem
|
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{ fit(fit6($2));
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emit1(0330 | $2>>3);
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ea_2(($2&7)<<3);
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}
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||||
| INT absexp
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{ if ($2==3)
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emit1(0314);
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else {
|
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emit1(0315); emit1($2);
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||||
}
|
||||
}
|
||||
| RET
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||||
{ emit1($1);}
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| RET expr
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||||
{ emit1($1-1);
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||||
#ifdef RELOCATION
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||||
newrelo($2.typ, RELO2);
|
||||
#endif
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||||
emit2($2.val);
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||||
}
|
||||
| XCHG ea_ea
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||||
{ xchg($1);}
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||||
| TEST ea_ea
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||||
{ test($1);}
|
||||
| MOV ea_ea
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||||
{ mov($1);}
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mem : '(' expr ')'
|
||||
{ mrg_2 = 6; exp_2 = $2;
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RELOMOVE(rel_2, relonami);
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||||
}
|
||||
| bases
|
||||
{ exp_2.val = 0; exp_2.typ = S_ABS; indexed();}
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| expr bases
|
||||
{ exp_2 = $1; indexed();
|
||||
RELOMOVE(rel_2, relonami);
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||||
}
|
||||
;
|
||||
bases : '(' R16 ')'
|
||||
{ mrg_2 = sr_m[$2];}
|
||||
| '(' R16 ')' '(' R16 ')'
|
||||
{ mrg_2 = dr_m[$2][$5];}
|
||||
;
|
||||
ea_2 : mem
|
||||
| R8
|
||||
{ mrg_2 = $1 | 0300;}
|
||||
| R16
|
||||
{ mrg_2 = $1 | 0310;}
|
||||
| RSEG
|
||||
{ mrg_2 = $1 | 020;}
|
||||
| expr
|
||||
{ mrg_2 = 040; exp_2 = $1;
|
||||
RELOMOVE(rel_2, relonami);
|
||||
}
|
||||
;
|
||||
ea_1 : ea_2
|
||||
{ mrg_1 = mrg_2; exp_1 = exp_2;
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||||
RELOMOVE(rel_1, rel_2);
|
||||
}
|
||||
;
|
||||
ea_ea : ea_1 ',' ea_2
|
||||
;
|
||||
266
mach/i86/as/mach5.c
Normal file
266
mach/i86/as/mach5.c
Normal file
|
|
@ -0,0 +1,266 @@
|
|||
#define RCSID5 "$Header$"
|
||||
|
||||
/*
|
||||
* INTEL 8086 special routines
|
||||
*/
|
||||
|
||||
ea_1(param) {
|
||||
|
||||
if ((mrg_1 & 070) || (param & ~070))
|
||||
serror("bad operand");
|
||||
emit1(mrg_1 | param);
|
||||
switch(mrg_1 >> 6) {
|
||||
case 0:
|
||||
if (mrg_1 == 6) {
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO1);
|
||||
#endif
|
||||
emit1(exp_1.val);
|
||||
break;
|
||||
case 2:
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ea_2(param) {
|
||||
|
||||
mrg_1 = mrg_2;
|
||||
exp_1 = exp_2;
|
||||
RELOMOVE(rel_1, rel_2);
|
||||
ea_1(param);
|
||||
}
|
||||
|
||||
reverse() {
|
||||
register m, r; expr_t e;
|
||||
|
||||
m = mrg_1; mrg_1 = mrg_2; mrg_2 = m;
|
||||
e = exp_1; exp_1 = exp_2; exp_2 = e;
|
||||
#ifndef ASLD
|
||||
r = rel_1; rel_1 = rel_2; rel_2 = r;
|
||||
#endif
|
||||
}
|
||||
|
||||
badsyntax() {
|
||||
|
||||
serror("bad operands");
|
||||
}
|
||||
|
||||
regsize(sz) register sz; {
|
||||
register bit;
|
||||
|
||||
sz <<= 3;
|
||||
bit = 010;
|
||||
sz &= bit;
|
||||
if ((mrg_1 >= 0300 && (mrg_1 & bit) != sz) ||
|
||||
(mrg_2 >= 0300 && (mrg_2 & bit) != sz))
|
||||
serror("register error");
|
||||
mrg_1 &= ~bit;
|
||||
mrg_2 &= ~bit;
|
||||
}
|
||||
|
||||
indexed() {
|
||||
|
||||
if (mrg_2 & ~7)
|
||||
serror("register error");
|
||||
if (exp_2.typ != S_ABS || fitb(exp_2.val) == 0)
|
||||
mrg_2 |= 0200;
|
||||
else if (exp_2.val != 0 || mrg_2 == 6)
|
||||
mrg_2 |= 0100;
|
||||
}
|
||||
|
||||
branch(opc,exp) register opc; expr_t exp; {
|
||||
register sm,dist;
|
||||
int saving;
|
||||
|
||||
dist = exp.val - (DOTVAL + 2);
|
||||
if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
|
||||
dist -= DOTGAIN;
|
||||
sm = fitb(dist);
|
||||
if ((exp.typ & ~S_DOT) != DOTTYP)
|
||||
sm = 0;
|
||||
if ((opc & 0370) == 0340) {
|
||||
fit(sm);
|
||||
sm = 1;
|
||||
} else {
|
||||
saving = opc == 0353 ? 1 : 3;
|
||||
if ((sm = small(sm,saving)) == 0) {
|
||||
if (opc != 0353) {
|
||||
emit1(opc^1);
|
||||
emit1(3);
|
||||
dist -= 2;
|
||||
}
|
||||
opc = 0351;
|
||||
dist--;
|
||||
}
|
||||
}
|
||||
emit1(opc);
|
||||
if (sm == 0) {
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELPC | RELO2);
|
||||
#endif
|
||||
emit2(dist);
|
||||
} else
|
||||
emit1(dist);
|
||||
}
|
||||
|
||||
pushop(opc) register opc; {
|
||||
|
||||
regsize(1);
|
||||
if (mrg_1 & 020) {
|
||||
if ( (mrg_1&3) == 1 && opc==1 ) badsyntax() ;
|
||||
emit1(6 | opc | (mrg_1&3)<<3);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0120 | opc<<3 | (mrg_1&7));
|
||||
} else if (opc == 0) {
|
||||
emit1(0377); ea_1(6<<3);
|
||||
} else {
|
||||
emit1(0217); ea_1(0<<3);
|
||||
}
|
||||
}
|
||||
|
||||
addop(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_2 >= 0300) {
|
||||
emit1(opc); ea_1((mrg_2&7)<<3);
|
||||
} else if ((mrg_2 & 040) && mrg_1 == 0300) {
|
||||
emit1(opc | 4); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_2 & 040) {
|
||||
if ((opc&1) == 0) {
|
||||
emit1(0200);
|
||||
} else if (exp_2.typ != S_ABS || fitb(exp_2.val) == 0 ||
|
||||
opc==011 || opc==041 || opc==061 ) {
|
||||
emit1(0201);
|
||||
} else {
|
||||
emit1(0203); opc &= ~1;
|
||||
}
|
||||
ea_1(opc & 070); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(opc | 2); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
rolop(opc) register opc; {
|
||||
register cmrg;
|
||||
|
||||
cmrg = mrg_2;
|
||||
mrg_2 = mrg_1;
|
||||
regsize(opc);
|
||||
if (cmrg == 0301) {
|
||||
emit1(0322 | (opc&1)); ea_1(opc&070);
|
||||
} else if ((cmrg & 040) && exp_2.val == 1) {
|
||||
emit1(0320 | (opc&1)); ea_1(opc&070);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
incop(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if ((opc&1) && mrg_1>=0300) {
|
||||
emit1(0100 | (opc&010) | (mrg_1&7));
|
||||
} else {
|
||||
emit1(0376 | (opc&1));
|
||||
ea_1(opc & 010);
|
||||
}
|
||||
}
|
||||
|
||||
callop(opc) register opc; {
|
||||
|
||||
regsize(1);
|
||||
if (mrg_1 & 040) {
|
||||
if (opc == (040+(0351<<8))) {
|
||||
branch(0353,exp_1);
|
||||
} else {
|
||||
exp_1.val -= (DOTVAL+3);
|
||||
emit1(opc>>8);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELPC | RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
}
|
||||
} else {
|
||||
emit1(0377); ea_1(opc&070);
|
||||
}
|
||||
}
|
||||
|
||||
xchg(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_2 == 0300 || mrg_1 < 0300)
|
||||
reverse();
|
||||
if (opc == 1 && mrg_1 == 0300 && mrg_2 >= 0300) {
|
||||
emit1(0220 | (mrg_2&7));
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0206 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
test(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if ((mrg_1 & 040) || mrg_2 >= 0300)
|
||||
reverse();
|
||||
if ((mrg_2 & 040) && mrg_1 == 0300) {
|
||||
emit1(0250 | opc); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_2 & 040) {
|
||||
emit1(0366 | opc); ea_1(0<<3); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0204 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
mov(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_1 & 020) {
|
||||
emit1(0216); ea_2((mrg_1&3)<<3);
|
||||
} else if (mrg_2 & 020) {
|
||||
emit1(0214); ea_1((mrg_2&3)<<3);
|
||||
} else if (mrg_2 & 040) {
|
||||
if (mrg_1 >= 0300) {
|
||||
emit1(0260 | opc<<3 | (mrg_1&7));
|
||||
emitx((opc&1)+1,exp_2.val);
|
||||
} else {
|
||||
emit1(0306 | opc); ea_1(0<<3);
|
||||
emitx((opc&1)+1,exp_2.val);
|
||||
}
|
||||
} else if (mrg_2 == 0300 && mrg_1 == 6) {
|
||||
emit1(0242 | opc);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
} else if (mrg_1 == 0300 && mrg_2 == 6) {
|
||||
emit1(0240 | opc);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_2.val);
|
||||
} else if (mrg_2 >= 0300) {
|
||||
emit1(0210 | opc); ea_1((mrg_2&7)<<3);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0212 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
11
mach/s2650/as/mach0.c
Normal file
11
mach/s2650/as/mach0.c
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
#define DUK
|
||||
#define RCSID0 "$Header$"
|
||||
|
||||
/*
|
||||
* Signetics 2650 options
|
||||
*/
|
||||
#define LISTING
|
||||
#define BYTES_REVERSED
|
||||
#define THREE_PASS
|
||||
#define RELOCATION
|
||||
#define NOLD
|
||||
20
mach/s2650/as/mach1.c
Normal file
20
mach/s2650/as/mach1.c
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
#define RCSID1 "$Header$"
|
||||
|
||||
/*
|
||||
* Signetics 2650 register names
|
||||
*/
|
||||
|
||||
#define R0 0
|
||||
#define R1 1
|
||||
#define R2 2
|
||||
#define R3 3
|
||||
|
||||
#define low7(z) (z & 0x7F)
|
||||
#define low13(z) (z & 0x1FFF)
|
||||
|
||||
#define fit7(z) (low7(z) == z)
|
||||
#define fit13(z) (low13(z) == z)
|
||||
|
||||
extern expr_t par_exp;
|
||||
extern unsigned p_indirect;
|
||||
extern int p_indexed;
|
||||
23
mach/s2650/as/mach2.c
Normal file
23
mach/s2650/as/mach2.c
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
#define RCSID2 "$Header$"
|
||||
|
||||
/*
|
||||
* Signetics 2650 tokens
|
||||
*/
|
||||
%token <y_word> REG
|
||||
%token <y_word> NOOP
|
||||
%token <y_word> CC
|
||||
%token <y_word> INDE
|
||||
%token <y_word> ZERO
|
||||
%token <y_word> ZEROX
|
||||
%token <y_word> IMMED
|
||||
%token <y_word> REL
|
||||
%token <y_word> ABSO
|
||||
%token <y_word> PSWM
|
||||
%token <y_word> RET
|
||||
%token <y_word> BRANCR
|
||||
%token <y_word> BRANCRX
|
||||
%token <y_word> BRANCA
|
||||
%token <y_word> BRANCAX
|
||||
%token <y_word> BRANRA
|
||||
%token <y_word> ZBRR
|
||||
%token <y_word> BXSA
|
||||
90
mach/s2650/as/mach3.c
Normal file
90
mach/s2650/as/mach3.c
Normal file
|
|
@ -0,0 +1,90 @@
|
|||
#define RCSID3 "$Header$"
|
||||
|
||||
/*
|
||||
* Signetics 2650 keywords
|
||||
*/
|
||||
0, REG, R0, "r0",
|
||||
0, REG, R1, "r1",
|
||||
0, REG, R2, "r2",
|
||||
0, REG, R3, "r3",
|
||||
0, CC, 0, "eq",
|
||||
0, CC, 0, "z",
|
||||
0, CC, 1, "gt",
|
||||
0, CC, 2, "lt",
|
||||
0, CC, 3, "un",
|
||||
0, INDE, 0x6000, "i",
|
||||
0, ZERO, 0x0, "lodz",
|
||||
0, ZERO, 0x80, "addz",
|
||||
0, ZERO, 0xA0, "subz",
|
||||
0, ZERO, 0x94, "dar",
|
||||
0, ZEROX, 0x40, "andz",
|
||||
0, ZERO, 0x60, "iorz",
|
||||
0, ZERO, 0x20, "eorz",
|
||||
0, ZERO, 0xE0, "comz",
|
||||
0, ZERO, 0xF0, "wrtd",
|
||||
0, ZERO, 0x70, "redd",
|
||||
0, ZERO, 0xB0, "wrtc",
|
||||
0, ZERO, 0x30, "redc",
|
||||
0, ZERO, 0x50, "rrr",
|
||||
0, ZERO, 0xD0, "rrl",
|
||||
0, ZEROX, 0xC0, "strz",
|
||||
0, IMMED, 0x04, "lodi",
|
||||
0, IMMED, 0x84, "addi",
|
||||
0, IMMED, 0xA4, "subi",
|
||||
0, IMMED, 0x44, "andi",
|
||||
0, IMMED, 0x64, "iori",
|
||||
0, IMMED, 0x24, "eori",
|
||||
0, IMMED, 0xE4, "comi",
|
||||
0, IMMED, 0xD4, "wrte",
|
||||
0, IMMED, 0x54, "rede",
|
||||
0, IMMED, 0xF4, "tmi",
|
||||
0, NOOP, 0x1E, "halt",
|
||||
0, NOOP, 0xC0, "nop",
|
||||
0, NOOP, 0x92, "lpsu",
|
||||
0, NOOP, 0x93, "lpsl",
|
||||
0, NOOP, 0x12, "spsu",
|
||||
0, NOOP, 0x13, "spsl",
|
||||
0, REL, 0x08, "lodr",
|
||||
0, REL, 0xC8, "strr",
|
||||
0, REL, 0x98, "addr",
|
||||
0, REL, 0xA8, "subr",
|
||||
0, REL, 0x48, "andr",
|
||||
0, REL, 0x68, "iorr",
|
||||
0, REL, 0x28, "eorr",
|
||||
0, REL, 0xE8, "comr",
|
||||
0, ABSO, 0x0C, "loda",
|
||||
0, ABSO, 0xCC, "stra",
|
||||
0, ABSO, 0x8C, "adda",
|
||||
0, ABSO, 0xAC, "suba",
|
||||
0, ABSO, 0x4C, "anda",
|
||||
0, ABSO, 0x6C, "iora",
|
||||
0, ABSO, 0x2C, "eora",
|
||||
0, ABSO, 0xEC, "coma",
|
||||
0, PSWM, 0x74, "cpsu",
|
||||
0, PSWM, 0x75, "cpsl",
|
||||
0, PSWM, 0x76, "ppsu",
|
||||
0, PSWM, 0x77, "ppsl",
|
||||
0, PSWM, 0xB4, "tpsu",
|
||||
0, PSWM, 0xB5, "tpsl",
|
||||
0, RET, 0x14, "retc",
|
||||
0, RET, 0x34, "rete",
|
||||
0, BRANCR, 0x18, "bctr",
|
||||
0, BRANCRX, 0x98, "bcfr",
|
||||
0, REL, 0x58, "brnr",
|
||||
0, REL, 0xD8, "birr",
|
||||
0, REL, 0xF8, "bdrr",
|
||||
0, BRANCR, 0x38, "bstr",
|
||||
0, BRANCRX, 0xB8, "bsfr",
|
||||
0, REL, 0x78, "bsnr",
|
||||
0, BRANCA, 0x1E, "bcta",
|
||||
0, BRANCAX, 0x9E, "bcfa",
|
||||
0, BRANRA, 0x5E, "brna",
|
||||
0, BRANRA, 0xDE, "bira",
|
||||
0, BRANRA, 0xFE, "bdra",
|
||||
0, BRANCA, 0x3E, "bsta",
|
||||
0, BRANCAX, 0xBE, "bsfa",
|
||||
0, BRANRA, 0x7E, "bsna",
|
||||
0, ZBRR, 0x9B, "zbrr",
|
||||
0, ZBRR, 0xBB, "zbsr",
|
||||
0, BXSA, 0x9F, "bxa",
|
||||
0, BXSA, 0xBF, "bsxa",
|
||||
139
mach/s2650/as/mach4.c
Normal file
139
mach/s2650/as/mach4.c
Normal file
|
|
@ -0,0 +1,139 @@
|
|||
#define RCSID4 "$Header$"
|
||||
|
||||
/*
|
||||
* (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
|
||||
*
|
||||
* This product is part of the Amsterdam Compiler Kit.
|
||||
*
|
||||
* Permission to use, sell, duplicate or disclose this software must be
|
||||
* obtained in writing. Requests for such permissions may be sent to
|
||||
*
|
||||
* Dr. Andrew S. Tanenbaum
|
||||
* Wiskundig Seminarium
|
||||
* Vrije Universiteit
|
||||
* Postbox 7161
|
||||
* 1007 MC Amsterdam
|
||||
* The Netherlands
|
||||
*
|
||||
*/
|
||||
|
||||
/* Author: Leo van Moergestel */
|
||||
|
||||
/*
|
||||
* Signetics 2650 parsing rules
|
||||
*/
|
||||
operation:
|
||||
NOOP
|
||||
{ emit1($1);}
|
||||
|
|
||||
ZERO ',' REG
|
||||
{ emit1($1 | $3); }
|
||||
|
|
||||
IMMED ',' REG expr
|
||||
{ emit1($1 | $3); page();
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO1);
|
||||
#endif
|
||||
emit1($4.val);
|
||||
}
|
||||
|
|
||||
REL ',' REG expr
|
||||
{ emit1($1 | $3); rela($4, 0);}
|
||||
|
|
||||
REL ',' REG '*' expr
|
||||
{ emit1($1 | $3); rela($5, 0x80);}
|
||||
|
|
||||
ZEROX ',' REG
|
||||
{ if ($3 == R0)
|
||||
serror("register error");
|
||||
emit1($1 | $3);
|
||||
}
|
||||
|
|
||||
ABSO ',' REG param
|
||||
{ emit1($1 | $3);
|
||||
absoa(par_exp, p_indexed, p_indirect);
|
||||
}
|
||||
|
|
||||
PSWM expr
|
||||
{ emit1($1); page();
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO1);
|
||||
#endif
|
||||
emit1($2.val);
|
||||
}
|
||||
|
|
||||
RET ',' CC
|
||||
{ emit1($1 | $3);}
|
||||
|
|
||||
BRANCR ',' CC expr
|
||||
{ emit1($1 | $3); rela($4, 0);}
|
||||
|
|
||||
BRANCR ',' CC '*' expr
|
||||
{ emit1($1 | $3); rela($5, 0x80);}
|
||||
|
|
||||
BRANCRX ',' CC expr
|
||||
{ if($3 == 3)
|
||||
serror("wrong condition");
|
||||
emit1($1 | $3); rela($4, 0);}
|
||||
|
|
||||
BRANCRX ',' CC '*' expr
|
||||
{ if($3 == 3)
|
||||
serror("wrong condition");
|
||||
emit1($1 | $3); rela($5, 0x80);}
|
||||
|
|
||||
BRANCA ',' CC expr
|
||||
{ emit1($1 | $3); absob($4, 0);}
|
||||
|
|
||||
BRANCA ',' CC '*' expr
|
||||
{ emit1($1 | $3); absob($5, 0x8000);}
|
||||
|
|
||||
BRANCAX ',' CC expr
|
||||
{ if($3 == 3)
|
||||
serror("wrong condition");
|
||||
emit1($1 | $3); absob($4, 0);}
|
||||
|
|
||||
BRANCAX ',' CC '*' expr
|
||||
{ if($3 == 3)
|
||||
serror("wrong condition");
|
||||
emit1($1 | $3); absob($5, 0x8000);}
|
||||
|
|
||||
BRANRA ',' REG expr
|
||||
{ emit1($1 | $3); absob($4, 0);}
|
||||
|
|
||||
BRANRA ',' REG '*' expr
|
||||
{ emit1($1 | $3); absob($5, 0x8000);}
|
||||
|
|
||||
ZBRR expr
|
||||
{ emit1($1); rela($2, 0);}
|
||||
|
|
||||
ZBRR '*' expr
|
||||
{ emit1($1); rela($3, 0x80);}
|
||||
|
|
||||
BXSA expr
|
||||
{ emit1($1); absob($2, 0);}
|
||||
|
|
||||
BXSA '*' expr
|
||||
{ emit1($1); absob($3, 0x8000);}
|
||||
;
|
||||
|
||||
param:
|
||||
indir_opt
|
||||
{ p_indexed = 0;}
|
||||
|
|
||||
indir_opt ',' INDE
|
||||
{ p_indexed = 0x6000;}
|
||||
|
|
||||
indir_opt ',' '+'
|
||||
{ p_indexed = 0x2000;}
|
||||
|
|
||||
indir_opt ',' '-'
|
||||
{ p_indexed = 0x4000;}
|
||||
;
|
||||
|
||||
indir_opt:
|
||||
expr
|
||||
{ par_exp = $1; p_indirect = 0;}
|
||||
|
|
||||
'*' expr
|
||||
{ par_exp = $2; p_indirect = 0x8000;}
|
||||
;
|
||||
86
mach/s2650/as/mach5.c
Normal file
86
mach/s2650/as/mach5.c
Normal file
|
|
@ -0,0 +1,86 @@
|
|||
#define RCSID5 "$Header$"
|
||||
|
||||
/*
|
||||
* Signetics 2650 special routines
|
||||
*/
|
||||
|
||||
#define MASK 0x6000
|
||||
#define MASK1 0x1FFF
|
||||
#define MASK2 0x1FFE
|
||||
|
||||
page()
|
||||
{
|
||||
if(((DOTVAL - 1) & MASK1) == MASK1)
|
||||
serror("page violation");
|
||||
}
|
||||
|
||||
pag2()
|
||||
{
|
||||
if(((DOTVAL - 1) & MASK1) >= MASK2)
|
||||
serror("page violation");
|
||||
}
|
||||
|
||||
rela(exp,ind)
|
||||
expr_t exp;
|
||||
int ind;
|
||||
{
|
||||
int c, d;
|
||||
page();
|
||||
if(pass == PASS_3){
|
||||
#ifdef ASLD
|
||||
if((DOTVAL & MASK) != (exp.val & MASK))
|
||||
serror("relative address outside page");
|
||||
#endif
|
||||
d = low13(DOTVAL);
|
||||
c = low13(exp.val);
|
||||
#ifdef ASLD
|
||||
/*
|
||||
* I (Duk Bekema) think the next two if's are meant to
|
||||
* handle wrap around, but the original author didn't give
|
||||
* any comment here and I don't know anything about the
|
||||
* Signetics 2650.
|
||||
*/
|
||||
if(c - d > 0x1F80)
|
||||
d |= 0x2000;
|
||||
if(d - c > 0x1F80)
|
||||
c |= 0x2000;
|
||||
#endif
|
||||
c -= d + 1;
|
||||
fit(fit7(c));
|
||||
}
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELPC | RELO1);
|
||||
#endif
|
||||
emit1(low7(c) | ind);
|
||||
}
|
||||
|
||||
absoa(exp, ix, ind)
|
||||
expr_t exp;
|
||||
int ix;
|
||||
unsigned ind;
|
||||
{
|
||||
pag2();
|
||||
#ifdef ASLD
|
||||
if(pass == PASS_3 && (exp.val & MASK) != (DOTVAL & MASK))
|
||||
serror("page violation");
|
||||
#endif
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELO2 | RELBR);
|
||||
#endif
|
||||
emit2(low13(exp.val) | ind | ix);
|
||||
}
|
||||
|
||||
absob(exp, ind)
|
||||
expr_t exp;
|
||||
unsigned ind;
|
||||
{
|
||||
pag2();
|
||||
#ifdef ASLD
|
||||
if (exp.val < 0)
|
||||
serror("branch to nonexistent memory");
|
||||
#endif
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELO2 | RELBR);
|
||||
#endif
|
||||
emit2(exp.val | ind);
|
||||
}
|
||||
10
mach/z80/as/mach0.c
Normal file
10
mach/z80/as/mach0.c
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#define DUK
|
||||
#define RCSID0 "$Header$"
|
||||
|
||||
/*
|
||||
* Zilog Z80 options
|
||||
*/
|
||||
#define THREE_PASS /* distinguish short and long branches */
|
||||
#define LISTING /* enable listing facilities */
|
||||
#define RELOCATION
|
||||
#define NOLD
|
||||
32
mach/z80/as/mach1.c
Normal file
32
mach/z80/as/mach1.c
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
#define RCSID1 "$Header$"
|
||||
|
||||
/*
|
||||
* Zilog Z80 dependent C declarations.
|
||||
*/
|
||||
|
||||
#define B 0
|
||||
#define C 1
|
||||
#define D 2
|
||||
#define E 3
|
||||
#define H 4
|
||||
#define L 5
|
||||
#define F 6
|
||||
#define A 7
|
||||
#define I 8
|
||||
#define R 9
|
||||
#define BC 0
|
||||
#define DE 1
|
||||
#define HL 2
|
||||
#define SP 3
|
||||
#define AF 4
|
||||
#define AF2 5
|
||||
#define IX 6
|
||||
#define IY 7
|
||||
|
||||
#define low3(z) ((z) & 07)
|
||||
#define fit3(z) (low3(z) == (z))
|
||||
|
||||
extern expr_t exp_ind;
|
||||
#ifndef ASLD
|
||||
extern int rel_ind;
|
||||
#endif
|
||||
30
mach/z80/as/mach2.c
Normal file
30
mach/z80/as/mach2.c
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
#define RCSID2 "$Header$"
|
||||
|
||||
/*
|
||||
* Zilog Z80 tokens
|
||||
*/
|
||||
%token <y_word> R8
|
||||
%token <y_word> R16
|
||||
%token <y_word> CC
|
||||
%token <y_word> NOOPOP
|
||||
%token <y_word> E_ED
|
||||
%token <y_word> LDOP
|
||||
%token <y_word> PSHPOP
|
||||
%token <y_word> EXOP
|
||||
%token <y_word> ADDOP
|
||||
%token <y_word> ADCSBC
|
||||
%token <y_word> INCDEC
|
||||
%token <y_word> ARI8
|
||||
%token <y_word> IMOP
|
||||
%token <y_word> ROTATE
|
||||
%token <y_word> BITS
|
||||
%token <y_word> JP
|
||||
%token <y_word> JR
|
||||
%token <y_word> DJNZ
|
||||
%token <y_word> CALL
|
||||
%token <y_word> RET
|
||||
%token <y_word> RST
|
||||
%token <y_word> IN
|
||||
%token <y_word> OUT
|
||||
|
||||
%type <y_word> ari8 r8 indir index ind coco
|
||||
98
mach/z80/as/mach3.c
Normal file
98
mach/z80/as/mach3.c
Normal file
|
|
@ -0,0 +1,98 @@
|
|||
#define RCSID3 "$Header$"
|
||||
|
||||
/*
|
||||
* Zilog Z80 keywords
|
||||
*/
|
||||
|
||||
0, R8, B, "b",
|
||||
0, R8, C, "c",
|
||||
0, R8, D, "d",
|
||||
0, R8, E, "e",
|
||||
0, R8, H, "h",
|
||||
0, R8, L, "l",
|
||||
0, R8, F, "f",
|
||||
0, R8, A, "a",
|
||||
0, R8, I, "i",
|
||||
0, R8, R, "r",
|
||||
0, R16, BC, "bc",
|
||||
0, R16, DE, "de",
|
||||
0, R16, HL, "hl",
|
||||
0, R16, SP, "sp",
|
||||
0, R16, AF, "af",
|
||||
0, R16, AF2, "af2",
|
||||
0, R16, IX, "ix",
|
||||
0, R16, IY, "iy",
|
||||
0, CC, 0, "nz",
|
||||
0, CC, 1, "z",
|
||||
0, CC, 2, "nc",
|
||||
0, CC, 4, "po",
|
||||
0, CC, 5, "pe",
|
||||
0, CC, 6, "p",
|
||||
0, CC, 7, "m",
|
||||
0, LDOP, 0, "ld",
|
||||
0, PSHPOP, 0305, "push",
|
||||
0, PSHPOP, 0301, "pop",
|
||||
0, EXOP, 0343, "ex",
|
||||
0, NOOPOP, 0331, "exx",
|
||||
0, E_ED, 0240, "ldi",
|
||||
0, E_ED, 0260, "ldir",
|
||||
0, E_ED, 0250, "ldd",
|
||||
0, E_ED, 0270, "lddr",
|
||||
0, E_ED, 0241, "cpi",
|
||||
0, E_ED, 0261, "cpir",
|
||||
0, E_ED, 0251, "cpd",
|
||||
0, E_ED, 0271, "cpdr",
|
||||
0, ADDOP, 0200, "add",
|
||||
0, ADCSBC, 0210, "adc",
|
||||
0, ADCSBC, 0230, "sbc",
|
||||
0, ARI8, 0220, "sub",
|
||||
0, ARI8, 0240, "and",
|
||||
0, ARI8, 0260, "or",
|
||||
0, ARI8, 0250, "xor",
|
||||
0, ARI8, 0270, "cp",
|
||||
0, INCDEC, 04, "inc",
|
||||
0, INCDEC, 05, "dec",
|
||||
0, NOOPOP, 047, "daa",
|
||||
0, NOOPOP, 057, "cpl",
|
||||
0, E_ED, 0104, "neg",
|
||||
0, NOOPOP, 077, "ccf",
|
||||
0, NOOPOP, 067, "scf",
|
||||
0, NOOPOP, 0, "nop",
|
||||
0, NOOPOP, 0166, "halt",
|
||||
0, NOOPOP, 0363, "di",
|
||||
0, NOOPOP, 0373, "ei",
|
||||
0, IMOP, 0106, "im",
|
||||
0, NOOPOP, 07, "rlca",
|
||||
0, NOOPOP, 027, "rla",
|
||||
0, NOOPOP, 017, "rrca",
|
||||
0, NOOPOP, 037, "rra",
|
||||
0, ROTATE, 0, "rlc",
|
||||
0, ROTATE, 020, "rl",
|
||||
0, ROTATE, 010, "rrc",
|
||||
0, ROTATE, 030, "rr",
|
||||
0, ROTATE, 040, "sla",
|
||||
0, ROTATE, 050, "sra",
|
||||
0, ROTATE, 070, "srl",
|
||||
0, E_ED, 0157, "rld",
|
||||
0, E_ED, 0147, "rrd",
|
||||
0, BITS, 0100, "bit",
|
||||
0, BITS, 0200, "res",
|
||||
0, BITS, 0300, "set",
|
||||
0, JP, 0303, "jp",
|
||||
0, JR, 030, "jr",
|
||||
0, DJNZ, 020, "djnz",
|
||||
0, CALL, 0315, "call",
|
||||
0, RET, 0311, "ret",
|
||||
0, E_ED, 0115, "reti",
|
||||
0, E_ED, 0105, "retn",
|
||||
0, RST, 0307, "rst",
|
||||
0, IN, 0333, "in",
|
||||
0, E_ED, 0242, "ini",
|
||||
0, E_ED, 0262, "inir",
|
||||
0, E_ED, 0252, "ind",
|
||||
0, E_ED, 0272, "indr",
|
||||
0, OUT, 0323, "out",
|
||||
0, E_ED, 0243, "outi",
|
||||
0, E_ED, 0263, "otir",
|
||||
0, E_ED, 0253, "outd",
|
||||
0, E_ED, 0273, "otdr",
|
||||
343
mach/z80/as/mach4.c
Normal file
343
mach/z80/as/mach4.c
Normal file
|
|
@ -0,0 +1,343 @@
|
|||
#define RCSID4 "$Header$"
|
||||
|
||||
/*
|
||||
* (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
|
||||
*
|
||||
* This product is part of the Amsterdam Compiler Kit.
|
||||
*
|
||||
* Permission to use, sell, duplicate or disclose this software must be
|
||||
* obtained in writing. Requests for such permissions may be sent to
|
||||
*
|
||||
* Dr. Andrew S. Tanenbaum
|
||||
* Wiskundig Seminarium
|
||||
* Vrije Universiteit
|
||||
* Postbox 7161
|
||||
* 1007 MC Amsterdam
|
||||
* The Netherlands
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Zilog Z80 parsing rules
|
||||
*/
|
||||
operation
|
||||
: NOOPOP
|
||||
{ emit1($1);}
|
||||
| LDOP ldargs
|
||||
| PSHPOP R16
|
||||
{ switch ($2) {
|
||||
case BC: emit1($1); break;
|
||||
case DE: emit1($1 | 020); break;
|
||||
case AF: emit1($1 | 060); break;
|
||||
case HL:
|
||||
case IX:
|
||||
case IY: xyreg($2,$1 | 040); break;
|
||||
default: serror("register error");
|
||||
}
|
||||
}
|
||||
| EXOP R16 ',' R16
|
||||
{ if ($2==DE && $4==HL)
|
||||
emit1(0353);
|
||||
else if ($2==AF && $4==AF2)
|
||||
emit1(010);
|
||||
else serror("register error");
|
||||
}
|
||||
| EXOP '(' R16 ')' ',' R16
|
||||
{ if ($3!=SP) serror("register error");
|
||||
xyreg($6,$1);
|
||||
}
|
||||
| E_ED
|
||||
{ emit1(0355); emit1($1);}
|
||||
| ADDOP R16 ',' R16
|
||||
{ if ($4 == $2)
|
||||
xyreg($2,051);
|
||||
else {
|
||||
if ($4==HL || $4>SP)
|
||||
serror("register error");
|
||||
xyreg($2,011 | $4<<4);
|
||||
}
|
||||
}
|
||||
| ADCSBC R16 ',' R16
|
||||
{ if ($2!=HL || $4>SP) serror("register error");
|
||||
emit1(0355);
|
||||
emit1(($1==0210 ? 0112 : 0102) | ($4<<4));
|
||||
}
|
||||
| INCDEC R16
|
||||
{ switch ($2) {
|
||||
case BC: case DE: case SP:
|
||||
emit1(($1==04 ? 03 : 013) | $2<<4);
|
||||
break;
|
||||
case HL: case IX: case IY:
|
||||
xyreg($2,$1==04 ? 043 : 053);
|
||||
break;
|
||||
default: serror("register error");
|
||||
}
|
||||
}
|
||||
| INCDEC r8
|
||||
{ emit1($1 | $2<<3);}
|
||||
| INCDEC ind
|
||||
{ xymem($2,$1 | 060);}
|
||||
| ari8 r8
|
||||
{ emit1($1 | $2);}
|
||||
| ari8 expr
|
||||
{ emit1($1 | 0106); emit1($2.val);}
|
||||
| ari8 ind
|
||||
{ xymem($2,$1 | 06);}
|
||||
| IMOP absexp
|
||||
{ emit1(0355);
|
||||
switch ($2) {
|
||||
case 0: emit1(0106); break;
|
||||
case 1: emit1(0126); break;
|
||||
case 2: emit1(0136); break;
|
||||
default: serror("range 0..2");
|
||||
}
|
||||
}
|
||||
| ROTATE r8
|
||||
{ emit1(0313); emit1($1 | $2);}
|
||||
| ROTATE ind
|
||||
{ xymem($2,0313); emit1($1 | 06);}
|
||||
| BITS absexp ',' r8
|
||||
{ fit(fit3($2.val));
|
||||
emit1(0313); emit1($1 | low3($2)<<3 | $4);
|
||||
}
|
||||
| BITS absexp ',' ind
|
||||
{ fit(fit3($2));
|
||||
xymem($4,0313);
|
||||
emit1($1 | low3($2)<<3 | 06);
|
||||
}
|
||||
| JP expr
|
||||
{ emit1($1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
| JP coco ',' expr
|
||||
{ emit1(0302 | $2<<3);
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO2);
|
||||
#endif
|
||||
emit2($4.val);
|
||||
}
|
||||
| JP indir
|
||||
{ xyreg($2,0351);}
|
||||
| JR expr
|
||||
{ branch($1,$2);}
|
||||
| JR coco ',' expr
|
||||
{ if ($2 > 3) serror("bad condition code");
|
||||
branch(040 | ($2<<3), $4);
|
||||
}
|
||||
| DJNZ expr
|
||||
{ branch($1,$2);}
|
||||
| CALL expr
|
||||
{ emit1($1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
| CALL coco ',' expr
|
||||
{ emit1(0304 | $2<<3);
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO2);
|
||||
#endif
|
||||
emit2($4.val);
|
||||
}
|
||||
| RET
|
||||
{ emit1($1);}
|
||||
| RET coco
|
||||
{ emit1(0300 | $2<<3);}
|
||||
| RST absexp
|
||||
{ if (($2&070)!=$2)
|
||||
serror("rst expression out of range");
|
||||
emit1($1 | $2);
|
||||
}
|
||||
| IN R8 ',' expr
|
||||
{ if ($2 != A) serror("register error");
|
||||
emit1($1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO1);
|
||||
#endif
|
||||
emit1($4.val);
|
||||
}
|
||||
| IN R8 ',' R8
|
||||
{ if ($4 != C) serror("register error");
|
||||
emit1(0355); emit1(0100 | $2<<3);
|
||||
}
|
||||
| OUT expr ',' R8
|
||||
{ if ($4 != A) serror("register error");
|
||||
emit1($1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO1);
|
||||
#endif
|
||||
emit1($2.val);
|
||||
}
|
||||
| OUT R8 ',' R8
|
||||
{ if ($2 != C) serror("register error");
|
||||
emit1(0355); emit1(0101 | $4<<3);
|
||||
}
|
||||
;
|
||||
ari8 : ARI8
|
||||
| ADDOP R8 ','
|
||||
{ if ($2 != A) serror("register error");}
|
||||
| ADCSBC R8 ','
|
||||
{ if ($2 != A) serror("register error");}
|
||||
;
|
||||
ldargs : R8 ',' R8
|
||||
{ if ($1==F || $3==F) serror("register error");
|
||||
if ($1<=A && $3<=A)
|
||||
emit1(0100 | $1<<3 | $3);
|
||||
else {
|
||||
emit1(0355);
|
||||
if ((($1==A) ^ ($3==A)) == 0)
|
||||
serror("register error");
|
||||
emit1( 0107 |
|
||||
($1==R||$3==R)<<3 |
|
||||
($1==A)<<4
|
||||
);
|
||||
}
|
||||
}
|
||||
| R8 ',' expr
|
||||
{ if ($1==F || $1==I || $1==R)
|
||||
serror("register error");
|
||||
emit1(06 | $1<<3);
|
||||
#ifdef RELOCATION
|
||||
newrelo($3.typ, RELO1);
|
||||
#endif
|
||||
emit1($3.val);
|
||||
}
|
||||
| R8 ',' indir
|
||||
{ if ($1==F || $1==I || $1==R)
|
||||
serror("register error");
|
||||
if ($1==A && ($3==BC || $3==DE))
|
||||
emit1($3==BC ? 012 : 032);
|
||||
else
|
||||
xymem($3,0106 | $1<<3);
|
||||
}
|
||||
| R8 ',' index
|
||||
{ if ($1==F || $1==I || $1==R)
|
||||
serror("register error");
|
||||
xymem($3,0106 | $1<<3);
|
||||
}
|
||||
| R8 ',' '(' expr ')'
|
||||
{ if ($1!=A) serror("register error");
|
||||
emit1(072);
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO2);
|
||||
#endif
|
||||
emit2($4.val);
|
||||
}
|
||||
| indir ',' r8
|
||||
{ if ($3==A && ($1==BC || $1==DE))
|
||||
emit1($1==BC ? 02 : 022);
|
||||
else
|
||||
xymem($1,0160 | $3);
|
||||
}
|
||||
| index ',' r8
|
||||
{ xymem($1,0160 | $3);}
|
||||
| indir ',' expr
|
||||
{ xymem($1,066);
|
||||
#ifdef RELOCATION
|
||||
newrelo($3.typ, RELO1);
|
||||
#endif
|
||||
emit1($3.val);
|
||||
}
|
||||
| index ',' expr
|
||||
{ xymem($1,066);
|
||||
#ifdef RELOCATION
|
||||
newrelo($3.typ, RELO1);
|
||||
#endif
|
||||
emit1($3.val);
|
||||
}
|
||||
| R16 ',' expr
|
||||
{ switch ($1) {
|
||||
case BC: case DE: case HL: case SP:
|
||||
emit1(01 | $1<<4); break;
|
||||
case IX: case IY:
|
||||
xyreg($1,041); break;
|
||||
default: serror("register error");
|
||||
}
|
||||
#ifdef RELOCATION
|
||||
newrelo($3.typ, RELO2);
|
||||
#endif
|
||||
emit2($3.val);
|
||||
}
|
||||
| R16 ',' R16
|
||||
{ if ($1!=SP) serror("register error");
|
||||
xyreg($3,0371);
|
||||
}
|
||||
| R16 ',' '(' expr ')'
|
||||
{ switch ($1) {
|
||||
case BC: case DE: case SP:
|
||||
emit1(0355); emit1(0113 | $1<<4); break;
|
||||
case HL: case IX: case IY:
|
||||
xyreg($1,052); break;
|
||||
default: serror("register error");
|
||||
}
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO2);
|
||||
#endif
|
||||
emit2($4.val);
|
||||
}
|
||||
| '(' expr ')' ',' R8
|
||||
{ if ($5!=A) serror("register error");
|
||||
emit1(062);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
| '(' expr ')' ',' R16
|
||||
{ switch ($5) {
|
||||
case BC: case DE: case SP:
|
||||
emit1(0355); emit1(0103 | $5<<4); break;
|
||||
case HL: case IX: case IY:
|
||||
xyreg($5,042); break;
|
||||
default: serror("register error");
|
||||
}
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
;
|
||||
r8 : R8
|
||||
{ if ($1==F || $1==I || $1==R)
|
||||
serror("register error");
|
||||
}
|
||||
;
|
||||
indir : '(' R16 ')'
|
||||
{ if ($2>=SP && $2!=IX && $2!=IY)
|
||||
serror("register error");
|
||||
exp_ind.typ = S_ABS; exp_ind.val = 0;
|
||||
$$ = $2;
|
||||
}
|
||||
;
|
||||
index : '(' R16 '+' expr ')'
|
||||
{ if ($2!=IX && $2!=IY) serror("register error");
|
||||
exp_ind = $4;
|
||||
RELOMOVE(rel_ind, relonami);
|
||||
$$ = $2;
|
||||
}
|
||||
| '(' R16 '-' expr ')'
|
||||
{
|
||||
#ifdef ASLD
|
||||
if ($2!=IX && $2!=IY) serror("register error");
|
||||
fit(fitb($4.val));
|
||||
exp_ind = $4;
|
||||
RELOMOVE(rel_ind, relonami);
|
||||
$$ = $2;
|
||||
#else ASLD
|
||||
serror("relocation error");
|
||||
#endif ASLD
|
||||
}
|
||||
;
|
||||
ind : indir
|
||||
| index
|
||||
;
|
||||
coco : CC
|
||||
| R8
|
||||
{ if ($1 != C) serror("bad condition code");
|
||||
$$ = 3;
|
||||
}
|
||||
;
|
||||
57
mach/z80/as/mach5.c
Normal file
57
mach/z80/as/mach5.c
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
#define RCSID5 "$Header$"
|
||||
|
||||
/*
|
||||
* Zilog Z80 special routines
|
||||
*/
|
||||
|
||||
xyreg(r,byte) {
|
||||
|
||||
if (r==IX)
|
||||
emit1(0335);
|
||||
else if (r==IY)
|
||||
emit1(0375);
|
||||
else if (r!=HL)
|
||||
serror("register error");
|
||||
emit1(byte);
|
||||
}
|
||||
|
||||
xymem(r,byte) {
|
||||
|
||||
xyreg(r,byte);
|
||||
if (r != HL) {
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_ind);
|
||||
newrelo(exp_ind.typ, RELO1);
|
||||
#endif
|
||||
emit1(exp_ind.val);
|
||||
}
|
||||
}
|
||||
|
||||
branch(opc,exp) register opc; expr_t exp; {
|
||||
register sm,dist;
|
||||
|
||||
dist = exp.val - (DOTVAL + 2);
|
||||
if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
|
||||
dist -= DOTGAIN;
|
||||
sm = fitb(dist);
|
||||
if ((exp.typ & ~S_DOT) != DOTTYP)
|
||||
sm = 0;
|
||||
if (opc == 020) { /* DJNZ must be short */
|
||||
fit(sm);
|
||||
sm = 1;
|
||||
} else if ((sm = small(sm,1)) == 0) {
|
||||
if (opc == 030) /* 'JR exp' */
|
||||
opc = 0303; /* replace by 'JP exp' */
|
||||
else /* 'JR CC,exp' */
|
||||
opc ^= 0342; /* replace by 'JP CC,exp' */
|
||||
}
|
||||
emit1(opc);
|
||||
if (sm == 0) {
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELPC | RELO2);
|
||||
#endif
|
||||
emit2(exp.val);
|
||||
} else {
|
||||
emit1(lowb(dist));
|
||||
}
|
||||
}
|
||||
Loading…
Reference in a new issue