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Simplify moves to and from IND_RC_*

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Now that SUM_RC always has a signed 16-bit constant, it happens that
the various IND_RC_* tokens also have a signed 16-bit constant, so
we no longer need to touch the scratch register.
This commit is contained in:
George Koehler 2016-10-16 16:02:25 -04:00
parent 7c64dab491
commit 5b5f774a64
1 changed files with 31 additions and 97 deletions
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112
mach/powerpc/ncg/table
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@ -424,75 +424,39 @@ MOVES
/* Read/write byte */ /* Read/write byte */
from IND_RC_B smalls(%off) to GPR
gen
COMMENT("move IND_RC_B->GPR small")
lbz %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_B to GPR from IND_RC_B to GPR
gen gen
COMMENT("move IND_RC_B->GPR large") COMMENT("move IND_RC_B->GPR")
addis RSCRATCH, %1.reg, {CONST, his(%1.off)} lbz %2, {GPRINDIRECT, %1.reg, %1.off}
lbz %2, {GPRINDIRECT, RSCRATCH, los(%1.off)}
from GPR to IND_RC_B smalls(%off)
gen
COMMENT("move GPR->IND_RC_B small")
stb %1, {GPRINDIRECT, %2.reg, %2.off}
from GPR to IND_RC_B from GPR to IND_RC_B
gen gen
COMMENT("move GPR->IND_RC_B large") COMMENT("move GPR->IND_RC_B")
addis RSCRATCH, %2.reg, {CONST, his(%2.off)} stb %1, {GPRINDIRECT, %2.reg, %2.off}
stb %1, {GPRINDIRECT, RSCRATCH, los(%2.off)}
/* Read/write short */ /* Read/write halfword (short) */
from IND_RC_H smalls(%off) to GPR
gen
COMMENT("move IND_RC_H->GPR small")
lhz %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_H to GPR from IND_RC_H to GPR
gen gen
COMMENT("move IND_RC_H->GPR large") COMMENT("move IND_RC_H->GPR")
addis RSCRATCH, %1.reg, {CONST, his(%1.off)} lhz %2, {GPRINDIRECT, %1.reg, %1.off}
lhz %2, {GPRINDIRECT, RSCRATCH, los(%1.off)}
from IND_RC_H_S smalls(%off) to GPR
gen
COMMENT("move IND_RC_H_S->GPR small")
lha %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_H_S to GPR from IND_RC_H_S to GPR
gen gen
COMMENT("move IND_RC_H_S->GPR large") COMMENT("move IND_RC_H_S->GPR")
addis RSCRATCH, %1.reg, {CONST, his(%1.off)} lha %2, {GPRINDIRECT, %1.reg, %1.off}
lha %2, {GPRINDIRECT, RSCRATCH, los(%1.off)}
from GPR to IND_RC_H smalls(%off)
gen
COMMENT("move GPR->IND_RC_H small")
sth %1, {GPRINDIRECT, %2.reg, %2.off}
from GPR to IND_RC_H from GPR to IND_RC_H
gen gen
COMMENT("move GPR->IND_RC_H large") COMMENT("move GPR->IND_RC_H")
addis RSCRATCH, %2.reg, {CONST, his(%2.off)} sth %1, {GPRINDIRECT, %2.reg, %2.off}
sth %1, {GPRINDIRECT, RSCRATCH, los(%2.off)}
/* Read word */ /* Read word */
from IND_RC_W smalls(%off) to GPR
gen
COMMENT("move IND_RC_W->GPR small")
lwz %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_W to GPR from IND_RC_W to GPR
gen gen
COMMENT("move IND_RC_W->GPR large") COMMENT("move IND_RC_W->GPR")
addis %2, %1.reg, {CONST, his(%1.off)} lwz %2, {GPRINDIRECT, %1.reg, %1.off}
lwz %2, {GPRINDIRECT, %2, los(%1.off)}
from IND_RR_W to GPR from IND_RR_W to GPR
gen gen
@ -505,16 +469,10 @@ MOVES
move {LABEL, %1.adr}, RSCRATCH move {LABEL, %1.adr}, RSCRATCH
lwz %2, {GPRINDIRECT, RSCRATCH, 0} lwz %2, {GPRINDIRECT, RSCRATCH, 0}
from IND_RC_W smalls(%off) to FSREG
gen
COMMENT("move IND_RC_W->FSREG small")
lfs %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_W to FSREG from IND_RC_W to FSREG
gen gen
COMMENT("move IND_RC_W->FSREG large") COMMENT("move IND_RC_W->FSREG")
addis RSCRATCH, %1.reg, {CONST, his(%1.off)} lfs %2, {GPRINDIRECT, %1.reg, %1.off}
lfs %2, {GPRINDIRECT, RSCRATCH, los(%1.off)}
from IND_RR_W to FSREG from IND_RR_W to FSREG
gen gen
@ -529,16 +487,10 @@ MOVES
/* Write word */ /* Write word */
from GPR to IND_RC_W smalls(%off)
gen
COMMENT("move GPR->IND_RC_W small")
stw %1, {GPRINDIRECT, %2.reg, %2.off}
from GPR to IND_RC_W from GPR to IND_RC_W
gen gen
COMMENT("move GPR->IND_RC_W large") COMMENT("move GPR->IND_RC_W")
addis RSCRATCH, %2.reg, {CONST, his(%2.off)} stw %1, {GPRINDIRECT, %2.reg, %2.off}
stw %1, {GPRINDIRECT, RSCRATCH, los(%2.off)}
from GPR to IND_RR_W from GPR to IND_RR_W
gen gen
@ -551,16 +503,10 @@ MOVES
move {LABEL, %2.adr}, RSCRATCH move {LABEL, %2.adr}, RSCRATCH
stw %1, {GPRINDIRECT, RSCRATCH, 0} stw %1, {GPRINDIRECT, RSCRATCH, 0}
from FSREG to IND_RC_W smalls(%off)
gen
COMMENT("move FSREG->IND_RC_W small")
stfs %1, {GPRINDIRECT, %2.reg, %2.off}
from FSREG to IND_RC_W from FSREG to IND_RC_W
gen gen
COMMENT("move FSREG->IND_RC_W large") COMMENT("move FSREG->IND_RC_W")
addis RSCRATCH, %2.reg, {CONST, his(%2.off)} stfs %1, {GPRINDIRECT, %2.reg, %2.off}
stfs %1, {GPRINDIRECT, RSCRATCH, los(%2.off)}
from FSREG to IND_RR_W from FSREG to IND_RR_W
gen gen
@ -575,16 +521,10 @@ MOVES
/* Read double */ /* Read double */
from IND_RC_D smalls(%off) to FPR
gen
COMMENT("move IND_RC_D->FPR small")
lfd %2, {GPRINDIRECT, %1.reg, %1.off}
from IND_RC_D to FPR from IND_RC_D to FPR
gen gen
COMMENT("move IND_RC_D->FPR large") COMMENT("move IND_RC_D->FPR")
addis RSCRATCH, %1.reg, {CONST, his(%1.off)} lfd %2, {GPRINDIRECT, %1.reg, %1.off}
lfd %2, {GPRINDIRECT, RSCRATCH, los(%1.off)}
from IND_RR_D to FPR from IND_RR_D to FPR
gen gen
@ -599,16 +539,10 @@ MOVES
/* Write double */ /* Write double */
from FPR to IND_RC_D smalls(%off)
gen
COMMENT("move FPR->IND_RC_D small")
stfd %1, {GPRINDIRECT, %2.reg, %2.off}
from FPR to IND_RC_D from FPR to IND_RC_D
gen gen
COMMENT("move FPR->IND_RC_D large") COMMENT("move FPR->IND_RC_D")
addis RSCRATCH, %2.reg, {CONST, his(%2.off)} stfd %1, {GPRINDIRECT, %2.reg, %2.off}
stfd %1, {GPRINDIRECT, RSCRATCH, los(%2.off)}
from FPR to IND_RR_D from FPR to IND_RR_D
gen gen