replaced some 'move's by the move instructions; Some were just wrong

This commit is contained in:
ceriel 1988-11-14 12:43:23 +00:00
parent 33b7bac870
commit 5c4164927d
4 changed files with 112 additions and 112 deletions

View file

@ -769,7 +769,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat stl inreg($1)==reg_pointer
with any4
@ -783,7 +783,7 @@ with exact address-ext_addr
gen lea %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_pointer), all_regind %reg==regvar($1, reg_pointer)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat sil inreg($1)==reg_pointer
with any4
@ -791,7 +791,7 @@ with any4
gen move %1, {indirect4, regvar($1, reg_pointer)}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
gen move_l {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
pat sil inreg($1)==reg_any
with any4
kills allexceptcon
@ -800,7 +800,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
pat lol sbi stl $1==$3 && $2==4 && inreg($1)==reg_any
@ -1173,25 +1173,25 @@ pat lol lol adp stl sti $1==$2 && $1==$4 && $3==1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==1 && $4==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==2 && $4==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==4 && $5==4 &&
inreg($1)==reg_pointer
@ -1223,13 +1223,13 @@ pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec1, regvar($1, reg_pointer)}
gen move_b %1, {pre_dec1, regvar($1, reg_pointer)}
pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec2, regvar($1, reg_pointer)}
gen move_w %1, {pre_dec2, regvar($1, reg_pointer)}
pat lol adp stl sil $1==$3 && $1==$4 && $2==0-4 &&
inreg($1)==reg_pointer
@ -1319,7 +1319,7 @@ pat lxl $1==3
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {offsetted4, %a, SL}
@ -1346,7 +1346,7 @@ pat lxa $1==2
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {regAcon, %a, SL}
@ -1520,7 +1520,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills all_indir, LOCAL %bd==$1
gen move {post_inc4,sp}, {LOCAL, $1}
gen move_l {post_inc4,sp}, {LOCAL, $1}
pat ste
with any4
@ -1528,7 +1528,7 @@ with any4
gen move %1, {absolute4, $1}
with exact STACK
kills posextern
gen move {post_inc4, sp}, {absolute4, $1}
gen move_l {post_inc4, sp}, {absolute4, $1}
pat sil
#ifdef TBL68020
@ -1537,7 +1537,7 @@ with any4
gen move %1, {ILOCAL, $1}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {ILOCAL, $1}
gen move_l {post_inc4, sp}, {ILOCAL, $1}
#else TBL68020
with any4
kills allexceptcon
@ -1546,7 +1546,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
#endif TBL68020
pat stf
@ -1555,7 +1555,7 @@ with A_REG any4
gen move %2, {offsetted4, %1, $1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {offsetted4, %1, $1}
gen move_l {post_inc4, sp}, {offsetted4, %1, $1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd+$1}
@ -1750,7 +1750,7 @@ with A_REG any4
gen move %2, {indirect4, %1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, %1}
gen move_l {post_inc4, sp}, {indirect4, %1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd}
@ -2753,7 +2753,7 @@ with any4 STACK
gen move %1, d0
return
with STACK
gen move {post_inc4, sp}, d0
gen move_l {post_inc4, sp}, d0
return
pat ret $1==8
@ -2763,11 +2763,11 @@ with any4 any4 STACK
return
with any4 STACK
gen move %1, d0
move {post_inc4, sp}, d1
move_l {post_inc4, sp}, d1
return
with STACK
gen move {post_inc4, sp}, d0
move {post_inc4, sp}, d1
gen move_l {post_inc4, sp}, d0
move_l {post_inc4, sp}, d1
return
@ -2780,7 +2780,7 @@ with STACK
gen add_l {const, $1}, sp
pat asp
with STACK
gen move {regAcon, sp, $1}, sp
gen move_l {regAcon, sp, $1}, sp
pat ass $1==4
with any4 STACK
@ -2891,7 +2891,7 @@ pat lim yields {absolute4, ".trpim"}
pat lin
kills posextern
gen move {const, $1}, {absolute4, ".lino"}
gen move_l {const, $1}, {absolute4, ".lino"}
pat lni
kills posextern
@ -2949,8 +2949,8 @@ pat sig
with any4
kills posextern
uses AA_REG
gen move {absolute4, ".trppc"}, %a
move %1, {absolute4, ".trppc"}
gen move_l {absolute4, ".trppc"}, %a
move_l %1, {absolute4, ".trppc"}
yields %a
pat sim
@ -2961,11 +2961,11 @@ with any4
pat str $1==0
with any4 STACK
kills ALL
gen move %1, lb
gen move_l %1, lb
pat str $1==1
with any4 STACK
gen move %1, sp
gen move_l %1, sp
pat str $1==2
with STACK

View file

@ -769,7 +769,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat stl inreg($1)==reg_pointer
with any4
@ -783,7 +783,7 @@ with exact address-ext_addr
gen lea %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_pointer), all_regind %reg==regvar($1, reg_pointer)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat sil inreg($1)==reg_pointer
with any4
@ -791,7 +791,7 @@ with any4
gen move %1, {indirect4, regvar($1, reg_pointer)}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
gen move_l {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
pat sil inreg($1)==reg_any
with any4
kills allexceptcon
@ -800,7 +800,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
pat lol sbi stl $1==$3 && $2==4 && inreg($1)==reg_any
@ -1173,25 +1173,25 @@ pat lol lol adp stl sti $1==$2 && $1==$4 && $3==1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==1 && $4==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==2 && $4==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==4 && $5==4 &&
inreg($1)==reg_pointer
@ -1223,13 +1223,13 @@ pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec1, regvar($1, reg_pointer)}
gen move_b %1, {pre_dec1, regvar($1, reg_pointer)}
pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec2, regvar($1, reg_pointer)}
gen move_w %1, {pre_dec2, regvar($1, reg_pointer)}
pat lol adp stl sil $1==$3 && $1==$4 && $2==0-4 &&
inreg($1)==reg_pointer
@ -1319,7 +1319,7 @@ pat lxl $1==3
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {offsetted4, %a, SL}
@ -1346,7 +1346,7 @@ pat lxa $1==2
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {regAcon, %a, SL}
@ -1520,7 +1520,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills all_indir, LOCAL %bd==$1
gen move {post_inc4,sp}, {LOCAL, $1}
gen move_l {post_inc4,sp}, {LOCAL, $1}
pat ste
with any4
@ -1528,7 +1528,7 @@ with any4
gen move %1, {absolute4, $1}
with exact STACK
kills posextern
gen move {post_inc4, sp}, {absolute4, $1}
gen move_l {post_inc4, sp}, {absolute4, $1}
pat sil
#ifdef TBL68020
@ -1537,7 +1537,7 @@ with any4
gen move %1, {ILOCAL, $1}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {ILOCAL, $1}
gen move_l {post_inc4, sp}, {ILOCAL, $1}
#else TBL68020
with any4
kills allexceptcon
@ -1546,7 +1546,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
#endif TBL68020
pat stf
@ -1555,7 +1555,7 @@ with A_REG any4
gen move %2, {offsetted4, %1, $1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {offsetted4, %1, $1}
gen move_l {post_inc4, sp}, {offsetted4, %1, $1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd+$1}
@ -1750,7 +1750,7 @@ with A_REG any4
gen move %2, {indirect4, %1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, %1}
gen move_l {post_inc4, sp}, {indirect4, %1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd}
@ -2753,7 +2753,7 @@ with any4 STACK
gen move %1, d0
return
with STACK
gen move {post_inc4, sp}, d0
gen move_l {post_inc4, sp}, d0
return
pat ret $1==8
@ -2763,11 +2763,11 @@ with any4 any4 STACK
return
with any4 STACK
gen move %1, d0
move {post_inc4, sp}, d1
move_l {post_inc4, sp}, d1
return
with STACK
gen move {post_inc4, sp}, d0
move {post_inc4, sp}, d1
gen move_l {post_inc4, sp}, d0
move_l {post_inc4, sp}, d1
return
@ -2780,7 +2780,7 @@ with STACK
gen add_l {const, $1}, sp
pat asp
with STACK
gen move {regAcon, sp, $1}, sp
gen move_l {regAcon, sp, $1}, sp
pat ass $1==4
with any4 STACK
@ -2891,7 +2891,7 @@ pat lim yields {absolute4, ".trpim"}
pat lin
kills posextern
gen move {const, $1}, {absolute4, ".lino"}
gen move_l {const, $1}, {absolute4, ".lino"}
pat lni
kills posextern
@ -2949,8 +2949,8 @@ pat sig
with any4
kills posextern
uses AA_REG
gen move {absolute4, ".trppc"}, %a
move %1, {absolute4, ".trppc"}
gen move_l {absolute4, ".trppc"}, %a
move_l %1, {absolute4, ".trppc"}
yields %a
pat sim
@ -2961,11 +2961,11 @@ with any4
pat str $1==0
with any4 STACK
kills ALL
gen move %1, lb
gen move_l %1, lb
pat str $1==1
with any4 STACK
gen move %1, sp
gen move_l %1, sp
pat str $1==2
with STACK

View file

@ -769,7 +769,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat stl inreg($1)==reg_pointer
with any4
@ -783,7 +783,7 @@ with exact address-ext_addr
gen lea %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_pointer), all_regind %reg==regvar($1, reg_pointer)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat sil inreg($1)==reg_pointer
with any4
@ -791,7 +791,7 @@ with any4
gen move %1, {indirect4, regvar($1, reg_pointer)}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
gen move_l {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
pat sil inreg($1)==reg_any
with any4
kills allexceptcon
@ -800,7 +800,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
pat lol sbi stl $1==$3 && $2==4 && inreg($1)==reg_any
@ -1173,25 +1173,25 @@ pat lol lol adp stl sti $1==$2 && $1==$4 && $3==1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==1 && $4==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==2 && $4==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==4 && $5==4 &&
inreg($1)==reg_pointer
@ -1223,13 +1223,13 @@ pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec1, regvar($1, reg_pointer)}
gen move_b %1, {pre_dec1, regvar($1, reg_pointer)}
pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec2, regvar($1, reg_pointer)}
gen move_w %1, {pre_dec2, regvar($1, reg_pointer)}
pat lol adp stl sil $1==$3 && $1==$4 && $2==0-4 &&
inreg($1)==reg_pointer
@ -1319,7 +1319,7 @@ pat lxl $1==3
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {offsetted4, %a, SL}
@ -1346,7 +1346,7 @@ pat lxa $1==2
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {regAcon, %a, SL}
@ -1520,7 +1520,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills all_indir, LOCAL %bd==$1
gen move {post_inc4,sp}, {LOCAL, $1}
gen move_l {post_inc4,sp}, {LOCAL, $1}
pat ste
with any4
@ -1528,7 +1528,7 @@ with any4
gen move %1, {absolute4, $1}
with exact STACK
kills posextern
gen move {post_inc4, sp}, {absolute4, $1}
gen move_l {post_inc4, sp}, {absolute4, $1}
pat sil
#ifdef TBL68020
@ -1537,7 +1537,7 @@ with any4
gen move %1, {ILOCAL, $1}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {ILOCAL, $1}
gen move_l {post_inc4, sp}, {ILOCAL, $1}
#else TBL68020
with any4
kills allexceptcon
@ -1546,7 +1546,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
#endif TBL68020
pat stf
@ -1555,7 +1555,7 @@ with A_REG any4
gen move %2, {offsetted4, %1, $1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {offsetted4, %1, $1}
gen move_l {post_inc4, sp}, {offsetted4, %1, $1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd+$1}
@ -1750,7 +1750,7 @@ with A_REG any4
gen move %2, {indirect4, %1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, %1}
gen move_l {post_inc4, sp}, {indirect4, %1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd}
@ -2753,7 +2753,7 @@ with any4 STACK
gen move %1, d0
return
with STACK
gen move {post_inc4, sp}, d0
gen move_l {post_inc4, sp}, d0
return
pat ret $1==8
@ -2763,11 +2763,11 @@ with any4 any4 STACK
return
with any4 STACK
gen move %1, d0
move {post_inc4, sp}, d1
move_l {post_inc4, sp}, d1
return
with STACK
gen move {post_inc4, sp}, d0
move {post_inc4, sp}, d1
gen move_l {post_inc4, sp}, d0
move_l {post_inc4, sp}, d1
return
@ -2780,7 +2780,7 @@ with STACK
gen add_l {const, $1}, sp
pat asp
with STACK
gen move {regAcon, sp, $1}, sp
gen move_l {regAcon, sp, $1}, sp
pat ass $1==4
with any4 STACK
@ -2891,7 +2891,7 @@ pat lim yields {absolute4, ".trpim"}
pat lin
kills posextern
gen move {const, $1}, {absolute4, ".lino"}
gen move_l {const, $1}, {absolute4, ".lino"}
pat lni
kills posextern
@ -2949,8 +2949,8 @@ pat sig
with any4
kills posextern
uses AA_REG
gen move {absolute4, ".trppc"}, %a
move %1, {absolute4, ".trppc"}
gen move_l {absolute4, ".trppc"}, %a
move_l %1, {absolute4, ".trppc"}
yields %a
pat sim
@ -2961,11 +2961,11 @@ with any4
pat str $1==0
with any4 STACK
kills ALL
gen move %1, lb
gen move_l %1, lb
pat str $1==1
with any4 STACK
gen move %1, sp
gen move_l %1, sp
pat str $1==2
with STACK

View file

@ -769,7 +769,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_any), use_index %xreg==regvar($1, reg_any)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat stl inreg($1)==reg_pointer
with any4
@ -783,7 +783,7 @@ with exact address-ext_addr
gen lea %1, {LOCAL, $1}
with exact STACK
kills regvar($1, reg_pointer), all_regind %reg==regvar($1, reg_pointer)
gen move {post_inc4, sp}, {LOCAL, $1}
gen move_l {post_inc4, sp}, {LOCAL, $1}
pat sil inreg($1)==reg_pointer
with any4
@ -791,7 +791,7 @@ with any4
gen move %1, {indirect4, regvar($1, reg_pointer)}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
gen move_l {post_inc4, sp}, {indirect4, regvar($1, reg_pointer)}
pat sil inreg($1)==reg_any
with any4
kills allexceptcon
@ -800,7 +800,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
pat lol sbi stl $1==$3 && $2==4 && inreg($1)==reg_any
@ -1173,25 +1173,25 @@ pat lol lol adp stl sti $1==$2 && $1==$4 && $3==1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==1 && $4==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc1, regvar($1, reg_pointer)}
gen move_b %1, {post_inc1, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol sti lol adp stl $1==$3 && $1==$5 && $2==2 && $4==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {post_inc2, regvar($1, reg_pointer)}
gen move_w %1, {post_inc2, regvar($1, reg_pointer)}
pat lol lol adp stl sti $1==$2 && $1==$4 && $3==4 && $5==4 &&
inreg($1)==reg_pointer
@ -1223,13 +1223,13 @@ pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-1 && $5==1 &&
inreg($1)==reg_pointer
with any1
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec1, regvar($1, reg_pointer)}
gen move_b %1, {pre_dec1, regvar($1, reg_pointer)}
pat lol adp stl lol sti $1==$3 && $1==$4 && $2==0-2 && $5==2 &&
inreg($1)==reg_pointer
with any2
kills allexceptcon, regvar($1, reg_pointer)
gen move %1, {pre_dec2, regvar($1, reg_pointer)}
gen move_w %1, {pre_dec2, regvar($1, reg_pointer)}
pat lol adp stl sil $1==$3 && $1==$4 && $2==0-4 &&
inreg($1)==reg_pointer
@ -1319,7 +1319,7 @@ pat lxl $1==3
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {offsetted4, %a, SL}
@ -1346,7 +1346,7 @@ pat lxa $1==2
uses AA_REG = {OFF_off4, lb, SL, SL}
#else TBL68020
uses AA_REG = {LOCAL, SL}
gen move {offsetted4, %a, SL}, %a
gen move_l {offsetted4, %a, SL}, %a
#endif TBL68020
yields {regAcon, %a, SL}
@ -1520,7 +1520,7 @@ with any4
gen move %1, {LOCAL, $1}
with exact STACK
kills all_indir, LOCAL %bd==$1
gen move {post_inc4,sp}, {LOCAL, $1}
gen move_l {post_inc4,sp}, {LOCAL, $1}
pat ste
with any4
@ -1528,7 +1528,7 @@ with any4
gen move %1, {absolute4, $1}
with exact STACK
kills posextern
gen move {post_inc4, sp}, {absolute4, $1}
gen move_l {post_inc4, sp}, {absolute4, $1}
pat sil
#ifdef TBL68020
@ -1537,7 +1537,7 @@ with any4
gen move %1, {ILOCAL, $1}
with exact STACK
kills allexceptcon
gen move {post_inc4, sp}, {ILOCAL, $1}
gen move_l {post_inc4, sp}, {ILOCAL, $1}
#else TBL68020
with any4
kills allexceptcon
@ -1546,7 +1546,7 @@ with any4
with exact STACK
kills allexceptcon
uses AA_REG = {LOCAL, $1}
gen move {post_inc4, sp}, {indirect4, %a}
gen move_l {post_inc4, sp}, {indirect4, %a}
#endif TBL68020
pat stf
@ -1555,7 +1555,7 @@ with A_REG any4
gen move %2, {offsetted4, %1, $1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {offsetted4, %1, $1}
gen move_l {post_inc4, sp}, {offsetted4, %1, $1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd+$1}
@ -1750,7 +1750,7 @@ with A_REG any4
gen move %2, {indirect4, %1}
with A_REG STACK
kills allexceptcon
gen move {post_inc4, sp}, {indirect4, %1}
gen move_l {post_inc4, sp}, {indirect4, %1}
with exact local_addr any4
kills allexceptcon
gen move %2, {LOCAL, %1.bd}
@ -2753,7 +2753,7 @@ with any4 STACK
gen move %1, d0
return
with STACK
gen move {post_inc4, sp}, d0
gen move_l {post_inc4, sp}, d0
return
pat ret $1==8
@ -2763,11 +2763,11 @@ with any4 any4 STACK
return
with any4 STACK
gen move %1, d0
move {post_inc4, sp}, d1
move_l {post_inc4, sp}, d1
return
with STACK
gen move {post_inc4, sp}, d0
move {post_inc4, sp}, d1
gen move_l {post_inc4, sp}, d0
move_l {post_inc4, sp}, d1
return
@ -2780,7 +2780,7 @@ with STACK
gen add_l {const, $1}, sp
pat asp
with STACK
gen move {regAcon, sp, $1}, sp
gen move_l {regAcon, sp, $1}, sp
pat ass $1==4
with any4 STACK
@ -2891,7 +2891,7 @@ pat lim yields {absolute4, ".trpim"}
pat lin
kills posextern
gen move {const, $1}, {absolute4, ".lino"}
gen move_l {const, $1}, {absolute4, ".lino"}
pat lni
kills posextern
@ -2949,8 +2949,8 @@ pat sig
with any4
kills posextern
uses AA_REG
gen move {absolute4, ".trppc"}, %a
move %1, {absolute4, ".trppc"}
gen move_l {absolute4, ".trppc"}, %a
move_l %1, {absolute4, ".trppc"}
yields %a
pat sim
@ -2961,11 +2961,11 @@ with any4
pat str $1==0
with any4 STACK
kills ALL
gen move %1, lb
gen move_l %1, lb
pat str $1==1
with any4 STACK
gen move %1, sp
gen move_l %1, sp
pat str $1==2
with STACK