Fixes: some conditionals were evaluated wrong due to the overflow bit
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ceriel
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3883860106
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5e03b1bebb
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@ -227,6 +227,7 @@ jcxz label cost(1,4).
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je label cost(1,4).
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jg label cost(1,4).
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jge label cost(1,4).
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jgt label cost(1,4).
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jl label cost(1,4).
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jle label cost(1,4).
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jne label cost(1,4).
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@ -234,6 +235,8 @@ jmp label cost(1,4).
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proccall "call" label+rm cost(1,8).
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jxx "syntax error" label cost(1,4).
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setxx "syntax error" REG:rw cost(2,4).
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setle REG:rw cost(2,4).
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setgt REG:rw cost(2,4).
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lea anyreg:rw, halfindir:ro.
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lea LOCAL:rw, halfindir:ro. /* only for register variables, UNSAFE!!! */
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leave cost(1,4).
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@ -299,6 +302,7 @@ xorw "o16 xor" rm2:rw:cc, regorconst124:ro.
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xorw "o16 xor" anyreg:rw:cc, rmorconst2:ro.
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killreg "! kill" anyreg:wo cost(0,0).
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killcc "! kill cc" kills:cc cost(0,0).
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/*****************************************************************/
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@ -2452,12 +2456,31 @@ uses REG = {ANYCON,0}
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gen test %1
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setxx* %a yields %a
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pat tlt call txx("setl")
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pat tle call txx("setle")
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pat tlt call txx("sets")
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pat teq call txx("sete")
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pat tne call txx("setne")
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pat tge call txx("setge")
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pat tgt call txx("setg")
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pat tge call txx("setns")
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/* Explicit test for TLE and TGT. We must make sure that the OC
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flag is cleared.
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*/
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pat tle
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with rm
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uses REG = {ANYCON,0}
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gen
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killcc.
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test %1
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setle %a
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yields %a
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pat tgt
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with rm
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uses REG = {ANYCON,0}
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gen
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killcc.
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test %1
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setgt %a
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yields %a
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proc txxior
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with rm REG
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@ -2657,10 +2680,25 @@ with rm STACK
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gen test %1
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jxx* {label,$1}
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pat zlt call zxx("jl")
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pat zle call zxx("jle")
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pat zge call zxx("jge")
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pat zgt call zxx("jg")
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pat zlt call zxx("js")
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pat zge call zxx("jns")
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/* Explicit test for ZLE and ZGT. We must make sure that the OC
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flag is cleared.
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*/
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pat zle
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with rm STACK
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gen
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killcc.
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test %1
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jle {label,$1}
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pat zgt
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with rm STACK
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gen
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killcc.
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test %1
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jgt {label, $1}
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pat zne
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with rm+rm1 STACK
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@ -268,6 +268,7 @@ xor anyreg:rw:cc, rmorconst:ro.
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xorb rm1:rw:cc, regorconst12:ro.
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xorb anyreg:rw:cc, rm1:ro.
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killreg "! kill" anyreg:wo cost(0,0).
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killcc "! kill cc" kills:cc cost(0,0).
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data ".sect .data".
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word ".data2" const:ro.
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@ -2644,12 +2645,32 @@ uses REG = {ANYCON,0}
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inc %a
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1: yields %a
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pat tlt call txx("jge")
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pat tle call txx("jg")
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pat tlt call txx("jns")
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pat teq call txx("jne")
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pat tne call txx("je")
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pat tge call txx("jl")
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pat tgt call txx("jle")
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pat tge call txx("js")
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/* For the next two patterns there is no I8086 test instruction (one that
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ignores the OF flag. Therefore, condition codes are killed and the test
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is done again.
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*/
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pat tgt
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with rm
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uses REG = {ANYCON, 0}
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gen killcc.
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test %1
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jle {label, 1f}
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inc %a
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1: yields %a
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pat tle
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with rm
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uses REG = {ANYCON, 0}
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gen killcc.
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test %1
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jg {label, 1f}
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inc %a
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1: yields %a
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proc txxior
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with rm REG
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@ -2658,12 +2679,30 @@ with rm REG
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or %2,{ANYCON,1}
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1: yields %2
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pat tlt ior $2==2 call txxior("jge")
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pat tle ior $2==2 call txxior("jg")
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pat tlt ior $2==2 call txxior("jns")
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pat tge ior $2==2 call txxior("js")
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pat teq ior $2==2 call txxior("jne")
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pat tne ior $2==2 call txxior("je")
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pat tge ior $2==2 call txxior("jl")
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pat tgt ior $2==2 call txxior("jle")
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/* For the next two patterns there is no I8086 test instruction (one that
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ignores the OF flag. Therefore, condition codes are killed and the test
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is done again.
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*/
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pat tle ior $2==2
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with rm REG
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gen killcc.
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test %1
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jg {label,1f}
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or %2,{ANYCON,1}
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1: yields %2
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pat tgt ior $2==2
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with rm REG
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gen killcc.
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test %1
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jle {label,1f}
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or %2,{ANYCON,1}
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1: yields %2
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proc cmixxior
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with regorconst rm REG
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@ -3013,10 +3052,24 @@ with rm STACK
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gen test %1
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jxx* {label,$1}
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pat zlt call zxx("jl")
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pat zle call zxx("jle")
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pat zge call zxx("jge")
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pat zgt call zxx("jg")
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pat zlt call zxx("js")
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pat zge call zxx("jns")
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/* For the next two patterns there is no I8086 test instruction (one that
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ignores the OF flag. Therefore, condition codes are killed and the test
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is done again.
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*/
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pat zle
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with rm STACK
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gen killcc.
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test %1
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jle {label,$1}
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pat zgt
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with rm STACK
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gen killcc.
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test %1
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jg {label,$1}
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pat zne
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with rm+rm1 STACK
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