Added 8087 support
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4 changed files with 151 additions and 0 deletions
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@ -10,7 +10,10 @@
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#define low6(z) (z & 077)
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#define fit6(z) (low6(z) == z)
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#define low3(z) (z & 07)
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#define fit3(z) (low3(z) == z)
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#define FESC 0xD8 /* escape for 8087 processor */
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extern int mrg_1,mrg_2;
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extern expr_t exp_1,exp_2;
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#ifndef ASLD
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@ -30,3 +30,13 @@
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%token <y_word> XCHG
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%token <y_word> TEST
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%token <y_word> MOV
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/* Intel 8087 coprocessor tokens */
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%token <y_word> FNOOP
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%token <y_word> FMEM
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%token <y_word> FST_I
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%token <y_word> FST_ST
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%token <y_word> FST_ST2
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%token <y_word> ST
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%type <y_valu> st_i
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@ -178,3 +178,117 @@
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0, TEST, 1, "test",
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0, MOV, 0, "movb",
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0, MOV, 1, "mov",
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/* Intel 8087 coprocessor keywords */
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0, ST, 0, "st",
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0, FNOOP, FESC+1+(0xF0<<8), "f2xm1",
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0, FNOOP, FESC+1+(0xE1<<8), "fabs",
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0, FNOOP, FESC+1+(0xE0<<8), "fchs",
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0, FNOOP, FESC+3+(0xE2<<8), "fclex",
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0, FNOOP, FESC+6+(0xD9<<8), "fcompp",
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0, FNOOP, FESC+1+(0xF6<<8), "fdecstp",
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0, FNOOP, FESC+3+(0xE1<<8), "fdisi",
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0, FNOOP, FESC+3+(0xE0<<8), "feni",
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0, FNOOP, FESC+1+(0xF7<<8), "fincstp",
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0, FNOOP, FESC+3+(0xE3<<8), "finit",
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0, FNOOP, FESC+1+(0xE8<<8), "fld1",
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0, FNOOP, FESC+1+(0xEA<<8), "fldl2e",
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0, FNOOP, FESC+1+(0xE9<<8), "fldl2t",
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0, FNOOP, FESC+1+(0xEC<<8), "fldlg2",
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0, FNOOP, FESC+1+(0xED<<8), "fldln2",
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0, FNOOP, FESC+1+(0xEB<<8), "fldpi",
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0, FNOOP, FESC+1+(0xEE<<8), "fldz",
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0, FNOOP, FESC+1+(0xD0<<8), "fnop",
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0, FNOOP, FESC+1+(0xF3<<8), "fpatan",
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0, FNOOP, FESC+1+(0xF8<<8), "fprem",
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0, FNOOP, FESC+1+(0xF2<<8), "fptan",
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0, FNOOP, FESC+1+(0xFC<<8), "frndint",
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0, FNOOP, FESC+1+(0xFD<<8), "fscale",
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0, FNOOP, FESC+1+(0xFA<<8), "fsqrt",
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/* 0, FNOOP, FESC+7+(0xE0<<8), "fstswax", /* 80287 */
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0, FNOOP, FESC+1+(0xE4<<8), "ftst",
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0, FNOOP, FESC+1+(0xE5<<8), "fxam",
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0, FNOOP, FESC+1+(0xF4<<8), "fxtract",
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0, FNOOP, FESC+1+(0xF1<<8), "fyl2x",
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0, FNOOP, FESC+1+(0xF9<<8), "fyl2pi",
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0, FMEM, FESC+6+(0<<11), "fiadds",
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0, FMEM, FESC+2+(0<<11), "fiaddl",
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0, FMEM, FESC+0+(0<<11), "fadds",
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0, FMEM, FESC+4+(0<<11), "faddd",
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0, FMEM, FESC+7+(4<<11), "fbld",
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0, FMEM, FESC+7+(6<<11), "fbstp",
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0, FMEM, FESC+6+(2<<11), "ficoms",
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0, FMEM, FESC+2+(2<<11), "ficoml",
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0, FMEM, FESC+0+(2<<11), "fcoms",
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0, FMEM, FESC+4+(2<<11), "fcomd",
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0, FMEM, FESC+6+(3<<11), "ficomps",
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0, FMEM, FESC+2+(3<<11), "ficompl",
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0, FMEM, FESC+0+(3<<11), "fcomps",
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0, FMEM, FESC+4+(3<<11), "fcompd",
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0, FMEM, FESC+6+(6<<11), "fidivs",
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0, FMEM, FESC+2+(6<<11), "fidivl",
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0, FMEM, FESC+0+(6<<11), "fdivs",
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0, FMEM, FESC+4+(6<<11), "fdivd",
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0, FMEM, FESC+6+(7<<11), "fidivrs",
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0, FMEM, FESC+2+(7<<11), "fidivrl",
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0, FMEM, FESC+0+(7<<11), "fdivrs",
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0, FMEM, FESC+4+(7<<11), "fdivrd",
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0, FMEM, FESC+7+(5<<11), "fildq",
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0, FMEM, FESC+7+(0<<11), "filds",
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0, FMEM, FESC+3+(0<<11), "fildl",
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0, FMEM, FESC+1+(0<<11), "flds",
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0, FMEM, FESC+5+(0<<11), "fldd",
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0, FMEM, FESC+3+(5<<11), "fldx",
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0, FMEM, FESC+1+(5<<11), "fldcw",
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0, FMEM, FESC+1+(4<<11), "fldenv",
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0, FMEM, FESC+6+(1<<11), "fimuls",
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0, FMEM, FESC+2+(1<<11), "fimull",
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0, FMEM, FESC+0+(1<<11), "fmuls",
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0, FMEM, FESC+4+(1<<11), "fmuld",
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0, FMEM, FESC+5+(4<<11), "frstor",
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0, FMEM, FESC+5+(6<<11), "fsave",
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0, FMEM, FESC+7+(2<<11), "fists",
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0, FMEM, FESC+3+(2<<11), "fistl",
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0, FMEM, FESC+1+(2<<11), "fsts",
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0, FMEM, FESC+5+(2<<11), "fstd",
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0, FMEM, FESC+7+(7<<11), "fistpq",
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0, FMEM, FESC+7+(3<<11), "fistps",
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0, FMEM, FESC+3+(3<<11), "fistpl",
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0, FMEM, FESC+1+(3<<11), "fstps",
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0, FMEM, FESC+5+(3<<11), "fstpd",
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0, FMEM, FESC+3+(7<<11), "fstpx",
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0, FMEM, FESC+1+(7<<11), "fstcw",
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0, FMEM, FESC+1+(6<<11), "fstenv",
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0, FMEM, FESC+5+(7<<11), "fstsw",
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0, FMEM, FESC+6+(4<<11), "fisubs",
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0, FMEM, FESC+2+(4<<11), "fisubl",
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0, FMEM, FESC+0+(4<<11), "fsubs",
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0, FMEM, FESC+4+(4<<11), "fsubd",
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0, FMEM, FESC+6+(5<<11), "fisubrs",
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0, FMEM, FESC+2+(5<<11), "fisubrl",
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0, FMEM, FESC+0+(5<<11), "fsubrs",
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0, FMEM, FESC+4+(5<<11), "fsubrd",
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0, FST_I, FESC+1+(0xC0<<8), "fld",
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0, FST_I, FESC+5+(0xD0<<8), "fst",
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0, FST_I, FESC+5+(0xC8<<8), "fstp",
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0, FST_I, FESC+1+(0xC8<<8), "fxch",
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0, FST_I, FESC+0+(0xD0<<8), "fcom",
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0, FST_I, FESC+0+(0xD8<<8), "fcomp",
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0, FST_I, FESC+5+(0xC0<<8), "ffree",
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0, FST_ST, FESC+0+(0xC0<<8), "fadd",
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0, FST_ST, FESC+2+(0xC0<<8), "faddp",
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0, FST_ST2, FESC+0+(0xF0<<8), "fdiv",
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0, FST_ST2, FESC+2+(0xF0<<8), "fdivp",
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0, FST_ST2, FESC+0+(0xF8<<8), "fdivr",
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0, FST_ST2, FESC+2+(0xF8<<8), "fdivrp",
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0, FST_ST, FESC+0+(0xC8<<8), "fmul",
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0, FST_ST, FESC+2+(0xC8<<8), "fmulp",
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0, FST_ST2, FESC+0+(0xE0<<8), "fsub",
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0, FST_ST2, FESC+2+(0xE0<<8), "fsubp",
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0, FST_ST2, FESC+0+(0xE8<<8), "fsubr",
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0, FST_ST2, FESC+2+(0xE8<<8), "fsubrp",
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@ -84,6 +84,30 @@ oper : NOOP_1
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{ test($1);}
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| MOV ea_ea
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{ mov($1);}
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/* Intel 8087 coprocessor instructions */
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| FNOOP
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{ emit1($1); emit1($1>>8);}
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| FMEM mem
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{ emit1($1); ea_2(($1>>8)&070);}
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| FST_I st_i
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{ emit1($1); emit1(($1>>8)|$2); }
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| FST_I ST
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{ emit1($1); emit1($1>>8); }
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| FST_ST ST ',' st_i
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{ emit1($1); emit1(($1>>8)|$4); }
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| FST_ST st_i ',' ST
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{ emit1($1|4); emit1((($1>>8)|$2)); }
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| FST_ST2 st_i ',' ST
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{ emit1($1|4); emit1((($1>>8)|$2)^010); }
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;
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st_i : ST '(' absexp ')'
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{ if (!fit3($3)) {
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serror("illegal index in FP stack");
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}
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$$ = $3;
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}
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;
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mem : '(' expr ')'
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{ mrg_2 = 6; exp_2 = $2;
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RELOMOVE(rel_2, relonami);
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