Added some patterns
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@ -61,6 +61,7 @@ move.l DREG,DREG2 : move.l DREG2,DREG -> move.l DREG,DREG2 ;
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move.l DREG,AREG : move.l AREG,DREG -> move.l DREG,AREG : tst.l DREG ;
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move.l AREG,DREG : move.l DREG,AREG -> move.l AREG,DREG ;
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move.w DREG,DREG2 : move.w DREG2,DREG -> move.w DREG,DREG2 ;
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move.l AREG,AREG -> ;
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/* register subsumption */
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move.w DREG,A : ANY A,X
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