Add fef 4, fif 4. Improve fef 8, fif 8. Other float changes.
When I wrote fef 8, I forgot to test denormalized numbers. Oops. Now fix two of my mistakes: - When checking for zero, `extrwi r6, r3, 22, 12` needs to be `extrwi r6, r3, 20, 12`. There are only 20 bits to extract. - After the multiplication by 2**64, I forgot to put the fraction in [0.5, 1) or (-1, 0.5] by setting IEEE exponent = 1022. Teach fif 8 about signed zero and NaN. In ncg/table, change cmf so NaN is not equal to any value, and comment why ordered comparisons don't work with NaN. Also add cost for fctwiz, remove extra `uses REG`. Edit comment in cfu8.s because the conditional branch might be before or after fctwiz.
This commit is contained in:
parent
f1304e1a3c
commit
66f93f08c5
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@ -6,7 +6,7 @@ for _, plat in ipairs(vars.plats) do
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acklibrary {
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acklibrary {
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name = "lib_"..plat,
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name = "lib_"..plat,
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srcs = {
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srcs = {
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"./*.s", -- cfu8.s
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"./*.s", -- fif4.s
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},
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},
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vars = { plat = plat },
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vars = { plat = plat },
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deps = {
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deps = {
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@ -42,6 +42,8 @@
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! 1: yields r3 = the converted value.
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! 1: yields r3 = the converted value.
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!
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!
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! Debian's clang 3.5.0-10 and gcc 4.9.2-10 don't clamp the value
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! Debian's clang 3.5.0-10 and gcc 4.9.2-10 don't clamp the value
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! before conversion. They avoid fsel and put the conditional branch
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! before conversion. They avoid fsel and use the conditional branch
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! before fctwiz. PowerPC 601 lacks fsel (but kernel might trap and
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! to pick between 2 fctwiz instructions.
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! emulate fsel). PowerPC 603, 604, G3, G4, G5 have fsel.
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!
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! PowerPC 601 lacks fsel (but kernel might trap and emulate fsel).
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! PowerPC 603, 604, G3, G4, G5 have fsel.
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48
mach/powerpc/libem/fef4.s
Normal file
48
mach/powerpc/libem/fef4.s
Normal file
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@ -0,0 +1,48 @@
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.sect .text
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! Split a single-precision float into fraction and exponent, like
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! frexpf(3) in C, http://en.cppreference.com/w/c/numeric/math/frexp
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!
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! Stack: ( single -- fraction exponent )
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.define .fef4
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.fef4:
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lwz r3, 0(sp) ! r3 = word of float bits
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! IEEE single = sign * 1.fraction * 2**(exponent - 127)
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! sign exponent fraction
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! 0 1..8 9..31
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!
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! IEEE exponent = 126 in [0.5, 1) or (-1, -0.5].
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extrwi. r6, r3, 8, 1 ! r6 = IEEE exponent
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beq 3f ! jump if zero or denormalized
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cmpwi r6, 255
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addi r5, r6, -126 ! r5 = our exponent
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beq 2f ! jump if infinity or NaN
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! fall through if normalized
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! Put fraction in [0.5, 1) or (-1, -0.5].
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1: li r6, 126
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insrwi r3, r6, 8, 1 ! IEEE exponent = 126
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! fall through
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2: stw r3, 0(sp) ! push fraction
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stwu r5, -4(sp) ! push exponent
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blr
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! Got denormalized number or zero, probably zero.
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! If zero, then exponent must also be zero.
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3: extrwi. r6, r3, 23, 9 ! r6 = fraction
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bne 4f ! jump if not zero
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li r5, 0 ! exponent = 0
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b 2b
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! Got denormalized number = 0.fraction * 2**-126
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4: cntlzw r5, r6
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addi r5, r5, -8
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slw r6, r6, r5 ! shift left to make 1.fraction
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insrwi r3, r6, 23, 9 ! set new fraction
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li r6, -126 + 1
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subf r5, r5, r6 ! r5 = our exponent
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b 1b
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@ -3,7 +3,7 @@
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.sect .text
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.sect .text
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! Split a double-precision float into fraction and exponent, like
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! Split a double-precision float into fraction and exponent, like
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! frexp(3) in C.
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! frexp(3) in C, http://en.cppreference.com/w/c/numeric/math/frexp
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!
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!
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! Stack: ( double -- fraction exponent )
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! Stack: ( double -- fraction exponent )
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@ -12,42 +12,41 @@
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lwz r3, 0(sp) ! r3 = high word (bits 0..31)
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lwz r3, 0(sp) ! r3 = high word (bits 0..31)
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lwz r4, 4(sp) ! r4 = low word (bits 32..63)
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lwz r4, 4(sp) ! r4 = low word (bits 32..63)
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! IEEE double-precision format:
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! IEEE double = sign * 1.fraction * 2**(exponent - 1023)
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! sign exponent fraction
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! sign exponent fraction
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! 0 1..11 12..63
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! 0 1..11 12..63
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!
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!
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! To get fraction in [0.5, 1) or (-1, -0.5], we subtract 1022
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! IEEE exponent = 1022 in [0.5, 1) or (-1, -0.5].
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! from the IEEE exponent.
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extrwi. r6, r3, 11, 1 ! r6 = IEEE exponent
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extrwi. r6, r3, 11, 1 ! r6 = IEEE exponent
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addi r5, r6, -1022 ! r5 = our exponent
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beq 3f ! jump if zero or denormalized
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beq 2f ! jump if zero or denormalized
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cmpwi r6, 2047
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cmpwi r6, 2047
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beq 1f ! jump if infinity or NaN
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addi r5, r6, -1022 ! r5 = our exponent
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beq 2f ! jump if infinity or NaN
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! fall through if normalized
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! fall through if normalized
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! Put fraction in [0.5, 1) or (-1, -0.5] by setting its
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! Put fraction in [0.5, 1) or (-1, -0.5].
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! IEEE exponent to 1022.
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1: li r6, 1022
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rlwinm r3, r3, 0, 12, 0 ! clear old exponent
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insrwi r3, r6, 11, 1 ! IEEE exponent = 1022
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oris r3, r3, 1022 << 4 ! set new exponent
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! fall through
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! fall through
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1: stw r3, 0(sp)
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2: stw r3, 0(sp)
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stw r4, 4(sp) ! push fraction
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stw r4, 4(sp) ! push fraction
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stwu r5, -4(sp) ! push exponent
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stwu r5, -4(sp) ! push exponent
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blr
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blr
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2: ! Got denormalized number or zero, probably zero.
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! Got denormalized number or zero, probably zero.
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extrwi r6, r3, 22, 12
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! If zero, then exponent must also be zero.
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3: extrwi r6, r3, 20, 12
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or. r6, r6, r4 ! r6 = high|low fraction
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or. r6, r6, r4 ! r6 = high|low fraction
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bne 3f ! jump if not zero
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bne 4f ! jump if not zero
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li r5, 0 ! exponent = 0
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li r5, 0 ! exponent = 0
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b 1b
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b 2b
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3: ! Got denormalized number, not zero.
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! Got denormalized number = 0.fraction * 2**-1022
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lfd f0, 0(sp)
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4: lfd f0, 0(sp)
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lis r6, ha16[_2_64]
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lis r6, ha16[.fs_2_64]
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lfd f1, lo16[_2_64](r6)
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lfs f1, lo16[.fs_2_64](r6)
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fmul f0, f0, f1 ! multiply it by 2**64
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fmul f0, f0, f1 ! multiply it by 2**64
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stfd f0, 0(sp)
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stfd f0, 0(sp)
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lwz r3, 0(sp)
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lwz r3, 0(sp)
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@ -57,7 +56,6 @@
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b 1b
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b 1b
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.sect .rom
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.sect .rom
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_2_64:
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.fs_2_64:
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! (double) 2**64
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!float 1.84467440737095516e+19 sz 4
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.data4 0x43f00000
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.data1 0137,0200,00,00
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.data4 0x00000000
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64
mach/powerpc/libem/fif4.s
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64
mach/powerpc/libem/fif4.s
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@ -0,0 +1,64 @@
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.sect .text
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! Multiplies two single-precision floats, then splits the product into
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! fraction and integer, both as floats, like modff(3) in C,
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! http://en.cppreference.com/w/c/numeric/math/modf
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!
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! Stack: ( a b -- fraction integer )
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.define .fif4
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.fif4:
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lfs f1, 4(sp)
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lfs f2, 0(sp)
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fmuls f1, f1, f2 ! f1 = a * b
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stfs f1, 0(sp)
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lwz r3, 0(sp) ! r3 = word of float bits
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! IEEE single = sign * 1.fraction * 2**(exponent - 127)
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! sign exponent fraction
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! 0 1..8 9..31
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!
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! Subtract 127 from the IEEE exponent. If the result is from
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! 0 to 23, then the IEEE fraction has that many integer bits.
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extrwi r5, r3, 8, 1 ! r5 = IEEE exponent
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addic. r5, r5, -127 ! r5 = nr of integer bits
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blt 3f ! branch if no integer
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cmpwi r5, 24
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bge 4f ! branch if no fraction
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! fall through if integer with fraction
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! f1 has r5 = 0 to 23 integer bits in the IEEE fraction.
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! There are 23 - r5 fraction bits.
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li r6, 23
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subf r6, r5, r6
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srw r3, r3, r6
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slw r3, r3, r6 ! clear fraction in word
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! fall through
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1: stw r3, 0(sp)
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lfs f2, 0(sp) ! integer = high word, low word
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fsubs f1, f1, f2 ! fraction = value - integer
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2: stfs f1, 4(sp) ! push fraction
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stfs f2, 0(sp) ! push integer
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blr
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! f1 is a fraction without integer (or zero).
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! Then integer is zero with same sign.
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3: extlwi r3, r3, 1, 0 ! extract sign bit
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stfs f1, 4(sp) ! push fraction
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stw r3, 0(sp) ! push integer = zero with sign
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blr
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! f1 is an integer without fraction (or infinity or NaN).
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! Unless NaN, then fraction is zero with same sign.
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4: fcmpu cr0, f1, f1
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bun cr0, 5f
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extlwi r3, r3, 1, 0 ! extract sign bit
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stw r3, 4(sp) ! push fraction = zero with sign
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stfs f1, 0(sp) ! push integer
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blr
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! f1 is NaN, so both fraction and integer are NaN.
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5: fmr f2, f1
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b 2b
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@ -1,7 +1,8 @@
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.sect .text
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.sect .text
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! Multiplies two double-precision floats, then splits the product into
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! Multiplies two double-precision floats, then splits the product into
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! fraction and integer, like modf(3) in C. On entry:
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! fraction and integer, both as floats, like modf(3) in C,
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! http://en.cppreference.com/w/c/numeric/math/modf
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!
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!
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! Stack: ( a b -- fraction integer )
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! Stack: ( a b -- fraction integer )
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@ -14,20 +15,18 @@
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lwz r3, 0(sp) ! r3 = high word
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lwz r3, 0(sp) ! r3 = high word
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lwz r4, 4(sp) ! r4 = low word
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lwz r4, 4(sp) ! r4 = low word
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! IEEE double-precision format:
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! IEEE double = sign * 1.fraction * 2**(exponent - 1023)
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! sign exponent fraction
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! sign exponent fraction
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! 0 1..11 12..63
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! 0 1..11 12..63
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!
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!
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! Subtract 1023 from the IEEE exponent. If the result is from
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! Subtract 1023 from the IEEE exponent. If the result is from
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! 0 to 51, then the IEEE fraction has that many integer bits.
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! 0 to 51, then the IEEE fraction has that many integer bits.
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! (IEEE has an implicit 1 before its fraction. If the IEEE
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! fraction has 0 integer bits, we still have an integer.)
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extrwi r5, r3, 11, 1 ! r5 = IEEE exponent
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extrwi r5, r3, 11, 1 ! r5 = IEEE exponent
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addic. r5, r5, -1023 ! r5 = nr of integer bits
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addic. r5, r5, -1023 ! r5 = nr of integer bits
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blt 4f ! branch if no integer
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blt 3f ! branch if no integer
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cmpwi r5, 52
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cmpwi r5, 52
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bge 5f ! branch if no fraction
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bge 4f ! branch if no fraction
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cmpwi r5, 21
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cmpwi r5, 21
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bge 6f ! branch if large integer
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bge 6f ! branch if large integer
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! fall through if small integer
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! fall through if small integer
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@ -44,22 +43,38 @@
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1: stw r3, 0(sp)
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1: stw r3, 0(sp)
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stw r4, 4(sp)
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stw r4, 4(sp)
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lfd f2, 0(sp) ! integer = high word, low word
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lfd f2, 0(sp) ! integer = high word, low word
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2: fsub f1, f1, f2 ! fraction = value - integer
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fsub f1, f1, f2 ! fraction = value - integer
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3: stfd f1, 8(sp) ! push fraction
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2: stfd f1, 8(sp) ! push fraction
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stfd f2, 0(sp) ! push integer
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stfd f2, 0(sp) ! push integer
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blr
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blr
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4: ! f1 is a fraction without integer.
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! f1 is a fraction without integer (or zero).
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fsub f2, f1, f1 ! integer = zero
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! Then integer is zero with same sign.
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b 3b
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3: extlwi r3, r3, 1, 0 ! extract sign bit
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li r4, 0
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stfd f1, 8(sp) ! push fraction
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stw r4, 4(sp)
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stw r3, 0(sp) ! push integer = zero with sign
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blr
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5: ! f1 is an integer without fraction (or infinity or NaN).
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! f1 is an integer without fraction (or infinity or NaN).
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fmr f2, f1 ! integer = f1
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! Unless NaN, then fraction is zero with same sign.
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4: fcmpu cr0, f1, f1 ! integer = f1
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bun cr0, 5f
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extlwi r3, r3, 1, 0 ! extract sign bit
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li r4, 0
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stw r4, 12(sp)
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stw r3, 8(sp) ! push fraction = zero with sign
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stfd f1, 0(sp) ! push integer
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blr
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! f1 is NaN, so both fraction and integer are NaN.
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5: fmr f2, f1
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b 2b
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b 2b
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6: ! f1 has r5 = 21 to 51 to integer bits.
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! f1 has r5 = 21 to 51 to integer bits.
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! Low word has 52 - r5 fraction bits.
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! Low word has 52 - r5 fraction bits.
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li r6, 52
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6: li r6, 52
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subf r6, r5, r6
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subf r6, r5, r6
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srw r4, r4, r6
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srw r4, r4, r6
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slw r4, r4, r6 ! clear fraction in low word
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slw r4, r4, r6 ! clear fraction in low word
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@ -310,7 +310,7 @@ INSTRUCTIONS
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fadds FSREG+LOCAL:wo, FSREG:ro, FSREG:ro cost(4, 5).
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fadds FSREG+LOCAL:wo, FSREG:ro, FSREG:ro cost(4, 5).
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fcmpo CR:wo, FREG:ro, FREG:ro cost(4, 5).
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fcmpo CR:wo, FREG:ro, FREG:ro cost(4, 5).
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fcmpo CR:wo, FSREG:ro, FSREG:ro cost(4, 5).
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fcmpo CR:wo, FSREG:ro, FSREG:ro cost(4, 5).
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fctiwz FREG:wo, FREG:ro.
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fctiwz FREG:wo, FREG:ro cost(4, 5).
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fdiv FREG+DLOCAL:wo, FREG:ro, FREG:ro cost(4, 35).
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fdiv FREG+DLOCAL:wo, FREG:ro, FREG:ro cost(4, 35).
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fdivs FSREG+LOCAL:wo, FSREG:ro, FSREG:ro cost(4, 21).
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fdivs FSREG+LOCAL:wo, FSREG:ro, FSREG:ro cost(4, 21).
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fmr FPR:wo, FPR:ro cost(4, 5).
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fmr FPR:wo, FPR:ro cost(4, 5).
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@ -2329,10 +2329,20 @@ PATTERNS
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with FSREG
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with FSREG
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gen fneg {LOCAL, $2}, %1
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gen fneg {LOCAL, $2}, %1
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/* When a or b is NaN, then a < b, a <= b, a > b, a >= b
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* should all be false. We can't make them false, because
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* - EM's _cmf_ is only for ordered comparisons.
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* - The peephole optimizer assumes (a < b) == !(a >= b).
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*
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* We do make a == b false and a != b true, by checking the
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* eq (equal) bit or un (unordered) bit in cr0.
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*/
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pat cmf $1==4 /* Compare single */
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pat cmf $1==4 /* Compare single */
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with FSREG FSREG
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with FSREG FSREG
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uses REG={COND_FS, %2, %1}
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uses REG={COND_FS, %2, %1}
|
||||||
gen extlwi %a, %a, {C, 2}, {C, 0}
|
/* Extract lt, gt, un; put lt in sign bit. */
|
||||||
|
gen andisX %a, %a, {C, 0xd000}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
pat cmf teq $1==4 /* Single second == top */
|
pat cmf teq $1==4 /* Single second == top */
|
||||||
|
@ -2367,7 +2377,6 @@ PATTERNS
|
||||||
|
|
||||||
proc cmf4zxx example cmf zeq
|
proc cmf4zxx example cmf zeq
|
||||||
with FSREG FSREG STACK
|
with FSREG FSREG STACK
|
||||||
uses REG
|
|
||||||
gen
|
gen
|
||||||
fcmpo cr0, %2, %1
|
fcmpo cr0, %2, %1
|
||||||
bxx* {LABEL, $2}
|
bxx* {LABEL, $2}
|
||||||
|
@ -2420,6 +2429,13 @@ PATTERNS
|
||||||
loc 4
|
loc 4
|
||||||
cff
|
cff
|
||||||
|
|
||||||
|
pat fef $1==4 /* Split fraction, exponent */
|
||||||
|
leaving cal ".fef4"
|
||||||
|
|
||||||
|
/* Multiply two singles, then split fraction, integer */
|
||||||
|
pat fif $1==4
|
||||||
|
leaving cal ".fif4"
|
||||||
|
|
||||||
|
|
||||||
/* Double-precision floating-point */
|
/* Double-precision floating-point */
|
||||||
|
|
||||||
|
@ -2471,10 +2487,13 @@ PATTERNS
|
||||||
with FREG
|
with FREG
|
||||||
gen fneg {DLOCAL, $2}, %1
|
gen fneg {DLOCAL, $2}, %1
|
||||||
|
|
||||||
|
/* To compare NaN, see comment above pat cmf $1==4 */
|
||||||
|
|
||||||
pat cmf $1==8 /* Compare double */
|
pat cmf $1==8 /* Compare double */
|
||||||
with FREG FREG
|
with FREG FREG
|
||||||
uses REG={COND_FD, %2, %1}
|
uses REG={COND_FD, %2, %1}
|
||||||
gen extlwi %a, %a, {C, 2}, {C, 0}
|
/* Extract lt, gt, un; put lt in sign bit. */
|
||||||
|
gen andisX %a, %a, {C, 0xd000}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
pat cmf teq $1==8 /* Double second == top */
|
pat cmf teq $1==8 /* Double second == top */
|
||||||
|
@ -2482,7 +2501,7 @@ PATTERNS
|
||||||
uses REG={COND_FD, %2, %1}
|
uses REG={COND_FD, %2, %1}
|
||||||
yields {XEQ, %a}
|
yields {XEQ, %a}
|
||||||
|
|
||||||
pat cmf tne $1==8 /* Single second == top */
|
pat cmf tne $1==8 /* Double second == top */
|
||||||
with FREG FREG
|
with FREG FREG
|
||||||
uses REG={COND_FD, %2, %1}
|
uses REG={COND_FD, %2, %1}
|
||||||
yields {XNE, %a}
|
yields {XNE, %a}
|
||||||
|
@ -2509,7 +2528,6 @@ PATTERNS
|
||||||
|
|
||||||
proc cmf8zxx example cmf zeq
|
proc cmf8zxx example cmf zeq
|
||||||
with FREG FREG STACK
|
with FREG FREG STACK
|
||||||
uses REG
|
|
||||||
gen
|
gen
|
||||||
fcmpo cr0, %2, %1
|
fcmpo cr0, %2, %1
|
||||||
bxx* {LABEL, $2}
|
bxx* {LABEL, $2}
|
||||||
|
|
Loading…
Reference in a new issue