Tweak some tokens in PowerPC ncg.
Remove the GPRINDIRECT token, and use the IND_RC_* tokens as operands to instructions. We no longer need to unpack an IND_RC_* token and repack it as a GPRINDIRECT to use it in an instruction. Allow storing IND_ALL_B and IND_ALL_H in register variables. Create a set ANY_BHW for anything that we can store in a regvar. Push register variables on the stack without using GPRE, by changing stwu to accept LOCAL. Then ncg will replace the string ">>> BUG IN LOCAL" with the register name. (I copied ">>> BUG IN LOCAL" from mach/arm/ncg/table.) Fix the rule for "pat lil inreg($1)>0" to yield a IND_RC_W token, not a register. We might need to kill the token with "kills MEMORY". Rename CONST_ALL to CONST_STACK, because it only includes constants on the stack, and excludes CONST tokens. Instructions still don't allow CONST_STACK operands, so we still need to repack each CONST_STACK as a CONST to use it in an instruction. Rename LABEL_OFFSET_HI to just LABEL_HI, and same for LABEL_HA and LABEL_HO.
This commit is contained in:
parent
1bf58cf51c
commit
7255ed403f
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@ -157,17 +157,16 @@ TOKENS
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/* Used only in instruction descriptions (to generate the correct syntax). */
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/* Used only in instruction descriptions (to generate the correct syntax). */
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GPRINDIRECT = { GPR reg; INT off; } 4 off "(" reg ")".
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GPRINDIRECT_OFFSET_LO = { GPR reg; ADDR adr; } 4 "lo16[" adr "](" reg ")".
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GPRINDIRECT_OFFSET_LO = { GPR reg; ADDR adr; } 4 "lo16[" adr "](" reg ")".
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CONST = { INT val; } 4 val.
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CONST = { INT val; } 4 val.
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/* Primitives */
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/* Primitives */
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LABEL = { ADDR adr; } 4 adr.
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LABEL = { ADDR adr; } 4 adr.
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LABEL_OFFSET_HI = { ADDR adr; } 4 "hi16[" adr "]".
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LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]".
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LABEL_OFFSET_HA = { ADDR adr; } 4 "ha16[" adr "]".
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LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]".
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LABEL_OFFSET_LO = { ADDR adr; } 4 "lo16[" adr "]".
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LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]".
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LOCAL = { INT off; } 4.
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LOCAL = { INT off; } 4 ">>> BUG IN LOCAL".
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/* Allows us to use regvar() to refer to registers */
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/* Allows us to use regvar() to refer to registers */
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@ -192,15 +191,15 @@ TOKENS
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SEX_B = { GPR reg; } 4.
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SEX_B = { GPR reg; } 4.
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SEX_H = { GPR reg; } 4.
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SEX_H = { GPR reg; } 4.
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IND_RC_B = { GPR reg; INT off; } 4.
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IND_RC_B = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_B = { GPR reg1; GPR reg2; } 4.
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IND_RR_B = { GPR reg1; GPR reg2; } 4.
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IND_RC_H = { GPR reg; INT off; } 4.
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IND_RC_H = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_H = { GPR reg1; GPR reg2; } 4.
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IND_RR_H = { GPR reg1; GPR reg2; } 4.
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IND_RC_H_S = { GPR reg; INT off; } 4.
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IND_RC_H_S = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_H_S = { GPR reg1; GPR reg2; } 4.
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IND_RR_H_S = { GPR reg1; GPR reg2; } 4.
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IND_RC_W = { GPR reg; INT off; } 4.
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IND_RC_W = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_W = { GPR reg1; GPR reg2; } 4.
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IND_RR_W = { GPR reg1; GPR reg2; } 4.
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IND_RC_D = { GPR reg; INT off; } 8.
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IND_RC_D = { GPR reg; INT off; } 8 off "(" reg ")".
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IND_RR_D = { GPR reg1; GPR reg2; } 8.
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IND_RR_D = { GPR reg1; GPR reg2; } 8.
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NOT_R = { GPR reg; } 4.
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NOT_R = { GPR reg; } 4.
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@ -237,7 +236,7 @@ SETS
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/* unsigned 16-bit integer */
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/* unsigned 16-bit integer */
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UCONST2 = CONST_0000_7FFF + CONST_8000 + CONST_8001_FFFF.
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UCONST2 = CONST_0000_7FFF + CONST_8000 + CONST_8001_FFFF.
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/* any constant on stack */
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/* any constant on stack */
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CONST_ALL = CONST_N8000 + CONST_N7FFF_N0001 + CONST_0000_7FFF +
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CONST_STACK = CONST_N8000 + CONST_N7FFF_N0001 + CONST_0000_7FFF +
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CONST_8000 + CONST_8001_FFFF + CONST_HZ + CONST_HL.
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CONST_8000 + CONST_8001_FFFF + CONST_HZ + CONST_HL.
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SUM_ALL = SUM_RC + SUM_RR.
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SUM_ALL = SUM_RC + SUM_RR.
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@ -247,18 +246,19 @@ SETS
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LOGICAL_ALL = NOT_R + AND_RR + OR_RR + OR_RC + XOR_RR +
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LOGICAL_ALL = NOT_R + AND_RR + OR_RR + OR_RC + XOR_RR +
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XOR_RC.
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XOR_RC.
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/* indirect 4-byte value */
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/* indirect values */
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IND_ALL_B = IND_RC_B + IND_RR_B.
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IND_ALL_H = IND_RC_H + IND_RR_H + IND_RC_H_S + IND_RR_H_S.
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IND_ALL_W = IND_RC_W + IND_RR_W.
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IND_ALL_W = IND_RC_W + IND_RR_W.
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/* indirect 8-byte value */
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IND_ALL_D = IND_RC_D + IND_RR_D.
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IND_ALL_D = IND_RC_D + IND_RR_D.
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/* any indirect value that fits in a GPR */
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IND_ALL_BHW = IND_ALL_B + IND_ALL_H + IND_ALL_W.
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IND_ALL_BHW = IND_RC_B + IND_RR_B + IND_RC_H + IND_RR_H +
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IND_RC_H_S + IND_RR_H_S + IND_ALL_W.
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/* anything killed by sti (store indirect) */
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/* anything killed by sti (store indirect) */
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MEMORY = IND_ALL_BHW + IND_ALL_D.
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MEMORY = IND_ALL_BHW + IND_ALL_D.
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OP_ALL_W = SUM_ALL + SEX_ALL + LOGICAL_ALL + IND_ALL_W.
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/* any stack token that we can easily move to GPR */
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ANY_BHW = REG + CONST_STACK + LABEL + SEX_ALL +
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SUM_ALL + IND_ALL_BHW + LOGICAL_ALL.
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INSTRUCTIONS
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INSTRUCTIONS
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@ -278,7 +278,9 @@ INSTRUCTIONS
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add GPR:wo, GPR:ro, GPR:ro.
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add GPR:wo, GPR:ro, GPR:ro.
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addX "add." GPR:wo, GPR:ro, GPR:ro.
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addX "add." GPR:wo, GPR:ro, GPR:ro.
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addi GPR:wo, GPR:ro, CONST:ro.
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addi GPR:wo, GPR:ro, CONST:ro.
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addis GPR:wo, GPR:ro, CONST+LABEL_OFFSET_HI+LABEL_OFFSET_HA:ro.
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li GPR:wo, CONST:ro.
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addis GPR:wo, GPR:ro, CONST+LABEL_HI+LABEL_HA:ro.
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lis GPR:wo, CONST+LABEL_HI+LABEL_HA:ro.
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and GPR:wo, GPR:ro, GPR:ro.
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and GPR:wo, GPR:ro, GPR:ro.
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andc GPR:wo, GPR:ro, GPR:ro.
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andc GPR:wo, GPR:ro, GPR:ro.
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andiX "andi." GPR:wo:cc, GPR:ro, CONST:ro.
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andiX "andi." GPR:wo:cc, GPR:ro, CONST:ro.
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@ -326,22 +328,22 @@ INSTRUCTIONS
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frsp FSREG:wo, FREG:ro cost(4, 5).
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frsp FSREG:wo, FREG:ro cost(4, 5).
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fsub FREG:wo, FREG:ro, FREG:ro cost(4, 5).
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fsub FREG:wo, FREG:ro, FREG:ro cost(4, 5).
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fsubs FSREG:wo, FSREG:ro, FSREG:ro cost(4, 5).
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fsubs FSREG:wo, FSREG:ro, FSREG:ro cost(4, 5).
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lbz GPR:wo, GPRINDIRECT:ro cost(4, 3).
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lbz GPR:wo, IND_RC_B:ro cost(4, 3).
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lbzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lbzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lfd FPR:wo, GPRINDIRECT:ro cost(4, 5).
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lfd FPR:wo, IND_RC_D:ro cost(4, 5).
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lfdu FPR:wo, GPRINDIRECT:ro cost(4, 5).
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lfdu FPR:wo, IND_RC_D:ro cost(4, 5).
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lfdx FPR:wo, GPR:ro, GPR:ro cost(4, 5).
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lfdx FPR:wo, GPR:ro, GPR:ro cost(4, 5).
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lfs FSREG:wo, GPRINDIRECT:ro cost(4, 4).
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lfs FSREG:wo, IND_RC_W:ro cost(4, 4).
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lfsu FSREG:wo, GPRINDIRECT:rw cost(4, 4).
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lfsu FSREG:wo, IND_RC_W:rw cost(4, 4).
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lfsx FSREG:wo, GPR:ro, GPR:ro cost(4, 4).
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lfsx FSREG:wo, GPR:ro, GPR:ro cost(4, 4).
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lha GPR:wo, GPRINDIRECT:ro cost(4, 3).
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lha GPR:wo, IND_RC_H_S:ro cost(4, 3).
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lhax GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lhax GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lhz GPR:wo, GPRINDIRECT:ro cost(4, 3).
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lhz GPR:wo, IND_RC_H:ro cost(4, 3).
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lhzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lhzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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li32 GPR:wo, CONST:ro cost(8, 2).
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li32 GPR:wo, CONST:ro cost(8, 2).
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lwzu GPR:wo, GPRINDIRECT:ro cost(4, 3).
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lwzu GPR:wo, IND_RC_W:ro cost(4, 3).
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lwzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lwzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lwz GPR:wo, GPRINDIRECT+GPRINDIRECT_OFFSET_LO:ro cost(4, 3).
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lwz GPR:wo, IND_RC_W+GPRINDIRECT_OFFSET_LO:ro cost(4, 3).
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nand GPR:wo, GPR:ro, GPR:ro.
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nand GPR:wo, GPR:ro, GPR:ro.
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neg GPR:wo, GPR:ro.
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neg GPR:wo, GPR:ro.
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nor GPR:wo, GPR:ro, GPR:ro.
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nor GPR:wo, GPR:ro, GPR:ro.
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@ -351,7 +353,7 @@ INSTRUCTIONS
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mtspr SPR:wo, GPR:ro cost(4, 2).
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mtspr SPR:wo, GPR:ro cost(4, 2).
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or GPR:wo, GPR:ro, GPR:ro.
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or GPR:wo, GPR:ro, GPR:ro.
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orc GPR:wo, GPR:ro, GPR:ro.
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orc GPR:wo, GPR:ro, GPR:ro.
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ori GPR:wo, GPR:ro, CONST+LABEL_OFFSET_LO:ro.
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ori GPR:wo, GPR:ro, CONST+LABEL_LO:ro.
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oris GPR:wo, GPR:ro, CONST:ro.
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oris GPR:wo, GPR:ro, CONST:ro.
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orX "or." GPR:wo:cc, GPR:ro, GPR:ro.
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orX "or." GPR:wo:cc, GPR:ro, GPR:ro.
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rlwinm GPR:wo, GPR:ro, CONST:ro, CONST:ro, CONST:ro.
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rlwinm GPR:wo, GPR:ro, CONST:ro, CONST:ro, CONST:ro.
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@ -362,19 +364,19 @@ INSTRUCTIONS
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sraw GPR:wo, GPR:ro, GPR:ro cost(4, 2).
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sraw GPR:wo, GPR:ro, GPR:ro cost(4, 2).
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srawi GPR:wo, GPR:ro, CONST:ro cost(4, 2).
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srawi GPR:wo, GPR:ro, CONST:ro cost(4, 2).
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srw GPR:wo, GPR:ro, GPR:ro.
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srw GPR:wo, GPR:ro, GPR:ro.
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stb GPR:ro, GPRINDIRECT:rw cost(4, 3).
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stb GPR:ro, IND_RC_B:rw cost(4, 3).
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stbx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stbx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stfd FPR:ro, GPRINDIRECT:rw cost(4, 4).
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stfd FPR:ro, IND_RC_D:rw cost(4, 4).
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stfdu FPR:ro, GPRINDIRECT:rw cost(4, 4).
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stfdu FPR:ro, IND_RC_D:rw cost(4, 4).
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stfdx FPR:ro, GPR:ro, GPR:ro cost(4, 4).
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stfdx FPR:ro, GPR:ro, GPR:ro cost(4, 4).
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stfs FSREG:ro, GPRINDIRECT:rw cost(4, 3).
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stfs FSREG:ro, IND_RC_W:rw cost(4, 3).
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stfsu FSREG:ro, GPRINDIRECT:rw cost(4, 3).
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stfsu FSREG:ro, IND_RC_W:rw cost(4, 3).
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stfsx FSREG:ro, GPR:ro, GPR:ro cost(4, 3).
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stfsx FSREG:ro, GPR:ro, GPR:ro cost(4, 3).
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sth GPR:ro, GPRINDIRECT:rw cost(4, 3).
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sth GPR:ro, IND_RC_H:rw cost(4, 3).
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sthx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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sthx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stw GPR:ro, GPRINDIRECT:rw cost(4, 3).
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stw GPR:ro, IND_RC_W:rw cost(4, 3).
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stwx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stwx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stwu GPR+GPRE:ro, GPRINDIRECT:rw cost(4, 3).
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stwu GPR+LOCAL:ro, IND_RC_W:rw cost(4, 3).
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xor GPR:wo, GPR:ro, GPR:ro.
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xor GPR:wo, GPR:ro, GPR:ro.
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xori GPR:wo, GPR:ro, CONST:ro.
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xori GPR:wo, GPR:ro, CONST:ro.
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xoris GPR:wo, GPR:ro, CONST:ro.
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xoris GPR:wo, GPR:ro, CONST:ro.
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@ -390,25 +392,22 @@ MOVES
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COMMENT("move GPR->GPR")
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COMMENT("move GPR->GPR")
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or %2, %1, %1
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or %2, %1, %1
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/* GPRE exists solely to allow us to use regvar() (which can only be used in
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an expression) as a register constant. */
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from GPR to GPRE
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gen
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COMMENT("move GPR->GPRE")
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or %2.reg, %1, %1
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/* Constants */
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/* Constants */
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from CONST_ALL + CONST smalls(%val) to GPR
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from CONST + CONST_STACK smalls(%val) to GPR
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gen
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gen
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COMMENT("move CONST_ALL->GPR smalls")
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COMMENT("move CONST->GPR smalls")
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addi %2, R0, {CONST, %1.val}
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li %2, {CONST, %1.val}
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from CONST_ALL + CONST to GPR
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from CONST + CONST_STACK lo(%val)==0 to GPR
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gen
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gen
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COMMENT("move CONST_ALL->GPR")
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COMMENT("move CONST->GPR shifted")
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addis %2, R0, {CONST, hi(%1.val)}
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lis %2, {CONST, hi(%1.val)}
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from CONST + CONST_STACK to GPR
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gen
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COMMENT("move CONST->GPR")
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lis %2, {CONST, hi(%1.val)}
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ori %2, %2, {CONST, lo(%1.val)}
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ori %2, %2, {CONST, lo(%1.val)}
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/* Can't use addi %2, %2, {CONST, los(%1.val)}
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/* Can't use addi %2, %2, {CONST, los(%1.val)}
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* because %2 might be R0. */
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* because %2 might be R0. */
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@ -416,8 +415,8 @@ MOVES
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from LABEL to GPR
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from LABEL to GPR
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gen
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gen
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COMMENT("move LABEL->GPR")
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COMMENT("move LABEL->GPR")
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addis %2, R0, {LABEL_OFFSET_HI, %1.adr}
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lis %2, {LABEL_HI, %1.adr}
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ori %2, %2, {LABEL_OFFSET_LO, %1.adr}
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ori %2, %2, {LABEL_LO, %1.adr}
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/* Sign extension */
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/* Sign extension */
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from IND_RC_B to GPR
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from IND_RC_B to GPR
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gen
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gen
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COMMENT("move IND_RC_B->GPR")
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COMMENT("move IND_RC_B->GPR")
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lbz %2, {GPRINDIRECT, %1.reg, %1.off}
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lbz %2, %1
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from IND_RR_B to GPR
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from IND_RR_B to GPR
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gen
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gen
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@ -465,7 +464,7 @@ MOVES
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from GPR to IND_RC_B
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from GPR to IND_RC_B
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gen
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gen
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COMMENT("move GPR->IND_RC_B")
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COMMENT("move GPR->IND_RC_B")
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stb %1, {GPRINDIRECT, %2.reg, %2.off}
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stb %1, %2
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from GPR to IND_RR_B
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from GPR to IND_RR_B
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gen
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gen
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@ -477,7 +476,7 @@ MOVES
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from IND_RC_H to GPR
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from IND_RC_H to GPR
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gen
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gen
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COMMENT("move IND_RC_H->GPR")
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COMMENT("move IND_RC_H->GPR")
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lhz %2, {GPRINDIRECT, %1.reg, %1.off}
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lhz %2, %1
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from IND_RR_H to GPR
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from IND_RR_H to GPR
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gen
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gen
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@ -487,7 +486,7 @@ MOVES
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from IND_RC_H_S to GPR
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from IND_RC_H_S to GPR
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gen
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gen
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COMMENT("move IND_RC_H_S->GPR")
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COMMENT("move IND_RC_H_S->GPR")
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lha %2, {GPRINDIRECT, %1.reg, %1.off}
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lha %2, %1
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from IND_RR_H_S to GPR
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from IND_RR_H_S to GPR
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gen
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gen
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@ -499,7 +498,7 @@ MOVES
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from GPR to IND_RC_H
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from GPR to IND_RC_H
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gen
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gen
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COMMENT("move GPR->IND_RC_H")
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COMMENT("move GPR->IND_RC_H")
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sth %1, {GPRINDIRECT, %2.reg, %2.off}
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sth %1, %2
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from GPR to IND_RR_H
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from GPR to IND_RR_H
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gen
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gen
|
||||||
|
@ -511,7 +510,7 @@ MOVES
|
||||||
from IND_RC_W to GPR
|
from IND_RC_W to GPR
|
||||||
gen
|
gen
|
||||||
COMMENT("move IND_RC_W->GPR")
|
COMMENT("move IND_RC_W->GPR")
|
||||||
lwz %2, {GPRINDIRECT, %1.reg, %1.off}
|
lwz %2, %1
|
||||||
|
|
||||||
from IND_RR_W to GPR
|
from IND_RR_W to GPR
|
||||||
gen
|
gen
|
||||||
|
@ -521,7 +520,7 @@ MOVES
|
||||||
from IND_RC_W to FSREG
|
from IND_RC_W to FSREG
|
||||||
gen
|
gen
|
||||||
COMMENT("move IND_RC_W->FSREG")
|
COMMENT("move IND_RC_W->FSREG")
|
||||||
lfs %2, {GPRINDIRECT, %1.reg, %1.off}
|
lfs %2, %1
|
||||||
|
|
||||||
from IND_RR_W to FSREG
|
from IND_RR_W to FSREG
|
||||||
gen
|
gen
|
||||||
|
@ -533,7 +532,7 @@ MOVES
|
||||||
from GPR to IND_RC_W
|
from GPR to IND_RC_W
|
||||||
gen
|
gen
|
||||||
COMMENT("move GPR->IND_RC_W")
|
COMMENT("move GPR->IND_RC_W")
|
||||||
stw %1, {GPRINDIRECT, %2.reg, %2.off}
|
stw %1, %2
|
||||||
|
|
||||||
from GPR to IND_RR_W
|
from GPR to IND_RR_W
|
||||||
gen
|
gen
|
||||||
|
@ -543,7 +542,7 @@ MOVES
|
||||||
from FSREG to IND_RC_W
|
from FSREG to IND_RC_W
|
||||||
gen
|
gen
|
||||||
COMMENT("move FSREG->IND_RC_W")
|
COMMENT("move FSREG->IND_RC_W")
|
||||||
stfs %1, {GPRINDIRECT, %2.reg, %2.off}
|
stfs %1, %2
|
||||||
|
|
||||||
from FSREG to IND_RR_W
|
from FSREG to IND_RR_W
|
||||||
gen
|
gen
|
||||||
|
@ -555,7 +554,7 @@ MOVES
|
||||||
from IND_RC_D to FPR
|
from IND_RC_D to FPR
|
||||||
gen
|
gen
|
||||||
COMMENT("move IND_RC_D->FPR")
|
COMMENT("move IND_RC_D->FPR")
|
||||||
lfd %2, {GPRINDIRECT, %1.reg, %1.off}
|
lfd %2, {IND_RC_D, %1.reg, %1.off}
|
||||||
|
|
||||||
from IND_RR_D to FPR
|
from IND_RR_D to FPR
|
||||||
gen
|
gen
|
||||||
|
@ -567,7 +566,7 @@ MOVES
|
||||||
from FPR to IND_RC_D
|
from FPR to IND_RC_D
|
||||||
gen
|
gen
|
||||||
COMMENT("move FPR->IND_RC_D")
|
COMMENT("move FPR->IND_RC_D")
|
||||||
stfd %1, {GPRINDIRECT, %2.reg, %2.off}
|
stfd %1, {IND_RC_D, %2.reg, %2.off}
|
||||||
|
|
||||||
from FPR to IND_RR_D
|
from FPR to IND_RR_D
|
||||||
gen
|
gen
|
||||||
|
@ -681,9 +680,10 @@ MOVES
|
||||||
extrwi %2, %1.reg, {CONST, 1}, {CONST, 1}
|
extrwi %2, %1.reg, {CONST, 1}, {CONST, 1}
|
||||||
xori %2, %2, {CONST, 1}
|
xori %2, %2, {CONST, 1}
|
||||||
|
|
||||||
/* Miscellaneous */
|
/* GPRE exists solely to allow us to use regvar() (which can only be used in
|
||||||
|
an expression) as a register constant. */
|
||||||
|
|
||||||
from OP_ALL_W + LABEL + CONST_ALL to GPRE
|
from ANY_BHW to GPRE
|
||||||
gen
|
gen
|
||||||
move %1, %2.reg
|
move %1, %2.reg
|
||||||
|
|
||||||
|
@ -701,64 +701,64 @@ STACKINGRULES
|
||||||
from LOCAL to STACK
|
from LOCAL to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack LOCAL")
|
COMMENT("stack LOCAL")
|
||||||
stwu {GPRE, regvar(%1.off)}, {GPRINDIRECT, SP, 0-4}
|
stwu %1, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from REG to STACK
|
from REG to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack REG")
|
COMMENT("stack REG")
|
||||||
stwu %1, {GPRINDIRECT, SP, 0-4}
|
stwu %1, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from REG_PAIR to STACK
|
from REG_PAIR to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack REG_PAIR")
|
COMMENT("stack REG_PAIR")
|
||||||
stwu %1.2, {GPRINDIRECT, SP, 0-4}
|
stwu %1.2, {IND_RC_W, SP, 0-4}
|
||||||
stwu %1.1, {GPRINDIRECT, SP, 0-4}
|
stwu %1.1, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from CONST_ALL + LABEL to STACK
|
from CONST_STACK + LABEL to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack CONST_ALL + LABEL")
|
COMMENT("stack CONST_STACK + LABEL")
|
||||||
move %1, RSCRATCH
|
move %1, RSCRATCH
|
||||||
stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
|
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from SEX_B to STACK
|
from SEX_B to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack SEX_B")
|
COMMENT("stack SEX_B")
|
||||||
extsb RSCRATCH, %1.reg
|
extsb RSCRATCH, %1.reg
|
||||||
stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
|
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from SEX_H to STACK
|
from SEX_H to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack SEX_H")
|
COMMENT("stack SEX_H")
|
||||||
extsh RSCRATCH, %1.reg
|
extsh RSCRATCH, %1.reg
|
||||||
stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
|
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from SUM_ALL + LOGICAL_ALL to STACK
|
from SUM_ALL + LOGICAL_ALL to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack SUM_ALL + LOGICAL_ALL")
|
COMMENT("stack SUM_ALL + LOGICAL_ALL")
|
||||||
move %1, RSCRATCH
|
move %1, RSCRATCH
|
||||||
stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
|
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from IND_ALL_BHW to STACK
|
from IND_ALL_BHW to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack IND_ALL_BHW")
|
COMMENT("stack IND_ALL_BHW")
|
||||||
move %1, RSCRATCH
|
move %1, RSCRATCH
|
||||||
stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
|
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
from IND_ALL_D to STACK
|
from IND_ALL_D to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack IND_ALL_D")
|
COMMENT("stack IND_ALL_D")
|
||||||
move %1, FSCRATCH
|
move %1, FSCRATCH
|
||||||
stfdu FSCRATCH, {GPRINDIRECT, SP, 0-8}
|
stfdu FSCRATCH, {IND_RC_D, SP, 0-8}
|
||||||
|
|
||||||
from FREG to STACK
|
from FREG to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack FPR")
|
COMMENT("stack FPR")
|
||||||
stfdu %1, {GPRINDIRECT, SP, 0-8}
|
stfdu %1, {IND_RC_D, SP, 0-8}
|
||||||
|
|
||||||
from FSREG to STACK
|
from FSREG to STACK
|
||||||
gen
|
gen
|
||||||
COMMENT("stack FSREG")
|
COMMENT("stack FSREG")
|
||||||
stfsu %1, {GPRINDIRECT, SP, 0-4}
|
stfsu %1, {IND_RC_W, SP, 0-4}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
@ -771,10 +771,10 @@ COERCIONS
|
||||||
move %1, %a
|
move %1, %a
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
from CONST_ALL
|
from CONST + CONST_STACK
|
||||||
uses REG
|
uses REG
|
||||||
gen
|
gen
|
||||||
COMMENT("coerce CONST_ALL->REG")
|
COMMENT("coerce CONST->REG")
|
||||||
move %1, %a
|
move %1, %a
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
|
@ -789,7 +789,7 @@ COERCIONS
|
||||||
uses REG
|
uses REG
|
||||||
gen
|
gen
|
||||||
COMMENT("coerce STACK->REG")
|
COMMENT("coerce STACK->REG")
|
||||||
lwz %a, {GPRINDIRECT, SP, 0}
|
lwz %a, {IND_RC_W, SP, 0}
|
||||||
addi SP, SP, {CONST, 4}
|
addi SP, SP, {CONST, 4}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
|
@ -797,8 +797,8 @@ COERCIONS
|
||||||
uses REG_PAIR
|
uses REG_PAIR
|
||||||
gen
|
gen
|
||||||
COMMENT("coerce STACK->REG_PAIR")
|
COMMENT("coerce STACK->REG_PAIR")
|
||||||
lwz %a.1, {GPRINDIRECT, SP, 0}
|
lwz %a.1, {IND_RC_W, SP, 0}
|
||||||
lwz %a.2, {GPRINDIRECT, SP, 4}
|
lwz %a.2, {IND_RC_W, SP, 4}
|
||||||
addi SP, SP, {CONST, 8}
|
addi SP, SP, {CONST, 8}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
|
@ -838,7 +838,7 @@ COERCIONS
|
||||||
uses FREG
|
uses FREG
|
||||||
gen
|
gen
|
||||||
COMMENT("coerce STACK->FREG")
|
COMMENT("coerce STACK->FREG")
|
||||||
lfd %a, {GPRINDIRECT, SP, 0}
|
lfd %a, {IND_RC_D, SP, 0}
|
||||||
addi SP, SP, {CONST, 8}
|
addi SP, SP, {CONST, 8}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
|
@ -846,7 +846,7 @@ COERCIONS
|
||||||
uses FSREG
|
uses FSREG
|
||||||
gen
|
gen
|
||||||
COMMENT("coerce STACK->FSREG")
|
COMMENT("coerce STACK->FSREG")
|
||||||
lfs %a, {GPRINDIRECT, SP, 0}
|
lfs %a, {IND_RC_W, SP, 0}
|
||||||
addi SP, SP, {CONST, 4}
|
addi SP, SP, {CONST, 4}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
|
@ -1003,7 +1003,7 @@ PATTERNS
|
||||||
loi INT32*2
|
loi INT32*2
|
||||||
|
|
||||||
pat stl inreg($1)>0 /* Store to local */
|
pat stl inreg($1)>0 /* Store to local */
|
||||||
with CONST_ALL + LABEL + GPR + OP_ALL_W
|
with ANY_BHW
|
||||||
kills regvar($1), LOCAL %off==$1
|
kills regvar($1), LOCAL %off==$1
|
||||||
gen
|
gen
|
||||||
move %1, {GPRE, regvar($1)}
|
move %1, {GPRE, regvar($1)}
|
||||||
|
@ -1019,10 +1019,7 @@ PATTERNS
|
||||||
sti INT32*2
|
sti INT32*2
|
||||||
|
|
||||||
pat lil inreg($1)>0 /* Load from indirected local */
|
pat lil inreg($1)>0 /* Load from indirected local */
|
||||||
uses REG
|
yields {IND_RC_W, regvar($1), 0}
|
||||||
gen
|
|
||||||
lwz %a, {GPRINDIRECT, regvar($1), 0}
|
|
||||||
yields %a
|
|
||||||
|
|
||||||
pat lil /* Load from indirected local */
|
pat lil /* Load from indirected local */
|
||||||
leaving
|
leaving
|
||||||
|
@ -1092,17 +1089,17 @@ PATTERNS
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
uses REG={LABEL, $1}, REG
|
uses REG={LABEL, $1}, REG
|
||||||
gen
|
gen
|
||||||
lwz %b, {GPRINDIRECT, %a, 0}
|
lwz %b, {IND_RC_W, %a, 0}
|
||||||
addi %b, %b, {CONST, 1}
|
addi %b, %b, {CONST, 1}
|
||||||
stw %b, {GPRINDIRECT, %a, 0}
|
stw %b, {IND_RC_W, %a, 0}
|
||||||
|
|
||||||
pat dee /* Decrement external */
|
pat dee /* Decrement external */
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
uses REG={LABEL, $1}, REG
|
uses REG={LABEL, $1}, REG
|
||||||
gen
|
gen
|
||||||
lwz %b, {GPRINDIRECT, %a, 0}
|
lwz %b, {IND_RC_W, %a, 0}
|
||||||
addi %b, %b, {CONST, 0-1}
|
addi %b, %b, {CONST, 0-1}
|
||||||
stw %b, {GPRINDIRECT, %a, 0}
|
stw %b, {IND_RC_W, %a, 0}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
@ -1161,7 +1158,7 @@ PATTERNS
|
||||||
with LABEL
|
with LABEL
|
||||||
uses REG
|
uses REG
|
||||||
gen
|
gen
|
||||||
addis %a, R0, {LABEL_OFFSET_HA, %1.adr}
|
lis %a, {LABEL_HA, %1.adr}
|
||||||
lwz %a, {GPRINDIRECT_OFFSET_LO, %a, %1.adr}
|
lwz %a, {GPRINDIRECT_OFFSET_LO, %a, %1.adr}
|
||||||
yields %a
|
yields %a
|
||||||
with GPR
|
with GPR
|
||||||
|
@ -1194,7 +1191,7 @@ PATTERNS
|
||||||
with GPR GPR
|
with GPR GPR
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
stb %2, {GPRINDIRECT, %1, 0}
|
stb %2, {IND_RC_B, %1, 0}
|
||||||
with SUM_RR GPR
|
with SUM_RR GPR
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
|
@ -1206,7 +1203,7 @@ PATTERNS
|
||||||
with GPR SEX_B
|
with GPR SEX_B
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
stb %2.reg, {GPRINDIRECT, %1, 0}
|
stb %2.reg, {IND_RC_B, %1, 0}
|
||||||
with SUM_RR SEX_B
|
with SUM_RR SEX_B
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
|
@ -1220,7 +1217,7 @@ PATTERNS
|
||||||
with GPR GPR
|
with GPR GPR
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
sth %2, {GPRINDIRECT, %1, 0}
|
sth %2, {IND_RC_H, %1, 0}
|
||||||
with SUM_RR GPR
|
with SUM_RR GPR
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
|
@ -1232,7 +1229,7 @@ PATTERNS
|
||||||
with GPR SEX_H
|
with GPR SEX_H
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
sth %2.reg, {GPRINDIRECT, %1, 0}
|
sth %2.reg, {IND_RC_H, %1, 0}
|
||||||
with SUM_RR SEX_H
|
with SUM_RR SEX_H
|
||||||
kills MEMORY
|
kills MEMORY
|
||||||
gen
|
gen
|
||||||
|
@ -1381,13 +1378,13 @@ PATTERNS
|
||||||
with REG CONST_HZ
|
with REG CONST_HZ
|
||||||
uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
|
uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
|
||||||
yields %a
|
yields %a
|
||||||
with CONST_ALL-CONST2-CONST_HZ REG
|
with CONST_STACK-CONST2-CONST_HZ REG
|
||||||
uses reusing %2, REG={SUM_RIS, %2, his(%1.val)}
|
uses reusing %2, REG={SUM_RIS, %2, his(%1.val)}
|
||||||
yields {SUM_RC, %a, los(%1.val)}
|
yields {SUM_RC, %a, los(%1.val)}
|
||||||
with REG CONST_ALL-CONST2-CONST_HZ
|
with REG CONST_STACK-CONST2-CONST_HZ
|
||||||
uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
|
uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
|
||||||
yields {SUM_RC, %a, los(%2.val)}
|
yields {SUM_RC, %a, los(%2.val)}
|
||||||
with CONST_ALL LABEL
|
with CONST_STACK LABEL
|
||||||
yields {LABEL, %2.adr+%1.val}
|
yields {LABEL, %2.adr+%1.val}
|
||||||
|
|
||||||
pat sbi $1==4 /* Subtract word (second - top) */
|
pat sbi $1==4 /* Subtract word (second - top) */
|
||||||
|
@ -1401,10 +1398,10 @@ PATTERNS
|
||||||
with CONST_HZ REG
|
with CONST_HZ REG
|
||||||
uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
|
uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
|
||||||
yields %a
|
yields %a
|
||||||
with CONST_ALL-CONST2_WHEN_NEG-CONST_HZ REG
|
with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG
|
||||||
uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
|
uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
|
||||||
yields {SUM_RC, %a, los(0-%1.val)}
|
yields {SUM_RC, %a, los(0-%1.val)}
|
||||||
with CONST_ALL LABEL
|
with CONST_STACK LABEL
|
||||||
yields {LABEL, %2.adr+(0-%1.val)}
|
yields {LABEL, %2.adr+(0-%1.val)}
|
||||||
|
|
||||||
pat ngi $1==4 /* Negate word */
|
pat ngi $1==4 /* Negate word */
|
||||||
|
@ -1519,10 +1516,10 @@ PATTERNS
|
||||||
with CONST_HZ REG
|
with CONST_HZ REG
|
||||||
uses reusing %2, REG={OR_RIS, %2, hi(%1.val)}
|
uses reusing %2, REG={OR_RIS, %2, hi(%1.val)}
|
||||||
yields %a
|
yields %a
|
||||||
with REG CONST_ALL-UCONST2-CONST_HZ
|
with REG CONST_STACK-UCONST2-CONST_HZ
|
||||||
uses reusing %1, REG={OR_RIS, %1, hi(%2.val)}
|
uses reusing %1, REG={OR_RIS, %1, hi(%2.val)}
|
||||||
yields {OR_RC, %1, lo(%2.val)}
|
yields {OR_RC, %1, lo(%2.val)}
|
||||||
with CONST_ALL-UCONST2-CONST_HZ REG
|
with CONST_STACK-UCONST2-CONST_HZ REG
|
||||||
uses reusing %2, REG={OR_RIS, %2, hi(%1.val)}
|
uses reusing %2, REG={OR_RIS, %2, hi(%1.val)}
|
||||||
yields {OR_RC, %2, lo(%1.val)}
|
yields {OR_RC, %2, lo(%1.val)}
|
||||||
|
|
||||||
|
@ -1549,10 +1546,10 @@ PATTERNS
|
||||||
with CONST_HZ REG
|
with CONST_HZ REG
|
||||||
uses reusing %2, REG={XOR_RIS, %2, hi(%1.val)}
|
uses reusing %2, REG={XOR_RIS, %2, hi(%1.val)}
|
||||||
yields %a
|
yields %a
|
||||||
with REG CONST_ALL-UCONST2-CONST_HZ
|
with REG CONST_STACK-UCONST2-CONST_HZ
|
||||||
uses reusing %1, REG={XOR_RIS, %1, hi(%2.val)}
|
uses reusing %1, REG={XOR_RIS, %1, hi(%2.val)}
|
||||||
yields {XOR_RC, %1, lo(%2.val)}
|
yields {XOR_RC, %1, lo(%2.val)}
|
||||||
with CONST_ALL-UCONST2-CONST_HZ REG
|
with CONST_STACK-UCONST2-CONST_HZ REG
|
||||||
uses reusing %2, REG={XOR_RIS, %2, hi(%1.val)}
|
uses reusing %2, REG={XOR_RIS, %2, hi(%1.val)}
|
||||||
yields {XOR_RC, %2, lo(%1.val)}
|
yields {XOR_RC, %2, lo(%1.val)}
|
||||||
|
|
||||||
|
@ -1601,7 +1598,7 @@ PATTERNS
|
||||||
cal ".zer"
|
cal ".zer"
|
||||||
|
|
||||||
pat sli $1==4 /* Shift left (second << top) */
|
pat sli $1==4 /* Shift left (second << top) */
|
||||||
with CONST_ALL GPR
|
with CONST_STACK GPR
|
||||||
uses reusing %2, REG
|
uses reusing %2, REG
|
||||||
gen
|
gen
|
||||||
rlwinm %a, %2, {CONST, (%1.val & 0x1F)}, {CONST, 0}, {CONST, 31-(%1.val & 0x1F)}
|
rlwinm %a, %2, {CONST, (%1.val & 0x1F)}, {CONST, 0}, {CONST, 31-(%1.val & 0x1F)}
|
||||||
|
@ -1613,7 +1610,7 @@ PATTERNS
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
pat sri $1==4 /* Shift right signed (second >> top) */
|
pat sri $1==4 /* Shift right signed (second >> top) */
|
||||||
with CONST_ALL GPR
|
with CONST_STACK GPR
|
||||||
uses reusing %2, REG
|
uses reusing %2, REG
|
||||||
gen
|
gen
|
||||||
srawi %a, %2, {CONST, %1.val & 0x1F}
|
srawi %a, %2, {CONST, %1.val & 0x1F}
|
||||||
|
@ -1625,7 +1622,7 @@ PATTERNS
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
pat sru $1==4 /* Shift right unsigned (second >> top) */
|
pat sru $1==4 /* Shift right unsigned (second >> top) */
|
||||||
with CONST_ALL GPR
|
with CONST_STACK GPR
|
||||||
uses reusing %2, REG
|
uses reusing %2, REG
|
||||||
gen
|
gen
|
||||||
rlwinm %a, %2, {CONST, 32-(%1.val & 0x1F)}, {CONST, (%1.val & 0x1F)}, {CONST, 31}
|
rlwinm %a, %2, {CONST, 32-(%1.val & 0x1F)}, {CONST, (%1.val & 0x1F)}, {CONST, 31}
|
||||||
|
@ -2121,18 +2118,18 @@ PATTERNS
|
||||||
uses REG
|
uses REG
|
||||||
gen
|
gen
|
||||||
move {CONST, $1}, %a
|
move {CONST, $1}, %a
|
||||||
stwu %a, {GPRINDIRECT, SP, 0-4}
|
stwu %a, {IND_RC_W, SP, 0-4}
|
||||||
stwu %2, {GPRINDIRECT, SP, 0-4}
|
stwu %2, {IND_RC_W, SP, 0-4}
|
||||||
stwu %1, {GPRINDIRECT, SP, 0-4}
|
stwu %1, {IND_RC_W, SP, 0-4}
|
||||||
bl {LABEL, "_memmove"}
|
bl {LABEL, "_memmove"}
|
||||||
addi SP, SP, {CONST, 12}
|
addi SP, SP, {CONST, 12}
|
||||||
|
|
||||||
pat bls /* Block move variable length */
|
pat bls /* Block move variable length */
|
||||||
with GPR GPR GPR STACK
|
with GPR GPR GPR STACK
|
||||||
gen
|
gen
|
||||||
stwu %1, {GPRINDIRECT, SP, 0-4}
|
stwu %1, {IND_RC_W, SP, 0-4}
|
||||||
stwu %3, {GPRINDIRECT, SP, 0-4}
|
stwu %3, {IND_RC_W, SP, 0-4}
|
||||||
stwu %2, {GPRINDIRECT, SP, 0-4}
|
stwu %2, {IND_RC_W, SP, 0-4}
|
||||||
bl {LABEL, "_memmove"}
|
bl {LABEL, "_memmove"}
|
||||||
addi SP, SP, {CONST, 12}
|
addi SP, SP, {CONST, 12}
|
||||||
|
|
||||||
|
@ -2198,7 +2195,7 @@ PATTERNS
|
||||||
with GPR
|
with GPR
|
||||||
uses reusing %1, REG
|
uses reusing %1, REG
|
||||||
gen
|
gen
|
||||||
lwz %a, {GPRINDIRECT, %1, FP_OFFSET}
|
lwz %a, {IND_RC_W, %1, FP_OFFSET}
|
||||||
yields %a
|
yields %a
|
||||||
|
|
||||||
pat lpb /* Convert FP to argument address */
|
pat lpb /* Convert FP to argument address */
|
||||||
|
@ -2256,7 +2253,7 @@ PATTERNS
|
||||||
with CONST_HZ STACK
|
with CONST_HZ STACK
|
||||||
gen
|
gen
|
||||||
move {SUM_RC, SP, his(%1.val)}, SP
|
move {SUM_RC, SP, his(%1.val)}, SP
|
||||||
with CONST_ALL-CONST2-CONST_HZ STACK
|
with CONST_STACK-CONST2-CONST_HZ STACK
|
||||||
gen
|
gen
|
||||||
move {SUM_RC, SP, his(%1.val)}, SP
|
move {SUM_RC, SP, his(%1.val)}, SP
|
||||||
move {SUM_RC, SP, los(%1.val)}, SP
|
move {SUM_RC, SP, los(%1.val)}, SP
|
||||||
|
|
Loading…
Reference in a new issue