Use ha16/lo16 to emit pairs of lis/stw, lis/lfs, lis/stfs.
A 4-byte load from a label yields a token IND_RL_W. This token emits either lis/lwz or lis/lfs, if we want a general-purpose register or a floating-point register.
This commit is contained in:
parent
7255ed403f
commit
754e96ef16
1 changed files with 75 additions and 39 deletions
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@ -155,17 +155,14 @@ REGISTERS
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TOKENS
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TOKENS
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/* Used only in instruction descriptions (to generate the correct syntax). */
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GPRINDIRECT_OFFSET_LO = { GPR reg; ADDR adr; } 4 "lo16[" adr "](" reg ")".
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CONST = { INT val; } 4 val.
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/* Primitives */
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/* Primitives */
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CONST = { INT val; } 4 val.
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LABEL = { ADDR adr; } 4 adr.
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LABEL = { ADDR adr; } 4 adr.
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LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]".
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LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]".
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LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]".
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LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]".
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LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]".
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LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]".
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LABEL_STACK = { GPR reg; ADDR adr; } 4.
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LOCAL = { INT off; } 4 ">>> BUG IN LOCAL".
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LOCAL = { INT off; } 4 ">>> BUG IN LOCAL".
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/* Allows us to use regvar() to refer to registers */
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/* Allows us to use regvar() to refer to registers */
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@ -191,16 +188,17 @@ TOKENS
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SEX_B = { GPR reg; } 4.
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SEX_B = { GPR reg; } 4.
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SEX_H = { GPR reg; } 4.
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SEX_H = { GPR reg; } 4.
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IND_RC_B = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RC_B = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_B = { GPR reg1; GPR reg2; } 4.
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IND_RR_B = { GPR reg1; GPR reg2; } 4.
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IND_RC_H = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RC_H = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_H = { GPR reg1; GPR reg2; } 4.
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IND_RR_H = { GPR reg1; GPR reg2; } 4.
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IND_RC_H_S = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RC_H_S = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_H_S = { GPR reg1; GPR reg2; } 4.
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IND_RR_H_S = { GPR reg1; GPR reg2; } 4.
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IND_RC_W = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RC_W = { GPR reg; INT off; } 4 off "(" reg ")".
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IND_RR_W = { GPR reg1; GPR reg2; } 4.
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IND_RL_W = { GPR reg; ADDR adr; } 4 "lo16[" adr "](" reg ")".
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IND_RC_D = { GPR reg; INT off; } 8 off "(" reg ")".
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IND_RR_W = { GPR reg1; GPR reg2; } 4.
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IND_RR_D = { GPR reg1; GPR reg2; } 8.
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IND_RC_D = { GPR reg; INT off; } 8 off "(" reg ")".
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IND_RR_D = { GPR reg1; GPR reg2; } 8.
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NOT_R = { GPR reg; } 4.
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NOT_R = { GPR reg; } 4.
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@ -249,7 +247,7 @@ SETS
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/* indirect values */
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/* indirect values */
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IND_ALL_B = IND_RC_B + IND_RR_B.
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IND_ALL_B = IND_RC_B + IND_RR_B.
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IND_ALL_H = IND_RC_H + IND_RR_H + IND_RC_H_S + IND_RR_H_S.
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IND_ALL_H = IND_RC_H + IND_RR_H + IND_RC_H_S + IND_RR_H_S.
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IND_ALL_W = IND_RC_W + IND_RR_W.
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IND_ALL_W = IND_RC_W + IND_RL_W + IND_RR_W.
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IND_ALL_D = IND_RC_D + IND_RR_D.
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IND_ALL_D = IND_RC_D + IND_RR_D.
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IND_ALL_BHW = IND_ALL_B + IND_ALL_H + IND_ALL_W.
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IND_ALL_BHW = IND_ALL_B + IND_ALL_H + IND_ALL_W.
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@ -277,7 +275,7 @@ INSTRUCTIONS
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add GPR:wo, GPR:ro, GPR:ro.
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add GPR:wo, GPR:ro, GPR:ro.
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addX "add." GPR:wo, GPR:ro, GPR:ro.
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addX "add." GPR:wo, GPR:ro, GPR:ro.
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addi GPR:wo, GPR:ro, CONST:ro.
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addi GPR:wo, GPR:ro, CONST+LABEL_LO:ro.
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li GPR:wo, CONST:ro.
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li GPR:wo, CONST:ro.
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addis GPR:wo, GPR:ro, CONST+LABEL_HI+LABEL_HA:ro.
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addis GPR:wo, GPR:ro, CONST+LABEL_HI+LABEL_HA:ro.
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lis GPR:wo, CONST+LABEL_HI+LABEL_HA:ro.
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lis GPR:wo, CONST+LABEL_HI+LABEL_HA:ro.
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@ -333,7 +331,7 @@ INSTRUCTIONS
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lfd FPR:wo, IND_RC_D:ro cost(4, 5).
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lfd FPR:wo, IND_RC_D:ro cost(4, 5).
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lfdu FPR:wo, IND_RC_D:ro cost(4, 5).
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lfdu FPR:wo, IND_RC_D:ro cost(4, 5).
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lfdx FPR:wo, GPR:ro, GPR:ro cost(4, 5).
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lfdx FPR:wo, GPR:ro, GPR:ro cost(4, 5).
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lfs FSREG:wo, IND_RC_W:ro cost(4, 4).
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lfs FSREG:wo, IND_RC_W+IND_RL_W:ro cost(4, 4).
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lfsu FSREG:wo, IND_RC_W:rw cost(4, 4).
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lfsu FSREG:wo, IND_RC_W:rw cost(4, 4).
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lfsx FSREG:wo, GPR:ro, GPR:ro cost(4, 4).
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lfsx FSREG:wo, GPR:ro, GPR:ro cost(4, 4).
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lha GPR:wo, IND_RC_H_S:ro cost(4, 3).
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lha GPR:wo, IND_RC_H_S:ro cost(4, 3).
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@ -343,7 +341,7 @@ INSTRUCTIONS
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li32 GPR:wo, CONST:ro cost(8, 2).
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li32 GPR:wo, CONST:ro cost(8, 2).
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lwzu GPR:wo, IND_RC_W:ro cost(4, 3).
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lwzu GPR:wo, IND_RC_W:ro cost(4, 3).
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lwzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lwzx GPR:wo, GPR:ro, GPR:ro cost(4, 3).
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lwz GPR:wo, IND_RC_W+GPRINDIRECT_OFFSET_LO:ro cost(4, 3).
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lwz GPR:wo, IND_RC_W+IND_RL_W:ro cost(4, 3).
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nand GPR:wo, GPR:ro, GPR:ro.
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nand GPR:wo, GPR:ro, GPR:ro.
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neg GPR:wo, GPR:ro.
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neg GPR:wo, GPR:ro.
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nor GPR:wo, GPR:ro, GPR:ro.
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nor GPR:wo, GPR:ro, GPR:ro.
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@ -369,12 +367,12 @@ INSTRUCTIONS
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stfd FPR:ro, IND_RC_D:rw cost(4, 4).
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stfd FPR:ro, IND_RC_D:rw cost(4, 4).
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stfdu FPR:ro, IND_RC_D:rw cost(4, 4).
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stfdu FPR:ro, IND_RC_D:rw cost(4, 4).
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stfdx FPR:ro, GPR:ro, GPR:ro cost(4, 4).
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stfdx FPR:ro, GPR:ro, GPR:ro cost(4, 4).
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stfs FSREG:ro, IND_RC_W:rw cost(4, 3).
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stfs FSREG:ro, IND_RC_W+IND_RL_W:rw cost(4, 3).
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stfsu FSREG:ro, IND_RC_W:rw cost(4, 3).
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stfsu FSREG:ro, IND_RC_W:rw cost(4, 3).
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stfsx FSREG:ro, GPR:ro, GPR:ro cost(4, 3).
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stfsx FSREG:ro, GPR:ro, GPR:ro cost(4, 3).
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sth GPR:ro, IND_RC_H:rw cost(4, 3).
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sth GPR:ro, IND_RC_H:rw cost(4, 3).
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sthx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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sthx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stw GPR:ro, IND_RC_W:rw cost(4, 3).
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stw GPR:ro, IND_RC_W+IND_RL_W:rw cost(4, 3).
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stwx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stwx GPR:ro, GPR:ro, GPR:ro cost(4, 3).
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stwu GPR+LOCAL:ro, IND_RC_W:rw cost(4, 3).
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stwu GPR+LOCAL:ro, IND_RC_W:rw cost(4, 3).
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xor GPR:wo, GPR:ro, GPR:ro.
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xor GPR:wo, GPR:ro, GPR:ro.
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@ -418,6 +416,16 @@ MOVES
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lis %2, {LABEL_HI, %1.adr}
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lis %2, {LABEL_HI, %1.adr}
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ori %2, %2, {LABEL_LO, %1.adr}
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ori %2, %2, {LABEL_LO, %1.adr}
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from LABEL_HA to GPR
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gen
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lis %2, %1
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from LABEL_STACK to GPR
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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addi %2, %1.reg, {LABEL_LO, %1.adr}
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/* Sign extension */
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/* Sign extension */
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from SEX_B to GPR
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from SEX_B to GPR
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COMMENT("move IND_RC_W->GPR")
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COMMENT("move IND_RC_W->GPR")
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lwz %2, %1
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lwz %2, %1
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from IND_RL_W to GPR
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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lwz %2, %1
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from IND_RR_W to GPR
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from IND_RR_W to GPR
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gen
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gen
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COMMENT("move IND_RR_W->GPR")
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COMMENT("move IND_RR_W->GPR")
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COMMENT("move IND_RC_W->FSREG")
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COMMENT("move IND_RC_W->FSREG")
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lfs %2, %1
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lfs %2, %1
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from IND_RL_W to FSREG
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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lfs %2, %1
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from IND_RR_W to FSREG
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from IND_RR_W to FSREG
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gen
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gen
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COMMENT("move IND_RR_W->FSREG")
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COMMENT("move IND_RR_W->FSREG")
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@ -714,9 +732,15 @@ STACKINGRULES
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stwu %1.2, {IND_RC_W, SP, 0-4}
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stwu %1.2, {IND_RC_W, SP, 0-4}
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stwu %1.1, {IND_RC_W, SP, 0-4}
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stwu %1.1, {IND_RC_W, SP, 0-4}
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from CONST_STACK + LABEL to STACK
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from CONST_STACK to STACK
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gen
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gen
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COMMENT("stack CONST_STACK + LABEL")
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COMMENT("stack CONST_STACK")
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move %1, RSCRATCH
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stwu RSCRATCH, {IND_RC_W, SP, 0-4}
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from LABEL_STACK to STACK
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gen
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COMMENT("stack LABEL_STACK")
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move %1, RSCRATCH
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move %1, RSCRATCH
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stwu RSCRATCH, {IND_RC_W, SP, 0-4}
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stwu RSCRATCH, {IND_RC_W, SP, 0-4}
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@ -1058,7 +1082,8 @@ PATTERNS
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lae $1
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lae $1
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pat lae /* Load address of external */
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pat lae /* Load address of external */
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yields {LABEL, $1}
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uses REG
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yields {LABEL_STACK, %a, $1}
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pat loe /* Load word external */
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pat loe /* Load word external */
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leaving
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leaving
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@ -1155,17 +1180,13 @@ PATTERNS
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yields {IND_RC_H, %1.reg, %1.off}
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yields {IND_RC_H, %1.reg, %1.off}
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pat loi $1==INT32 /* Load word indirect */
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pat loi $1==INT32 /* Load word indirect */
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with LABEL
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uses REG
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gen
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lis %a, {LABEL_HA, %1.adr}
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lwz %a, {GPRINDIRECT_OFFSET_LO, %a, %1.adr}
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yields %a
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with GPR
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with GPR
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yields {IND_RC_W, %1, 0}
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yields {IND_RC_W, %1, 0}
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with SUM_RC
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with exact LABEL_STACK
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yields {IND_RL_W, %1.reg, %1.adr}
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with exact SUM_RC
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yields {IND_RC_W, %1.reg, %1.off}
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yields {IND_RC_W, %1.reg, %1.off}
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with SUM_RR
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with exact SUM_RR
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yields {IND_RR_W, %1.reg1, %1.reg2}
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yields {IND_RR_W, %1.reg1, %1.reg2}
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pat loi $1==INT64 /* Load double-word indirect */
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pat loi $1==INT64 /* Load double-word indirect */
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@ -1240,15 +1261,25 @@ PATTERNS
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move %2.reg, {IND_RC_H, %1.reg, %1.off}
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move %2.reg, {IND_RC_H, %1.reg, %1.off}
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pat sti $1==INT32 /* Store word indirect */
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pat sti $1==INT32 /* Store word indirect */
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with GPR GPR+FSREG
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with REG REG+FSREG
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kills MEMORY
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kills MEMORY
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gen
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gen
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move %2, {IND_RC_W, %1, 0}
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move %2, {IND_RC_W, %1, 0}
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with SUM_RR GPR+FSREG
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with LABEL_STACK REG
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kills MEMORY
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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stw %2, {IND_RL_W, %1.reg, %1.adr}
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with LABEL_STACK FSREG
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kills MEMORY
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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stfs %2, {IND_RL_W, %1.reg, %1.adr}
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with SUM_RR REG+FSREG
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kills MEMORY
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kills MEMORY
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gen
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gen
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move %2, {IND_RR_W, %1.reg1, %1.reg2}
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move %2, {IND_RR_W, %1.reg1, %1.reg2}
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with SUM_RC GPR+FSREG
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with SUM_RC REG+FSREG
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kills MEMORY
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kills MEMORY
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gen
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gen
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move %2, {IND_RC_W, %1.reg, %1.off}
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move %2, {IND_RC_W, %1.reg, %1.off}
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@ -1384,8 +1415,12 @@ PATTERNS
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with REG CONST_STACK-CONST2-CONST_HZ
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with REG CONST_STACK-CONST2-CONST_HZ
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uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
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uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
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yields {SUM_RC, %a, los(%2.val)}
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yields {SUM_RC, %a, los(%2.val)}
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with CONST_STACK LABEL
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with exact CONST_STACK LABEL_STACK
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yields {LABEL, %2.adr+%1.val}
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uses reusing %2.reg, REG
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yields {LABEL_STACK, %a, %2.adr+%1.val}
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with exact LABEL_STACK CONST_STACK
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uses reusing %1.reg, REG
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yields {LABEL_STACK, %a, %1.adr+%2.val}
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pat sbi $1==4 /* Subtract word (second - top) */
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pat sbi $1==4 /* Subtract word (second - top) */
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with REG REG
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with REG REG
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@ -1401,8 +1436,9 @@ PATTERNS
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with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG
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with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG
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uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
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uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
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yields {SUM_RC, %a, los(0-%1.val)}
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yields {SUM_RC, %a, los(0-%1.val)}
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with CONST_STACK LABEL
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with exact CONST_STACK LABEL_STACK
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yields {LABEL, %2.adr+(0-%1.val)}
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uses reusing %2.reg, REG
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yields {LABEL_STACK, %a, %2.adr+(0-%1.val)}
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pat ngi $1==4 /* Negate word */
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pat ngi $1==4 /* Negate word */
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with REG
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with REG
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