From 7550b7dbc6af0c3281b002451660c7d0628ae3db Mon Sep 17 00:00:00 2001 From: d0p1 Date: Thu, 22 Feb 2024 20:37:12 +0100 Subject: [PATCH] Basic assembly syntax --- mach/m65oo2/as/mach0.c | 13 +- mach/m65oo2/as/mach1.c | 61 ----- mach/m65oo2/as/mach2.c | 72 ++---- mach/m65oo2/as/mach3.c | 446 +++------------------------------ mach/m65oo2/as/mach4.c | 205 ++++----------- mach/m65oo2/as/mach5.c | 364 +-------------------------- mach/m65oo2/as/testfp.s | 189 -------------- mach/m65oo2/libfp/byte_order.h | 6 - 8 files changed, 105 insertions(+), 1251 deletions(-) delete mode 100644 mach/m65oo2/as/testfp.s delete mode 100644 mach/m65oo2/libfp/byte_order.h diff --git a/mach/m65oo2/as/mach0.c b/mach/m65oo2/as/mach0.c index fc69730c9..1bf24ecc1 100644 --- a/mach/m65oo2/as/mach0.c +++ b/mach/m65oo2/as/mach0.c @@ -1,18 +1,9 @@ -/* - * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. - * See the copyright notice in the ACK home directory, in the file "Copyright". - */ -#define RCSID0 "$Id$" - -/* - * INTEL 8086 options - */ #define THREE_PASS /* branch and offset optimization */ #define LISTING /* enable listing facilities */ #define RELOCATION /* generate relocation info */ #define DEBUG 0 #undef ALIGNWORD -#define ALIGNWORD 2 +#define ALIGNWORD 4 #undef ALIGNSECT -#define ALIGNSECT 2 +#define ALIGNSECT 4 diff --git a/mach/m65oo2/as/mach1.c b/mach/m65oo2/as/mach1.c index b7f0e4cd9..570acce1c 100644 --- a/mach/m65oo2/as/mach1.c +++ b/mach/m65oo2/as/mach1.c @@ -1,63 +1,2 @@ -/* - * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. - * See the copyright notice in the ACK home directory, in the file "Copyright". - */ -#define RCSID1 "$Id$" - -/* - * INTEL 8086 C declarations - */ - -#define low6(z) (z & 077) -#define fit6(z) (low6(z) == z) -#define low3(z) (z & 07) -#define fit3(z) (low3(z) == z) - -#define FESC 0xD8 /* escape for 8087 processor */ -extern int mrg_1,mrg_2; -extern expr_t exp_1,exp_2; -#ifndef ASLD -extern int rel_1, rel_2; -#endif - -#ifndef extern -extern char sr_m[8]; -#else -char sr_m[8] = { - -1, -1, -1, 7, -1, 6, 4, 5 -}; -#endif - -#ifndef extern -extern char dr_m[8][8]; -#else -char dr_m[8][8] = { - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 0, 1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 2, 3, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1 -}; -#endif - void encode_imm(int opc, int sz, expr_t exp); -/* 8086 specific routines */ -void ea_1(int param); -void ea_2(int param); -void reverse(void); -void badsyntax(void); -void regsize(register int sz); -void indexed(void); void branch(register int opc,expr_t exp); -void pushop(register int opc); -void addop(register int opc); -void rolop(register int opc); -void incop(register int opc); -void callop(register int opc); -void xchg(register int opc); -void test(register int opc); -void mov(register int opc); -void imul(int opc); diff --git a/mach/m65oo2/as/mach2.c b/mach/m65oo2/as/mach2.c index fd5c7172e..82b4aa294 100644 --- a/mach/m65oo2/as/mach2.c +++ b/mach/m65oo2/as/mach2.c @@ -1,62 +1,18 @@ -/* - * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. - * See the copyright notice in the ACK home directory, in the file "Copyright". - */ -#define RCSID2 "$Id$" - -/* - * INTEL 8086 tokens - */ %token SIZE + %token REG_acc +%token REG_x +%token REG_y + %token OP_impl -%token OP_rel -%token OP_imm -%token OP_x_ind -%token OP_ind_y -%token OP_ind -%token OP_acc -%token OP_abs -%token OP_abs_y -%token OP_abs_x - -%token R16 -%token R8 -%token RSEG -%token PREFIX -%token NOOP_1 -%token NOOP_2 -%token JOP -%token PUSHOP -%token IOOP -%token ADDOP -%token ROLOP -%token INCOP -%token NOTOP -%token CALLOP -%token CALFOP -%token LEAOP -%token ARPLOP -%token ESC -%token INT -%token RET -%token XCHG -%token TEST -%token MOV - -/* Intel 80268 tokens */ -%token IMUL -%token ENTER -%token EXTOP -%token EXTOP1 - -/* Intel 8087 coprocessor tokens */ -%token FNOOP -%token FMEM -%token FST_I -%token FST_ST -%token FST_ST2 -%token ST - -%type st_i +%token OP_branch +%token OP_arithm +%token OP_jump +%token OP_jsr +%token OP_rol +%token OP_bit +%token OP_cpx +%token OP_inc +%token OP_stx +%token OP_ldx \ No newline at end of file diff --git a/mach/m65oo2/as/mach3.c b/mach/m65oo2/as/mach3.c index c8f8bae0e..955bf87ff 100644 --- a/mach/m65oo2/as/mach3.c +++ b/mach/m65oo2/as/mach3.c @@ -1,448 +1,76 @@ {0, SIZE, 0x00, ".b"}, {0, SIZE, 0x01, ".w"}, -{0, SIZE, 0x02, ".d"}, -{0, SIZE, 0x04, ".ub"}, -{0, SIZE, 0x05, ".uw"}, +{0, SIZE, 0x02, ".l"}, +{0, SIZE, 0x04, ".sb"}, +{0, SIZE, 0x05, ".sw"}, {0, REG_acc, 0x00, "a"}, +{0, REG_x, 0x00, "x"}, +{0, REG_y, 0x00, "y"}, {0, OP_impl, 0x00, "brk"}, -{0, OP_x_ind, 0x01, "ora"}, {0, OP_impl, 0x08, "php"}, -{0, OP_imm, 0x09, "ora"}, -{0, OP_acc, 0x0A, "asl"}, -{0, OP_abs, 0x0D, "ora"}, -{0, OP_abs, 0x0E, "asl"}, -{0, OP_rel, 0x10, "bpl"}, -{0, OP_ind_y, 0x11, "ora"}, {0, OP_impl, 0x18, "clc"}, -{0, OP_abs_y, 0x19, "ora"}, -{0, OP_abs_x, 0x1D, "ora"}, -{0, OP_abs_x, 0x1E, "asl"}, -{0, OP_abs, 0x20, "jsr"}, -{0, OP_x_ind, 0x21, "and"}, {0, OP_impl, 0x28, "plp"}, -{0, OP_imm, 0x29, "and"}, -{0, OP_acc, 0x2A, "rol"}, -{0, OP_abs, 0x2C, "bit"}, -{0, OP_abs, 0x2D, "and"}, -{0, OP_abs, 0x2E, "rol"}, -{0, OP_rel, 0x30, "bmi"}, -{0, OP_ind_y, 0x31, "and"}, {0, OP_impl, 0x38, "sec"}, -{0, OP_abs_y, 0x39, "and"}, -{0, OP_abs_x, 0x3D, "and"}, -{0, OP_abs_x, 0x3E, "rol"}, {0, OP_impl, 0x40, "rti"}, -{0, OP_x_ind, 0x41, "eor"}, {0, OP_impl, 0x48, "pha"}, -{0, OP_imm, 0x49, "eor"}, -{0, OP_acc, 0x4A, "lsr"}, -{0, OP_abs, 0x4C, "jmp"}, -{0, OP_abs, 0x4D, "eor"}, -{0, OP_abs, 0x4E, "lsr"}, -{0, OP_rel, 0x50, "bvc"}, -{0, OP_ind_y, 0x51, "eor"}, {0, OP_impl, 0x58, "cli"}, -{0, OP_abs_y, 0x59, "eor"}, -{0, OP_abs_x, 0x5D, "eor"}, -{0, OP_abs_x, 0x5E, "lsr"}, {0, OP_impl, 0x60, "rts"}, -{0, OP_x_ind, 0x61, "adc"}, {0, OP_impl, 0x68, "pla"}, -{0, OP_imm, 0x69, "adc"}, -{0, OP_acc, 0x6A, "ror"}, -{0, OP_ind, 0x6C, "jmp"}, -{0, OP_abs, 0x6D, "adc"}, -{0, OP_abs, 0x6E, "ror"}, -{0, OP_rel, 0x70, "bvs"}, -{0, OP_ind_y, 0x71, "adc"}, {0, OP_impl, 0x78, "sei"}, -{0, OP_abs_y, 0x79, "adc"}, -{0, OP_abs_x, 0x7D, "adc"}, -{0, OP_abs_x, 0x7E, "ror"}, -{0, OP_x_ind, 0x81, "sta"}, {0, OP_impl, 0x88, "dey"}, {0, OP_impl, 0x8A, "txa"}, -{0, OP_abs, 0x8C, "sty"}, -{0, OP_abs, 0x8D, "sta"}, -{0, OP_abs, 0x8E, "stx"}, -{0, OP_rel, 0x90, "bcc"}, -{0, OP_ind_y, 0x91, "sta"}, {0, OP_impl, 0x98, "tya"}, -{0, OP_abs_y, 0x99, "sta"}, {0, OP_impl, 0x9A, "txs"}, -{0, OP_abs_x, 0x9D, "sta"}, -{0, OP_imm, 0xA0, "ldy"}, -{0, OP_x_ind, 0xA1, "lda"}, -{0, OP_imm, 0xA2, "ldx"}, {0, OP_impl, 0xA8, "tay"}, -{0, OP_imm, 0xA9, "lda"}, {0, OP_impl, 0xAA, "tax"}, -{0, OP_abs, 0xAC, "ldy"}, -{0, OP_abs, 0xAD, "lda"}, -{0, OP_abs, 0xAE, "ldx"}, -{0, OP_rel, 0xB0, "bcs"}, -{0, OP_ind_y, 0xB1, "lda"}, {0, OP_impl, 0xB8, "clv"}, -{0, OP_abs_y, 0xB9, "lda"}, {0, OP_impl, 0xBA, "tsx"}, -{0, OP_abs_x, 0xBC, "ldy"}, -{0, OP_abs_x, 0xBD, "lda"}, -{0, OP_abs_y, 0xBE, "ldx"}, -{0, OP_imm, 0xC0, "cpy"}, -{0, OP_x_ind, 0xC1, "cmp"}, {0, OP_impl, 0xC8, "iny"}, -{0, OP_imm, 0xC9, "cmp"}, {0, OP_impl, 0xCA, "dex"}, -{0, OP_abs, 0xCC, "cpy"}, -{0, OP_abs, 0xCD, "cmp"}, -{0, OP_abs, 0xCE, "dec"}, -{0, OP_rel, 0xD0, "bne"}, -{0, OP_ind_y, 0xD1, "cmp"}, {0, OP_impl, 0xD8, "cld"}, -{0, OP_abs_y, 0xD9, "cmp"}, -{0, OP_abs_x, 0xDD, "cmp"}, -{0, OP_abs_x, 0xDE, "dec"}, -{0, OP_imm, 0xE0, "cpx"}, -{0, OP_x_ind, 0xE1, "sbc"}, {0, OP_impl, 0xE8, "inx"}, -{0, OP_imm, 0xE9, "sbc"}, {0, OP_impl, 0xEA, "nop"}, -{0, OP_abs, 0xEC, "cpx"}, -{0, OP_abs, 0xED, "sbc"}, -{0, OP_abs, 0xEE, "inc"}, -{0, OP_rel, 0xF0, "beq"}, -{0, OP_ind_y, 0xF1, "sbc"}, {0, OP_impl, 0xF8, "sed"}, -{0, OP_abs_y, 0xF9, "sbc"}, -{0, OP_abs_x, 0xFD, "sbc"}, -{0, OP_abs_x, 0xFE, "inc"}, -{0, R16, 0, "ax"}, -{0, R16, 1, "cx"}, -{0, R16, 2, "dx"}, -{0, R16, 3, "bx"}, -{0, R16, 4, "sp"}, -{0, R16, 5, "bp"}, -{0, R16, 6, "si"}, -{0, R16, 7, "di"}, -{0, R8, 0, "al"}, -{0, R8, 1, "cl"}, -{0, R8, 2, "dl"}, -{0, R8, 3, "bl"}, -{0, R8, 4, "ah"}, -{0, R8, 5, "ch"}, -{0, R8, 6, "dh"}, -{0, R8, 7, "bh"}, -{0, RSEG, 0, "es"}, -{0, RSEG, 1, "cs"}, -{0, RSEG, 2, "ss"}, -{0, RSEG, 3, "ds"}, -{0, PREFIX, 046, "eseg"}, -{0, PREFIX, 056, "cseg"}, -{0, PREFIX, 066, "sseg"}, -{0, PREFIX, 076, "dseg"}, -{0, PREFIX, 0360, "lock"}, -{0, PREFIX, 0363, "rep"}, -{0, PREFIX, 0362, "repne"}, -{0, PREFIX, 0362, "repnz"}, -{0, PREFIX, 0363, "repe"}, -{0, PREFIX, 0363, "repz"}, -{0, NOOP_1, 047, "daa"}, -{0, NOOP_1, 057, "das"}, -{0, NOOP_1, 067, "aaa"}, -{0, NOOP_1, 077, "aas"}, -{0, NOOP_1, 0220, "nop"}, -{0, NOOP_1, 0230, "cbw"}, -{0, NOOP_1, 0231, "cwd"}, -{0, NOOP_1, 0233, "wait"}, -{0, NOOP_1, 0234, "pushf"}, -{0, NOOP_1, 0235, "popf"}, -{0, NOOP_1, 0236, "sahf"}, -{0, NOOP_1, 0237, "lahf"}, -{0, NOOP_1, 0244, "movsb"}, -{0, NOOP_1, 0245, "movs"}, -{0, NOOP_1, 0245, "movsw"}, -{0, NOOP_1, 0246, "cmpsb"}, -{0, NOOP_1, 0247, "cmps"}, -{0, NOOP_1, 0247, "cmpsw"}, -{0, NOOP_1, 0252, "stosb"}, -{0, NOOP_1, 0253, "stos"}, -{0, NOOP_1, 0253, "stosw"}, -{0, NOOP_1, 0254, "lodsb"}, -{0, NOOP_1, 0255, "lods"}, -{0, NOOP_1, 0255, "lodsw"}, -{0, NOOP_1, 0256, "scasb"}, -{0, NOOP_1, 0257, "scas"}, -{0, NOOP_1, 0257, "scasw"}, -{0, NOOP_1, 0316, "into"}, -{0, NOOP_1, 0317, "iret"}, -{0, NOOP_1, 0327, "xlat"}, -{0, NOOP_1, 0364, "hlt"}, -{0, NOOP_1, 0365, "cmc"}, -{0, NOOP_1, 0370, "clc"}, -{0, NOOP_1, 0371, "stc"}, -{0, NOOP_1, 0372, "cli"}, -{0, NOOP_1, 0373, "sti"}, -{0, NOOP_1, 0374, "cld"}, -{0, NOOP_1, 0375, "std"}, -{0, NOOP_2, 0324+012<<8, "aam"}, -{0, NOOP_2, 0325+012<<8, "aad"}, -{0, JOP, 0340, "loopne"}, -{0, JOP, 0340, "loopnz"}, -{0, JOP, 0341, "loope"}, -{0, JOP, 0341, "loopz"}, -{0, JOP, 0342, "loop"}, -{0, JOP, 0343, "jcxz"}, -{0, JOP, 0160, "jo"}, -{0, JOP, 0161, "jno"}, -{0, JOP, 0162, "jb"}, -{0, JOP, 0162, "jc"}, -{0, JOP, 0162, "jnae"}, -{0, JOP, 0163, "jae"}, -{0, JOP, 0163, "jnb"}, -{0, JOP, 0163, "jnc"}, -{0, JOP, 0164, "je"}, -{0, JOP, 0164, "jz"}, -{0, JOP, 0165, "jne"}, -{0, JOP, 0165, "jnz"}, -{0, JOP, 0166, "jbe"}, -{0, JOP, 0166, "jna"}, -{0, JOP, 0167, "ja"}, -{0, JOP, 0167, "jnbe"}, -{0, JOP, 0170, "js"}, -{0, JOP, 0171, "jns"}, -{0, JOP, 0172, "jp"}, -{0, JOP, 0172, "jpe"}, -{0, JOP, 0173, "jnp"}, -{0, JOP, 0173, "jpo"}, -{0, JOP, 0174, "jl"}, -{0, JOP, 0174, "jnge"}, -{0, JOP, 0175, "jge"}, -{0, JOP, 0175, "jnl"}, -{0, JOP, 0176, "jle"}, -{0, JOP, 0176, "jng"}, -{0, JOP, 0177, "jg"}, -{0, JOP, 0177, "jnle"}, -{0, PUSHOP, 0, "push"}, -{0, PUSHOP, 1, "pop"}, -{0, IOOP, 0344, "inb"}, -{0, IOOP, 0345, "in"}, -{0, IOOP, 0345, "inw"}, -{0, IOOP, 0346, "outb"}, -{0, IOOP, 0347, "out"}, -{0, IOOP, 0347, "outw"}, -{0, ADDOP, 000, "addb"}, -{0, ADDOP, 001, "add"}, -{0, ADDOP, 010, "orb"}, -{0, ADDOP, 011, "or"}, -{0, ADDOP, 020, "adcb"}, -{0, ADDOP, 021, "adc"}, -{0, ADDOP, 030, "sbbb"}, -{0, ADDOP, 031, "sbb"}, -{0, ADDOP, 040, "andb"}, -{0, ADDOP, 041, "and"}, -{0, ADDOP, 050, "subb"}, -{0, ADDOP, 051, "sub"}, -{0, ADDOP, 060, "xorb"}, -{0, ADDOP, 061, "xor"}, -{0, ADDOP, 070, "cmpb"}, -{0, ADDOP, 071, "cmp"}, -{0, ROLOP, 000, "rolb"}, -{0, ROLOP, 001, "rol"}, -{0, ROLOP, 010, "rorb"}, -{0, ROLOP, 011, "ror"}, -{0, ROLOP, 020, "rclb"}, -{0, ROLOP, 021, "rcl"}, -{0, ROLOP, 030, "rcrb"}, -{0, ROLOP, 031, "rcr"}, -{0, ROLOP, 040, "salb"}, -{0, ROLOP, 040, "shlb"}, -{0, ROLOP, 041, "sal"}, -{0, ROLOP, 041, "shl"}, -{0, ROLOP, 050, "shrb"}, -{0, ROLOP, 051, "shr"}, -{0, ROLOP, 070, "sarb"}, -{0, ROLOP, 071, "sar"}, -{0, INCOP, 000, "incb"}, -{0, INCOP, 001, "inc"}, -{0, INCOP, 010, "decb"}, -{0, INCOP, 011, "dec"}, -{0, NOTOP, 020, "notb"}, -{0, NOTOP, 021, "not"}, -{0, NOTOP, 030, "negb"}, -{0, NOTOP, 031, "neg"}, -{0, NOTOP, 040, "mulb"}, -{0, NOTOP, 041, "mul"}, -{0, NOTOP, 050, "imulb"}, -{0, IMUL, 051, "imul"}, /* for 80286 */ -{0, NOTOP, 060, "divb"}, -{0, NOTOP, 061, "div"}, -{0, NOTOP, 070, "idivb"}, -{0, NOTOP, 071, "idiv"}, -{0, CALLOP, 020+(0350<<8), "call"}, -{0, CALLOP, 040+(0351<<8), "jmp"}, -{0, CALFOP, 030+(0232<<8), "callf"}, -{0, CALFOP, 050+(0352<<8), "jmpf"}, -{0, LEAOP, 0215, "lea"}, -{0, LEAOP, 0304, "les"}, -{0, LEAOP, 0305, "lds"}, -{0, ESC, 0, "esc"}, -{0, INT, 0, "int"}, -{0, RET, 0303, "ret"}, -{0, RET, 0313, "retf"}, -{0, XCHG, 0, "xchgb"}, -{0, XCHG, 1, "xchg"}, -{0, TEST, 0, "testb"}, -{0, TEST, 1, "test"}, -{0, MOV, 0, "movb"}, -{0, MOV, 1, "mov"}, -{0, MOV, 1, "movw"}, +{0, OP_branch, 0x10, "bpl"}, +{0, OP_branch, 0x30, "bmi"}, +{0, OP_branch, 0x50, "bvc"}, +{0, OP_branch, 0x70, "bvs"}, +{0, OP_branch, 0x90, "bcc"}, +{0, OP_branch, 0xB0, "bcs"}, +{0, OP_branch, 0xD0, "bne"}, +{0, OP_branch, 0xF0, "beq"}, -/* Intel 8087 coprocessor keywords */ +/* XXX: change OP_arithm with smthg more accurate */ +{0, OP_arithm, 0x00, "ora"}, +{0, OP_arithm, 0x20, "and"}, +{0, OP_arithm, 0x40, "eor"}, +{0, OP_arithm, 0x60, "adc"}, +{0, OP_arithm, 0x80, "sta"}, +{0, OP_arithm, 0xA0, "lda"}, +{0, OP_arithm, 0xC0, "cmp"}, +{0, OP_arithm, 0xE0, "sbc"}, -{0, ST, 0, "st"}, +{0, OP_jump, 0x4C, "jmp"}, +{0, OP_jsr, 0x20, "jsr"}, -{0, FNOOP, FESC+1+(0xF0<<8), "f2xm1"}, -{0, FNOOP, FESC+1+(0xE1<<8), "fabs"}, -{0, FNOOP, FESC+1+(0xE0<<8), "fchs"}, -{0, FNOOP, FESC+3+(0xE2<<8), "fclex"}, -{0, FNOOP, FESC+6+(0xD9<<8), "fcompp"}, -{0, FNOOP, FESC+1+(0xF6<<8), "fdecstp"}, -{0, FNOOP, FESC+3+(0xE1<<8), "fdisi"}, -{0, FNOOP, FESC+3+(0xE0<<8), "feni"}, -{0, FNOOP, FESC+1+(0xF7<<8), "fincstp"}, -{0, FNOOP, FESC+3+(0xE3<<8), "finit"}, -{0, FNOOP, FESC+1+(0xE8<<8), "fld1"}, -{0, FNOOP, FESC+1+(0xEA<<8), "fldl2e"}, -{0, FNOOP, FESC+1+(0xE9<<8), "fldl2t"}, -{0, FNOOP, FESC+1+(0xEC<<8), "fldlg2"}, -{0, FNOOP, FESC+1+(0xED<<8), "fldln2"}, -{0, FNOOP, FESC+1+(0xEB<<8), "fldpi"}, -{0, FNOOP, FESC+1+(0xEE<<8), "fldz"}, -{0, FNOOP, FESC+1+(0xD0<<8), "fnop"}, -{0, FNOOP, FESC+1+(0xF3<<8), "fpatan"}, -{0, FNOOP, FESC+1+(0xF8<<8), "fprem"}, -{0, FNOOP, FESC+1+(0xF2<<8), "fptan"}, -{0, FNOOP, FESC+1+(0xFC<<8), "frndint"}, -{0, FNOOP, FESC+1+(0xFD<<8), "fscale"}, -{0, FNOOP, FESC+1+(0xFA<<8), "fsqrt"}, -{0, FNOOP, FESC+7+(0xE0<<8), "fstswax"}, /* 80287 */ -{0, FNOOP, FESC+1+(0xE4<<8), "ftst"}, -{0, FNOOP, FESC+1+(0xE5<<8), "fxam"}, -{0, FNOOP, FESC+1+(0xF4<<8), "fxtract"}, -{0, FNOOP, FESC+1+(0xF1<<8), "fyl2x"}, -{0, FNOOP, FESC+1+(0xF9<<8), "fyl2pi"}, +{0, OP_rol, 0x00, "asl"}, +{0, OP_rol, 0x20, "rol"}, +{0, OP_rol, 0x40, "lsr"}, +{0, OP_rol, 0x60, "ror"}, -{0, FMEM, FESC+6+(0<<11), "fiadds"}, -{0, FMEM, FESC+2+(0<<11), "fiaddl"}, -{0, FMEM, FESC+0+(0<<11), "fadds"}, -{0, FMEM, FESC+4+(0<<11), "faddd"}, -{0, FMEM, FESC+7+(4<<11), "fbld"}, -{0, FMEM, FESC+7+(6<<11), "fbstp"}, -{0, FMEM, FESC+6+(2<<11), "ficoms"}, -{0, FMEM, FESC+2+(2<<11), "ficoml"}, -{0, FMEM, FESC+0+(2<<11), "fcoms"}, -{0, FMEM, FESC+4+(2<<11), "fcomd"}, -{0, FMEM, FESC+6+(3<<11), "ficomps"}, -{0, FMEM, FESC+2+(3<<11), "ficompl"}, -{0, FMEM, FESC+0+(3<<11), "fcomps"}, -{0, FMEM, FESC+4+(3<<11), "fcompd"}, -{0, FMEM, FESC+6+(6<<11), "fidivs"}, -{0, FMEM, FESC+2+(6<<11), "fidivl"}, -{0, FMEM, FESC+0+(6<<11), "fdivs"}, -{0, FMEM, FESC+4+(6<<11), "fdivd"}, -{0, FMEM, FESC+6+(7<<11), "fidivrs"}, -{0, FMEM, FESC+2+(7<<11), "fidivrl"}, -{0, FMEM, FESC+0+(7<<11), "fdivrs"}, -{0, FMEM, FESC+4+(7<<11), "fdivrd"}, -{0, FMEM, FESC+7+(5<<11), "fildq"}, -{0, FMEM, FESC+7+(0<<11), "filds"}, -{0, FMEM, FESC+3+(0<<11), "fildl"}, -{0, FMEM, FESC+1+(0<<11), "flds"}, -{0, FMEM, FESC+5+(0<<11), "fldd"}, -{0, FMEM, FESC+3+(5<<11), "fldx"}, -{0, FMEM, FESC+1+(5<<11), "fldcw"}, -{0, FMEM, FESC+1+(4<<11), "fldenv"}, -{0, FMEM, FESC+6+(1<<11), "fimuls"}, -{0, FMEM, FESC+2+(1<<11), "fimull"}, -{0, FMEM, FESC+0+(1<<11), "fmuls"}, -{0, FMEM, FESC+4+(1<<11), "fmuld"}, -{0, FMEM, FESC+5+(4<<11), "frstor"}, -{0, FMEM, FESC+5+(6<<11), "fsave"}, -{0, FMEM, FESC+7+(2<<11), "fists"}, -{0, FMEM, FESC+3+(2<<11), "fistl"}, -{0, FMEM, FESC+1+(2<<11), "fsts"}, -{0, FMEM, FESC+5+(2<<11), "fstd"}, -{0, FMEM, FESC+7+(7<<11), "fistpq"}, -{0, FMEM, FESC+7+(3<<11), "fistps"}, -{0, FMEM, FESC+3+(3<<11), "fistpl"}, -{0, FMEM, FESC+1+(3<<11), "fstps"}, -{0, FMEM, FESC+5+(3<<11), "fstpd"}, -{0, FMEM, FESC+3+(7<<11), "fstpx"}, -{0, FMEM, FESC+1+(7<<11), "fstcw"}, -{0, FMEM, FESC+1+(6<<11), "fstenv"}, -{0, FMEM, FESC+5+(7<<11), "fstsw"}, -{0, FMEM, FESC+6+(4<<11), "fisubs"}, -{0, FMEM, FESC+2+(4<<11), "fisubl"}, -{0, FMEM, FESC+0+(4<<11), "fsubs"}, -{0, FMEM, FESC+4+(4<<11), "fsubd"}, -{0, FMEM, FESC+6+(5<<11), "fisubrs"}, -{0, FMEM, FESC+2+(5<<11), "fisubrl"}, -{0, FMEM, FESC+0+(5<<11), "fsubrs"}, -{0, FMEM, FESC+4+(5<<11), "fsubrd"}, +{0, OP_bit, 0x2C, "bit"}, -{0, FST_I, FESC+1+(0xC0<<8), "fld"}, -{0, FST_I, FESC+5+(0xD0<<8), "fst"}, -{0, FST_I, FESC+5+(0xC8<<8), "fstp"}, -{0, FST_I, FESC+1+(0xC8<<8), "fxch"}, -{0, FST_I, FESC+0+(0xD0<<8), "fcom"}, -{0, FST_I, FESC+0+(0xD8<<8), "fcomp"}, -{0, FST_I, FESC+5+(0xC0<<8), "ffree"}, +{0, OP_cpx, 0xC0, "cpy"}, +{0, OP_cpx, 0xE0, "cpx"}, -{0, FST_ST, FESC+0+(0xC0<<8), "fadd"}, -{0, FST_ST, FESC+2+(0xC0<<8), "faddp"}, -{0, FST_ST2, FESC+0+(0xF0<<8), "fdiv"}, -{0, FST_ST2, FESC+2+(0xF0<<8), "fdivp"}, -{0, FST_ST2, FESC+0+(0xF8<<8), "fdivr"}, -{0, FST_ST2, FESC+2+(0xF8<<8), "fdivrp"}, -{0, FST_ST, FESC+0+(0xC8<<8), "fmul"}, -{0, FST_ST, FESC+2+(0xC8<<8), "fmulp"}, -{0, FST_ST2, FESC+0+(0xE0<<8), "fsub"}, -{0, FST_ST2, FESC+2+(0xE0<<8), "fsubp"}, -{0, FST_ST2, FESC+0+(0xE8<<8), "fsubr"}, -{0, FST_ST2, FESC+2+(0xE8<<8), "fsubrp"}, +{0, OP_inc, 0xCE, "dec"}, +{0, OP_inc, 0xEE, "inc"}, -/* 80286 keywords */ -{0, NOOP_1, 0140, "pusha"}, -{0, NOOP_1, 0141, "popa"}, -{0, NOOP_1, 0154, "insb"}, -{0, NOOP_1, 0155, "ins"}, -{0, NOOP_1, 0155, "insw"}, -{0, NOOP_1, 0156, "outsb"}, -{0, NOOP_1, 0157, "outs"}, -{0, NOOP_1, 0157, "outsw"}, +{0, OP_stx, 0x8C, "sty"}, +{0, OP_stx, 0x8E, "stx"}, -{0, ARPLOP, 0143, "arpl"}, -{0, ENTER, 0310, "enter"}, -{0, NOOP_1, 0311, "leave"}, -{0, LEAOP, 0142, "bound"}, - -{0, NOOP_2, 017+06<<8, "clts"}, - -{0, EXTOP, 0002, "lar"}, -{0, EXTOP, 0003, "lsl"}, - -{0, EXTOP1, 0021, "lgdt"}, -{0, EXTOP1, 0001, "sgdt"}, -{0, EXTOP1, 0031, "lidt"}, -{0, EXTOP1, 0011, "sidt"}, -{0, EXTOP1, 0020, "lldt"}, -{0, EXTOP1, 0000, "sldt"}, -{0, EXTOP1, 0030, "ltr"}, -{0, EXTOP1, 0010, "str"}, -{0, EXTOP1, 0061, "lmsw"}, -{0, EXTOP1, 0041, "smsw"}, -{0, EXTOP1, 0050, "verw"}, -{0, EXTOP1, 0040, "verr"}, +{0, OP_ldx, 0xA0, "ldy"}, +{0, OP_ldx, 0xA2, "ldx"}, diff --git a/mach/m65oo2/as/mach4.c b/mach/m65oo2/as/mach4.c index ed1c7b830..d65e16d06 100644 --- a/mach/m65oo2/as/mach4.c +++ b/mach/m65oo2/as/mach4.c @@ -1,167 +1,50 @@ -#define RCSID4 "$Id$" -/* - * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. - * See the copyright notice in the ACK home directory, in the file "Copyright". - * - */ operation - : prefix oper - ; -prefix : /* empty */ - | prefix PREFIX - { emit1($2);} - ; -oper : OP_impl + : OP_impl { emit1($1);} - | OP_acc REG_acc + | OP_branch expr + { branch($1, $2);} + | OP_arithm SIZE '#' expr + { encode_imm($1+0x9, $2, $4);} + | OP_arithm SIZE expr + { emit1($1+0x0D);} + | OP_arithm SIZE expr ',' REG_x + { emit1($1+0x1D);} + | OP_arithm SIZE expr ',' REG_y + { emit1($1+0x19);} + | OP_arithm SIZE '(' expr ',' REG_x ')' + { emit1($1+0x01);} + | OP_arithm SIZE '(' expr ')' ',' REG_y + { emit1($1+0x11);} + | OP_jump expr { emit1($1);} - | OP_imm SIZE '#' expr - { encode_imm($1, $2, $4);} - | JOP expr - { branch($1,$2);} - | PUSHOP ea_1 - { pushop($1);} - | IOOP expr - { emit1($1); -#ifdef RELOCATION - newrelo($2.typ, RELO1); -#endif - emit1($2.val); - } - | IOOP R16 - { if ($2!=2) serror("register error"); - emit1($1+010); - } - | ADDOP ea_ea - { addop($1);} - | ROLOP ea_ea - { rolop($1);} - | INCOP ea_1 - { incop($1);} - | IMUL ea_ea - { imul($1);} - | IMUL ea_1 - { regsize($1); emit1(0366|($1&1)); ea_1($1&070);} - | NOTOP ea_1 - { regsize($1); emit1(0366|($1&1)); ea_1($1&070);} - | CALLOP ea_1 - { callop($1&0xFFFF);} - | CALFOP expr ':' expr - { emit1($1>>8); -#ifdef RELOCATION - newrelo($4.typ, RELO2); -#endif - emit2($4.val); -#ifdef RELOCATION - newrelo($2.typ, RELO2); -#endif - emit2($2.val); - } - | CALFOP mem - { emit1(0377); ea_2($1&0xFF);} - | ENTER absexp ',' absexp - { fit(fitw($2)); fit(fitb($4)); - emit1($1); emit2((int)$2); emit1((int)$4); - } - | LEAOP R16 ',' mem - { emit1($1); ea_2($2<<3);} - | ARPLOP mem ',' R16 - { emit1($1); ea_2($4<<3);} - | EXTOP R16 ',' ea_2 - { emit1(0xF); emit1($1); - ea_2($2<<3); - } - | EXTOP1 ea_1 - { regsize(1); emit1(0xF); emit1($1&07); - ea_1($1&070); - } - | ESC absexp ',' mem - { fit(fit6($2)); - emit1(0330 | $2>>3); - ea_2(($2&7)<<3); - } - | INT absexp - { if ($2==3) - emit1(0314); - else { - emit1(0315); emit1($2); - } - } - | RET + | OP_jump '(' expr ')' + { emit1($1+0x20);} + | OP_jsr expr { emit1($1);} - | RET expr - { emit1($1-1); -#ifdef RELOCATION - newrelo($2.typ, RELO2); -#endif - emit2($2.val); - } - | XCHG ea_ea - { xchg($1);} - | TEST ea_ea - { test($1);} - | MOV ea_ea - { mov($1);} -/* Intel 8087 coprocessor instructions */ - | FNOOP - { emit1($1); emit1($1>>8);} - | FMEM mem - { emit1($1); ea_2(($1>>8)&070);} - | FST_I st_i - { emit1($1); emit1(($1>>8)|$2); } - | FST_I ST - { emit1($1); emit1($1>>8); } - | FST_ST ST ',' st_i - { emit1($1); emit1(($1>>8)|$4); } - | FST_ST2 ST ',' st_i - { emit1($1); emit1(($1>>8)|$4); } - | FST_ST st_i ',' ST - { emit1($1|4); emit1((($1>>8)|$2)); } - | FST_ST2 st_i ',' ST - { emit1($1|4); emit1((($1>>8)|$2)^010); } - ; - -st_i : ST '(' absexp ')' - { if (!fit3($3)) { - serror("illegal index in FP stack"); - } - $$ = $3; - } - ; -mem : '(' expr ')' - { mrg_2 = 6; exp_2 = $2; - RELOMOVE(rel_2, relonami); - } - | bases - { exp_2.val = 0; exp_2.typ = S_ABS; indexed();} - | expr bases - { exp_2 = $1; indexed(); - RELOMOVE(rel_2, relonami); - } - ; -bases : '(' R16 ')' - { mrg_2 = sr_m[$2];} - | '(' R16 ')' '(' R16 ')' - { mrg_2 = dr_m[$2][$5];} - ; -ea_2 : mem - | R8 - { mrg_2 = $1 | 0300;} - | R16 - { mrg_2 = $1 | 0310;} - | RSEG - { mrg_2 = $1 | 020;} - | expr - { mrg_2 = 040; exp_2 = $1; - RELOMOVE(rel_2, relonami); - } - ; -ea_1 : ea_2 - { mrg_1 = mrg_2; exp_1 = exp_2; - RELOMOVE(rel_1, rel_2); - } - ; -ea_ea : ea_1 ',' ea_2 - ; + | OP_rol REG_acc + { emit1($1+0x0A);} + | OP_rol SIZE expr + { emit1($1+0x0E);} + | OP_rol SIZE expr ',' REG_x + { emit1($1+0x1E);} + | OP_bit SIZE expr + { emit1($1);} + | OP_cpx SIZE '#' expr + { emit1($1);} + | OP_cpx SIZE expr + { emit1($1+0x0C);} + | OP_inc SIZE expr + { emit1($1+0x0E);} + | OP_inc SIZE expr ',' REG_x + { emit1($1+0x1E);} + | OP_stx SIZE expr + { emit1($1);} + | OP_ldx SIZE '#' expr + { emit1($1);} + | OP_ldx SIZE expr + { emit1($1+0x0C);} + | OP_ldx SIZE expr ',' REG_x + { emit1($1+0x1C);} + ; \ No newline at end of file diff --git a/mach/m65oo2/as/mach5.c b/mach/m65oo2/as/mach5.c index 8edc74e5c..7549e2041 100644 --- a/mach/m65oo2/as/mach5.c +++ b/mach/m65oo2/as/mach5.c @@ -1,12 +1,3 @@ -/* - * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. - * See the copyright notice in the ACK home directory, in the file "Copyright". - */ -#define RCSID5 "$Id$" - -/* - * INTEL 8086 special routines - */ void encode_imm(int opc, int sz, expr_t exp) @@ -31,360 +22,21 @@ encode_imm(int opc, int sz, expr_t exp) } } -void ea_1(int param) +void branch(register int opc, expr_t exp) { - - if ((mrg_1 & 070) || (param & ~070)) { - serror("bad operand"); - } - emit1(mrg_1 | param); - switch(mrg_1 >> 6) { - case 0: - if (mrg_1 == 6 || (mrg_1 & 040)) { -#ifdef RELOCATION - RELOMOVE(relonami, rel_1); - newrelo(exp_1.typ, RELO2); -#endif - emit2(exp_1.val); - } - break; - case 1: -#ifdef RELOCATION - RELOMOVE(relonami, rel_1); - newrelo(exp_1.typ, RELO1); -#endif - emit1(exp_1.val); - break; - case 2: -#ifdef RELOCATION - RELOMOVE(relonami, rel_1); - newrelo(exp_1.typ, RELO2); -#endif - emit2(exp_1.val); - break; - } -} - -void ea_2(int param) { - - mrg_1 = mrg_2; - exp_1 = exp_2; - RELOMOVE(rel_1, rel_2); - ea_1(param); -} - -void reverse(void) -{ - register int m, r; - expr_t e; - - m = mrg_1; mrg_1 = mrg_2; mrg_2 = m; - e = exp_1; exp_1 = exp_2; exp_2 = e; -#ifndef ASLD - r = rel_1; rel_1 = rel_2; rel_2 = r; -#endif -} - -void badsyntax(void) -{ - - serror("bad operands"); -} - -void regsize(register int sz) -{ - register int bit; - - sz <<= 3; - bit = 010; - sz &= bit; - if ((mrg_1 >= 0300 && (mrg_1 & bit) != sz) || - (mrg_2 >= 0300 && (mrg_2 & bit) != sz)) - serror("register error"); - mrg_1 &= ~bit; - mrg_2 &= ~bit; -} - -void indexed(void) -{ - int sm1, sm2; - - if (mrg_2 & ~7) - serror("register error"); - sm1 = exp_2.typ == S_ABS && fitb((short)(exp_2.val)); - if (sm1) { - sm2 = exp_2.val == 0 && mrg_2 != 6; - } - else sm2 = 0; - if (small(sm1, 1)) { - if (small(sm2, 1)) { - } - else mrg_2 |= 0100; - } - else { - if (small(0, 1)) {} - mrg_2 |= 0200; - } -} - -void branch(register int opc,expr_t exp) -{ - register int sm,dist; - int saving = opc == 0353 ? 1 : 3; + register int dist; dist = exp.val - (DOTVAL + 2); if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT)) dist -= DOTGAIN; - sm = dist > 0 ? fitb(dist-saving) : fitb(dist); - if ((exp.typ & ~S_DOT) != DOTTYP) - sm = 0; - if ((opc & 0370) == 0340) { - fit(sm); - sm = 1; + if (small(fitb(dist) && (exp.typ & ~S_DOT) == DOTTYP, 3)) { + emit1(opc); emit1(dist); } else { - if ((sm = small(sm,saving)) == 0) { - if (opc != 0353) { - emit1(opc^1); - emit1(3); - dist -= 2; - } - opc = 0351; - dist--; - } - } - emit1(opc); - if (sm == 0) { + emit1(opc^0x20); emit1(0x03); /* Skip over ... */ + emit1(0x4C); /* ... far jump. */ #ifdef RELOCATION - newrelo(exp.typ, RELPC | RELO2); + newrelo(exp.typ, RELO2); #endif - emit2(dist); - } else - emit1(dist); -} - -void pushop(register int opc) -{ - - regsize(1); - if (mrg_1 & 020) { - if ( (mrg_1&3) == 1 && opc==1 ) badsyntax() ; - emit1(6 | opc | (mrg_1&3)<<3); - } else if (mrg_1 >= 0300) { - emit1(0120 | opc<<3 | (mrg_1&7)); - } else if (opc == 0) { - if (mrg_1 & 040) { /* 070 ??? */ - if (small(exp_1.typ == S_ABS && fitb((short)exp_1.val),1)) { - emit1(0152); - emit1((int) exp_1.val); - } else { - emit1(0150); - RELOMOVE(relonami, rel_1); -#ifdef RELOCATION - newrelo(exp_1.typ, RELO2); - emit2((int) exp_1.val); -#endif - } - } else { - emit1(0377); ea_1(6<<3); - } - } else { - emit1(0217); ea_1(0<<3); - } -} - -void addop(register int opc) -{ - regsize(opc); - if (mrg_2 >= 0300) { - emit1(opc); ea_1((mrg_2&7)<<3); - } else if ((mrg_2 & 040) && mrg_1 == 0300) { - emit1(opc | 4); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } else if (mrg_2 & 040) { - if ((opc&1) == 0) { - emit1(0200); - } else { - int sm = exp_2.typ == S_ABS && fitb((short)exp_2.val) && - opc != 011 && opc != 041 && opc != 061; - if (small(sm, 1)) { - emit1(0203); opc &= ~1; - } - else emit1(0201); - } - ea_1(opc & 070); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } else if (mrg_1 >= 0300) { - emit1(opc | 2); - ea_2((mrg_1&7)<<3); - } else - badsyntax(); -} - -void rolop(register int opc) -{ - register int cmrg; - - cmrg = mrg_2; - mrg_2 = mrg_1; - regsize(opc); - if (cmrg == 0301) { - emit1(0322 | (opc&1)); ea_1(opc&070); - } else if (cmrg & 040) { - if (small(exp_2.val == 1, 1)) { - emit1(0320 | (opc&1)); ea_1(opc&070); - } else { - fit(fitb(exp_2.val)); - emit1(0300|(opc&1)); ea_1(opc&070); - emit1((int)exp_2.val); - } - } else - badsyntax(); -} - -void incop(register int opc) -{ - - regsize(opc); - if ((opc&1) && mrg_1>=0300) { - emit1(0100 | (opc&010) | (mrg_1&7)); - } else { - emit1(0376 | (opc&1)); - ea_1(opc & 010); - } -} - -void callop(register int opc) -{ - regsize(1); - if (mrg_1 & 040) { - if (opc == (040+(0351<<8))) { - RELOMOVE(relonami, rel_1); - branch(0353,exp_1); - } else { - exp_1.val -= (DOTVAL+3); - emit1(opc>>8); -#ifdef RELOCATION - RELOMOVE(relonami, rel_1); - newrelo(exp_1.typ, RELPC | RELO2); -#endif - emit2(exp_1.val); - } - } else { - emit1(0377); ea_1(opc&070); - } -} - -void xchg(register int opc) -{ - regsize(opc); - if (mrg_2 == 0300 || mrg_1 < 0300) - reverse(); - if (opc == 1 && mrg_1 == 0300 && mrg_2 >= 0300) { - emit1(0220 | (mrg_2&7)); - } else if (mrg_1 >= 0300) { - emit1(0206 | opc); ea_2((mrg_1&7)<<3); - } else - badsyntax(); -} - -void test(register int opc) -{ - regsize(opc); - if ((mrg_1 & 040) || mrg_2 >= 0300) - reverse(); - if ((mrg_2 & 040) && mrg_1 == 0300) { - emit1(0250 | opc); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } else if (mrg_2 & 040) { - emit1(0366 | opc); - ea_1(0<<3); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } else if (mrg_1 >= 0300) { - emit1(0204 | opc); ea_2((mrg_1&7)<<3); - } else - badsyntax(); -} - -void mov(register int opc) -{ - regsize(opc); - if (mrg_1 & 020) { - emit1(0216); ea_2((mrg_1&3)<<3); - } else if (mrg_2 & 020) { - emit1(0214); ea_1((mrg_2&3)<<3); - } else if (mrg_2 & 040) { - if (mrg_1 >= 0300) { - emit1(0260 | opc<<3 | (mrg_1&7)); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } else { - emit1(0306 | opc); ea_1(0<<3); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, (opc&1)? RELO2 : RELO1); -#endif - emitx(exp_2.val, (opc&1)+1); - } - } else if (mrg_2 == 0300 && mrg_1 == 6) { - emit1(0242 | opc); -#ifdef RELOCATION - RELOMOVE(relonami, rel_1); - newrelo(exp_1.typ, RELO2); -#endif - emit2(exp_1.val); - } else if (mrg_1 == 0300 && mrg_2 == 6) { - emit1(0240 | opc); -#ifdef RELOCATION - RELOMOVE(relonami, rel_2); - newrelo(exp_2.typ, RELO2); -#endif - emit2(exp_2.val); - } else if (mrg_2 >= 0300) { - emit1(0210 | opc); ea_1((mrg_2&7)<<3); - } else if (mrg_1 >= 0300) { - emit1(0212 | opc); ea_2((mrg_1&7)<<3); - } else { - badsyntax(); - } -} - -void imul(int opc) -{ - regsize(opc); - if (exp_2.typ != S_ABS || ((mrg_2 & 040) == 0)) { - serror("bad operand"); - } else { - if (small(exp_2.typ == S_ABS && fitb((short)exp_2.val),1)) { - emit1(0153); - ea_1((mrg_2&7)<<3); - emit1((int)exp_2.val); - } else { - emit1(0151); - ea_1((mrg_2&7)<<3); - RELOMOVE(relonami, rel_2); -#ifdef RELOCATION - newrelo(exp_2.typ, RELO2); - emit2((int) exp_2.val); -#endif - } + emit2(exp.val); } } diff --git a/mach/m65oo2/as/testfp.s b/mach/m65oo2/as/testfp.s deleted file mode 100644 index 5937e497d..000000000 --- a/mach/m65oo2/as/testfp.s +++ /dev/null @@ -1,189 +0,0 @@ -.sect .text; .sect .rom; .sect .data; -.sect .data -.define _m_a_i_n -blablabla: - .space 100 - -.sect .text - -_m_a_i_n: - ! no operands - f2xm1 - fabs - fchs - fclex - fcompp - fdecstp - fdisi - feni - fincstp - finit - fld1 - fldl2e - fldl2t - fldlg2 - fldln2 - fldpi - fldz - fnop - fpatan - fprem - fptan - frndint - fscale - fsqrt - ftst - fxam - fxtract - fyl2x - fyl2pi - - ! memory operand - fiadds (blablabla) - fiaddl (blablabla) - fadds (blablabla) - faddd (blablabla) - fbld (blablabla) - fbstp (blablabla) - ficoms (blablabla) - ficoml (blablabla) - fcoms (blablabla) - fcomd (blablabla) - ficomps (blablabla) - ficompl (blablabla) - fcomps (blablabla) - fcompd (blablabla) - fidivs (blablabla) - fidivl (blablabla) - fdivs (blablabla) - fdivd (blablabla) - fidivrs (blablabla) - fidivrl (blablabla) - fdivrs (blablabla) - fdivrd (blablabla) - filds (blablabla) - fildl (blablabla) - flds (blablabla) - fldd (blablabla) - fldx (blablabla) - fldcw (blablabla) - fldenv (blablabla) - fimuls (blablabla) - fimull (blablabla) - fmuls (blablabla) - fmuld (blablabla) - frstor (blablabla) - fsave (blablabla) - fists (blablabla) - fistl (blablabla) - fsts (blablabla) - fstd (blablabla) - fistps (blablabla) - fistpl (blablabla) - fstps (blablabla) - fstpd (blablabla) - fstpx (blablabla) - fstcw (blablabla) - fstenv (blablabla) - fstsw (blablabla) - fisubs (blablabla) - fisubl (blablabla) - fsubs (blablabla) - fsubd (blablabla) - fisubrs (blablabla) - fisubrl (blablabla) - fsubrs (blablabla) - fsubrd (blablabla) - - ! again, memory operand - fiadds 8(bp) - fiaddl 8(bp) - fadds 8(bp) - faddd 8(bp) - fbld 8(bp) - fbstp 8(bp) - ficoms 8(bp) - ficoml 8(bp) - fcoms 8(bp) - fcomd 8(bp) - ficomps 8(bp) - ficompl 8(bp) - fcomps 8(bp) - fcompd 8(bp) - fidivs 8(bp) - fidivl 8(bp) - fdivs 8(bp) - fdivd 8(bp) - fidivrs 8(bp) - fidivrl 8(bp) - fdivrs 8(bp) - fdivrd 8(bp) - filds 8(bp) - fildl 8(bp) - flds 8(bp) - fldd 8(bp) - fldx 8(bp) - fldcw 8(bp) - fldenv 8(bp) - fimuls 8(bp) - fimull 8(bp) - fmuls 8(bp) - fmuld 8(bp) - frstor 8(bp) - fsave 8(bp) - fists 8(bp) - fistl 8(bp) - fsts 8(bp) - fstd 8(bp) - fistps 8(bp) - fistpl 8(bp) - fstps 8(bp) - fstpd 8(bp) - fstpx 8(bp) - fstcw 8(bp) - fstenv 8(bp) - fstsw 8(bp) - fisubs 8(bp) - fisubl 8(bp) - fsubs 8(bp) - fsubd 8(bp) - fisubrs 8(bp) - fisubrl 8(bp) - fsubrs 8(bp) - fsubrd 8(bp) - - ! one FP stack argument - fld st - fst st - fstp st - fxch st - fcom st - fcomp st - ffree st - - fld st(4) - fst st(4) - fstp st(4) - fxch st(4) - fcom st(4) - fcomp st(4) - ffree st(4) - - ! two FP stack arguments - fadd st(4),st - faddp st(4),st - fdiv st(4),st - fdivp st(4),st - fdivr st(4),st - fdivrp st(4),st - fmul st(4),st - fmulp st(4),st - fsub st(4),st - fsubp st(4),st - fsubr st(4),st - fsubrp st(4),st - - fadd st,st(4) - faddp st,st(4) - fmul st,st(4) - fmulp st,st(4) diff --git a/mach/m65oo2/libfp/byte_order.h b/mach/m65oo2/libfp/byte_order.h deleted file mode 100644 index d08b45a5d..000000000 --- a/mach/m65oo2/libfp/byte_order.h +++ /dev/null @@ -1,6 +0,0 @@ -#define CHAR_UNSIGNED 0 -#define MSB_AT_LOW_ADDRESS 0 -#define MSW_AT_LOW_ADDRESS 0 -#define FL_MSB_AT_LOW_ADDRESS 0 -#define FL_MSW_AT_LOW_ADDRESS 0 -#define FL_MSL_AT_LOW_ADDRESS 0