Added -DNDEBUG to compile flags

This commit is contained in:
ceriel 1993-11-10 14:38:32 +00:00
parent 528112d9bd
commit 7c473ca0ed
5 changed files with 5 additions and 5 deletions

View file

@ -12,7 +12,7 @@ OFILES = dist.$(SUF)
HFILES = $(SRC_DIR)/arg_type.h $(SRC_DIR)/em_parser.h HFILES = $(SRC_DIR)/arg_type.h $(SRC_DIR)/em_parser.h
IFILES = -I$(TARGET_HOME)/h -I$(TARGET_HOME)/modules/h IFILES = -I$(TARGET_HOME)/h -I$(TARGET_HOME)/modules/h
CFLAGS = $(COPTIONS) $(IFILES) CFLAGS = $(COPTIONS) $(IFILES) -DNDEBUG
all : $(OFILES) all : $(OFILES)

View file

@ -4,7 +4,7 @@
SRC_DIR = $(SRC_HOME)/util/ceg/as_parser/eval SRC_DIR = $(SRC_HOME)/util/ceg/as_parser/eval
CFLAGS = $(COPTIONS) CFLAGS = $(COPTIONS) -DNDEBUG
LDFLAGS = $(LDOPTIONS) LDFLAGS = $(LDOPTIONS)
eval: eval.$(SUF) eval: eval.$(SUF)

View file

@ -6,7 +6,7 @@ SRC_DIR = $(SRC_HOME)/util/ceg/as_parser
CEGLIB = $(TARGET_HOME)/lib.bin/ceg CEGLIB = $(TARGET_HOME)/lib.bin/ceg
IFILES = -I$(TARGET_HOME)/h -I$(TARGET_HOME)/modules/h -I. -I$(SRC_DIR) IFILES = -I$(TARGET_HOME)/h -I$(TARGET_HOME)/modules/h -I. -I$(SRC_DIR)
CFLAGS = $(COPTIONS) -DFLEX $(IFILES) CFLAGS = $(COPTIONS) -DFLEX $(IFILES) -DNDEBUG
LDFLAGS = $(LDOPTIONS) LDFLAGS = $(LDOPTIONS)
GFILES = $(SRC_DIR)/pars.g GFILES = $(SRC_DIR)/pars.g

View file

@ -10,7 +10,7 @@ IDIRS=-I.\
-I$(TARGET_HOME)/h\ -I$(TARGET_HOME)/h\
-I$(TARGET_HOME)/modules/h -I$(TARGET_HOME)/modules/h
CFLAGS = $(COPTIONS) $(IDIRS) CFLAGS = $(COPTIONS) $(IDIRS) -DNDEBUG
all: bottom.$(SUF) con1.$(SUF) con2.$(SUF) con4.$(SUF) end_back.$(SUF) \ all: bottom.$(SUF) con1.$(SUF) con2.$(SUF) con4.$(SUF) end_back.$(SUF) \
gen1.$(SUF) gen2.$(SUF) gen4.$(SUF) init_back.$(SUF) reloc1.$(SUF) \ gen1.$(SUF) gen2.$(SUF) gen4.$(SUF) init_back.$(SUF) reloc1.$(SUF) \

View file

@ -10,7 +10,7 @@ IDIRS=-I.\
-I$(TARGET_HOME)/h\ -I$(TARGET_HOME)/h\
-I$(TARGET_HOME)/modules/h -I$(TARGET_HOME)/modules/h
CFLAGS = $(COPTIONS) $(IDIRS) CFLAGS = $(COPTIONS) $(IDIRS) -DNDEBUG
all: data.$(SUF) con2.$(SUF) con4.$(SUF) relocation.$(SUF) end_back.$(SUF) \ all: data.$(SUF) con2.$(SUF) con4.$(SUF) relocation.$(SUF) end_back.$(SUF) \
gen1.$(SUF) gen2.$(SUF) gen4.$(SUF) init_back.$(SUF) output.$(SUF) \ gen1.$(SUF) gen2.$(SUF) gen4.$(SUF) init_back.$(SUF) output.$(SUF) \