bug fixes in RMI and EXG

This commit is contained in:
ceriel 1987-01-26 13:36:40 +00:00
parent 8116e3181f
commit 80d363eac5

View file

@ -170,30 +170,34 @@ adispldefind8 = {REGISTER ireg,reg; STRING ind;} 4 cost=(3,13)
TOKENEXPRESSIONS: TOKENEXPRESSIONS:
CONST = CONST1 + CONST2 + CONST4 CONST = CONST1 + CONST2 + CONST4
source1 = regdef1 + displ1 + displdef1 + Xsource1 = regdef1 + displ1 + displdef1 +
EXTERNAL1 + reldef1 + CONST1 + LOCAL1 EXTERNAL1 + reldef1 + CONST1 + LOCAL1
+ displind1 + extdefind1 + displdefind1 + displind1 + extdefind1 + displdefind1
source1 = Xsource1
#ifdef REGVARS #ifdef REGVARS
+ reginc1 + regdec1 + reginc1 + regdec1
#endif REGVARS #endif REGVARS
source2 = regdef2 + displ2 + displdef2 + Xsource2 = regdef2 + displ2 + displdef2 +
EXTERNAL2 + reldef2 + CONST2 + LOCAL2 EXTERNAL2 + reldef2 + CONST2 + LOCAL2
+ extind2 + displind2 + extdefind2 + displdefind2 + extind2 + displind2 + extdefind2 + displdefind2
source2 = Xsource2
#ifdef REGVARS #ifdef REGVARS
+ reginc2 + regdec2 + reginc2 + regdec2
#endif REGVARS #endif REGVARS
source4 = REG + regdef4 + displ4 + displdef4 + LocaLBase + Xsource4 = REG + regdef4 + displ4 + displdef4 + LocaLBase +
EXTERNAL4 + reldef4 + CONST + DOUBLE + LOCAL4 + FCONST4 EXTERNAL4 + reldef4 + CONST + DOUBLE + LOCAL4 + FCONST4
+ extind4 + displind4 + extdefind4 + displdefind4 + extind4 + displind4 + extdefind4 + displdefind4
source4 = Xsource4
#ifdef REGVARS #ifdef REGVARS
+ RREG + reginc4 + regdec4 + RREG + reginc4 + regdec4
#endif REGVARS #endif REGVARS
dups4 = CONST + regdef1 + displ1 + LOCAL1 + dups4 = CONST + regdef1 + displ1 + LOCAL1 +
REG + regdef2 + displ2 + LOCAL2 + REG + regdef2 + displ2 + LOCAL2 +
RREG + regdef4 + displ4 + LOCAL4 + DOUBLE RREG + regdef4 + displ4 + LOCAL4 + DOUBLE
source8 = QREG + regdef8 + displ8 + displdef8 + Xsource8 = QREG + regdef8 + displ8 + displdef8 +
EXTERNAL8 + reldef8 + CONST8 + LOCAL8 + FCONST8 EXTERNAL8 + reldef8 + CONST8 + LOCAL8 + FCONST8
+ extind8 + displind8 + extdefind8 + displdefind8 + extind8 + displind8 + extdefind8 + displdefind8
source8 = Xsource8
#ifdef REGVARS #ifdef REGVARS
+ reginc8 + regdec8 + reginc8 + regdec8
#endif REGVARS #endif REGVARS
@ -854,7 +858,7 @@ dvi !defined($1) | source4 |
remove(ALL) remove(ALL)
move(%[1],R0) move(%[1],R0)
"jsb\t.dvi" | | | "jsb\t.dvi" | | |
rmi $1==4 | source4 source4 | rmi $1==4 | Xsource4 Xsource4 |
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
"mull2\t%[1],%[a]" "mull2\t%[1],%[a]"
@ -862,7 +866,7 @@ rmi $1==4 | source4 source4 |
setcc(%[a]) | %[a] | | setcc(%[a]) | %[a] | |
#ifdef REGVARS #ifdef REGVARS
rmi stl $1==4 && inreg($2)==2 rmi stl $1==4 && inreg($2)==2
| source4 source4 | | Xsource4 Xsource4 |
remove(regvar($2)) remove(regvar($2))
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
@ -872,7 +876,7 @@ rmi stl $1==4 && inreg($2)==2
setcc(regvar($2)) | | | setcc(regvar($2)) | | |
#endif REGVARS #endif REGVARS
rmi stl $1==4 && $2<0 rmi stl $1==4 && $2<0
| source4 source4 | | Xsource4 Xsource4 |
remove(displaced) remove(displaced)
remove(LOCALS,(%[num]<=$2+3 && %[num]+%[size]>$2)) remove(LOCALS,(%[num]<=$2+3 && %[num]+%[size]>$2))
allocate(REG) allocate(REG)
@ -881,7 +885,7 @@ rmi stl $1==4 && $2<0
"subl3\t%[a],%[2],$2(fp)" "subl3\t%[a],%[2],$2(fp)"
setcc({LOCAL4,LB,$2,4}) | | | setcc({LOCAL4,LB,$2,4}) | | |
rmi stl $1==4 && $2>=0 rmi stl $1==4 && $2>=0
| source4 source4 | | Xsource4 Xsource4 |
remove(displaced) remove(displaced)
remove(LOCALS,(%[num]<=$2+3 && %[num]+%[size]>$2)) remove(LOCALS,(%[num]<=$2+3 && %[num]+%[size]>$2))
allocate(REG) allocate(REG)
@ -891,7 +895,7 @@ rmi stl $1==4 && $2>=0
setcc({LOCAL4,AP,$2,4}) | | | setcc({LOCAL4,AP,$2,4}) | | |
#ifdef REGVARS #ifdef REGVARS
rmi sil $1==4 && inreg($2)==2 rmi sil $1==4 && inreg($2)==2
| source4 source4 | | Xsource4 Xsource4 |
REMEXTANDLOC REMEXTANDLOC
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
@ -900,7 +904,7 @@ rmi sil $1==4 && inreg($2)==2
setcc({regdef4,regvar($2)}) | | | setcc({regdef4,regvar($2)}) | | |
#endif REGVARS #endif REGVARS
rmi sil $1==4 && $2<0 rmi sil $1==4 && $2<0
| source4 source4 | | Xsource4 Xsource4 |
REMEXTANDLOC REMEXTANDLOC
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
@ -908,14 +912,14 @@ rmi sil $1==4 && $2<0
"subl3\t%[a],%[2],*$2(fp)" "subl3\t%[a],%[2],*$2(fp)"
setcc({displdef4,LB,tostring($2)}) | | | setcc({displdef4,LB,tostring($2)}) | | |
rmi sil $1==4 && $2>=0 rmi sil $1==4 && $2>=0
| source4 source4 | | Xsource4 Xsource4 |
REMEXTANDLOC REMEXTANDLOC
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
"mull2\t%[1],%[a]" "mull2\t%[1],%[a]"
"subl3\t%[a],%[2],*$2(ap)" "subl3\t%[a],%[2],*$2(ap)"
setcc({displdef4,AP,tostring($2)}) | | | setcc({displdef4,AP,tostring($2)}) | | |
rmi ste $1==4 | source4 source4 | rmi ste $1==4 | Xsource4 Xsource4 |
remove(externals) remove(externals)
allocate(REG) allocate(REG)
"divl3\t%[1],%[2],%[a]" "divl3\t%[1],%[2],%[a]"
@ -4379,8 +4383,8 @@ dus !defined($1) | source4 |
move(%[1],R0) move(%[1],R0)
"jsb\t.dus" "jsb\t.dus"
erase(R0) | | | erase(R0) | | |
exg $1==4 | bigsource4 bigsource4 | | %[1] %[2] | | exg $1==4 | bigsource4-source4+Xsource4 bigsource4-source4+Xsource4 | | %[1] %[2] | |
exg $1==8 | bigsource8 bigsource8 | | %[1] %[2] | | exg $1==8 | bigsource8-source8+Xsource8 bigsource8-source8+Xsource8 | | %[1] %[2] | |
exg defined($1) | STACK | exg defined($1) | STACK |
move({CONST4,$1},R0) move({CONST4,$1},R0)
"jsb\t.exg" "jsb\t.exg"