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Added some patterns for shifts with constant shift count

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ceriel 1990-02-19 16:38:35 +00:00
parent 8bfbe723db
commit 972d39139d
1 changed files with 32 additions and 0 deletions
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32
mach/i86/ncg/table
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@ -986,6 +986,22 @@ with REG REG
gen sal %1,{ANYCON,1} gen sal %1,{ANYCON,1}
rcl %2,{ANYCON,1} yields %2 %1 rcl %2,{ANYCON,1} yields %2 %1
pat loc sli $1==2 && $2==4
with REG REG
gen sal %1,{ANYCON,1}
rcl %2,{ANYCON,1}
sal %1,{ANYCON,1}
rcl %2,{ANYCON,1} yields %2 %1
pat loc sli $1==3 && $2==4
with REG REG
gen sal %1,{ANYCON,1}
rcl %2,{ANYCON,1}
sal %1,{ANYCON,1}
rcl %2,{ANYCON,1}
sal %1,{ANYCON,1}
rcl %2,{ANYCON,1} yields %2 %1
pat loc sli $1==16 && $2==4 pat loc sli $1==16 && $2==4
with rmorconst rmorconst yields %1 {ANYCON,0} with rmorconst rmorconst yields %1 {ANYCON,0}
@ -1019,6 +1035,22 @@ with REG REG
gen sar %2,{ANYCON,1} gen sar %2,{ANYCON,1}
rcr %1,{ANYCON,1} yields %2 %1 rcr %1,{ANYCON,1} yields %2 %1
pat loc sri $1==2 && $2==4
with REG REG
gen sar %2,{ANYCON,1}
rcr %1,{ANYCON,1}
sar %2,{ANYCON,1}
rcr %1,{ANYCON,1} yields %2 %1
pat loc sri $1==3 && $2==4
with REG REG
gen sar %2,{ANYCON,1}
rcr %1,{ANYCON,1}
sar %2,{ANYCON,1}
rcr %1,{ANYCON,1}
sar %2,{ANYCON,1}
rcr %1,{ANYCON,1} yields %2 %1
pat sri $1==2 pat sri $1==2
with SHIFT_CREG REG with SHIFT_CREG REG
gen sar %2,cl yields %2 gen sar %2,cl yields %2