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Remove some old, hopefully unused PowerPC code. Teach the code generator about

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non-volatile long registers.
This commit is contained in:
David Given 2018-09-20 23:30:38 +02:00
parent 65a20ce2d6
commit 985d3dc7d1
2 changed files with 5 additions and 66 deletions
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67
mach/mips/mcg/platform.c
View file

@ -156,72 +156,7 @@ struct hop* platform_move(struct basicblock* bb, struct vreg* vreg, struct hreg*
struct hop* hop = new_hop(bb, NULL); struct hop* hop = new_hop(bb, NULL);
if ((src->attrs & TYPE_ATTRS) != (dest->attrs & TYPE_ATTRS)) if ((src->attrs & TYPE_ATTRS) != (dest->attrs & TYPE_ATTRS))
{ fatal("hreg move of %%%d from %s to %s with mismatched types", vreg->id, src->id, dest->id);
assert(!src->is_stacked);
assert(!dest->is_stacked);
switch (src->attrs & TYPE_ATTRS)
{
case burm_int_ATTR:
hop_add_insel(hop, "stwu %H, -4(sp)", src);
break;
case burm_long_ATTR:
hop_add_insel(hop, "stwu %0H, -4(sp)", src);
hop_add_insel(hop, "stwu %1H, -4(sp)", src);
break;
case burm_float_ATTR:
hop_add_insel(hop, "stfsu %H, -4(sp)", src);
break;
case burm_double_ATTR:
hop_add_insel(hop, "stfdu %H, -8(sp)", src);
break;
default:
goto nomove;
}
switch (dest->attrs & TYPE_ATTRS)
{
case burm_int_ATTR:
hop_add_insel(hop, "lwz %H, 0(sp)", dest);
break;
case burm_long_ATTR:
hop_add_insel(hop, "lwz %0H, 4(sp)", dest);
hop_add_insel(hop, "lwz %1H, 0(sp)", dest);
break;
case burm_float_ATTR:
hop_add_insel(hop, "lfs %H, 0(sp)", dest);
break;
case burm_double_ATTR:
hop_add_insel(hop, "lfd %H, 0(sp)", dest);
break;
default:
goto nomove;
}
switch (dest->attrs & TYPE_ATTRS)
{
case burm_int_ATTR:
case burm_float_ATTR:
hop_add_insel(hop, "addi sp, sp, 4");
break;
case burm_double_ATTR:
case burm_long_ATTR:
hop_add_insel(hop, "addi sp, sp, 8");
break;
default:
goto nomove;
}
}
else else
{ {
uint32_t type = src->attrs & TYPE_ATTRS; uint32_t type = src->attrs & TYPE_ATTRS;

4
mach/mips/mcg/table
View file

@ -44,6 +44,10 @@ REGISTERS
r24r25 named("r24", "r25") aliases(r24, r25) long volatile; r24r25 named("r24", "r25") aliases(r24, r25) long volatile;
r2r3 named("r2", "r3") aliases(r2, r3) long volatile lret; r2r3 named("r2", "r3") aliases(r2, r3) long volatile lret;
r17r18 named("r17", "r18") aliases(r17, r18) long;
r19r20 named("r19", "r20") aliases(r19, r20) long;
r21r22 named("r21", "r22") aliases(r21, r22) long;
f0 float volatile fret; f0 float volatile fret;
f1 float volatile; f1 float volatile;
f2 float volatile; f2 float volatile;