Remove some old, hopefully unused PowerPC code. Teach the code generator about
non-volatile long registers.
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65a20ce2d6
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985d3dc7d1
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@ -156,72 +156,7 @@ struct hop* platform_move(struct basicblock* bb, struct vreg* vreg, struct hreg*
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struct hop* hop = new_hop(bb, NULL);
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if ((src->attrs & TYPE_ATTRS) != (dest->attrs & TYPE_ATTRS))
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{
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assert(!src->is_stacked);
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assert(!dest->is_stacked);
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switch (src->attrs & TYPE_ATTRS)
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{
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case burm_int_ATTR:
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hop_add_insel(hop, "stwu %H, -4(sp)", src);
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break;
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case burm_long_ATTR:
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hop_add_insel(hop, "stwu %0H, -4(sp)", src);
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hop_add_insel(hop, "stwu %1H, -4(sp)", src);
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break;
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case burm_float_ATTR:
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hop_add_insel(hop, "stfsu %H, -4(sp)", src);
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break;
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case burm_double_ATTR:
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hop_add_insel(hop, "stfdu %H, -8(sp)", src);
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break;
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default:
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goto nomove;
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}
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switch (dest->attrs & TYPE_ATTRS)
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{
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case burm_int_ATTR:
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hop_add_insel(hop, "lwz %H, 0(sp)", dest);
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break;
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case burm_long_ATTR:
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hop_add_insel(hop, "lwz %0H, 4(sp)", dest);
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hop_add_insel(hop, "lwz %1H, 0(sp)", dest);
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break;
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case burm_float_ATTR:
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hop_add_insel(hop, "lfs %H, 0(sp)", dest);
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break;
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case burm_double_ATTR:
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hop_add_insel(hop, "lfd %H, 0(sp)", dest);
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break;
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default:
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goto nomove;
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}
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switch (dest->attrs & TYPE_ATTRS)
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{
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case burm_int_ATTR:
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case burm_float_ATTR:
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hop_add_insel(hop, "addi sp, sp, 4");
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break;
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case burm_double_ATTR:
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case burm_long_ATTR:
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hop_add_insel(hop, "addi sp, sp, 8");
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break;
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default:
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goto nomove;
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}
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}
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fatal("hreg move of %%%d from %s to %s with mismatched types", vreg->id, src->id, dest->id);
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else
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{
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uint32_t type = src->attrs & TYPE_ATTRS;
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@ -44,6 +44,10 @@ REGISTERS
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r24r25 named("r24", "r25") aliases(r24, r25) long volatile;
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r2r3 named("r2", "r3") aliases(r2, r3) long volatile lret;
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r17r18 named("r17", "r18") aliases(r17, r18) long;
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r19r20 named("r19", "r20") aliases(r19, r20) long;
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r21r22 named("r21", "r22") aliases(r21, r22) long;
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f0 float volatile fret;
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f1 float volatile;
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f2 float volatile;
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