d0p1/ack
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

kill tokens using address registers better

Browse source
This commit is contained in:
ceriel 1989-11-01 10:14:27 +00:00
parent ce1285d2eb
commit 9c03f2c8bd
4 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
mach/m68020/ncg/table
View file

@ -332,7 +332,7 @@ index_off = index_off4 + index_off2 + index_off1 .
regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon . regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon .
address = ext_addr + local_addr + regAcon + regAregXcon . address = ext_addr + local_addr + regAcon + regAregXcon .
all_regind = indirect + offsetted + pre_post + index_off + all_regind = indirect + offsetted + pre_post + index_off +
regind_addr . regind_addr + areg .
all_indir = all_regind . all_indir = all_regind .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + local_addr + ext_addr + regAcon + regAregXcon +
@ -361,7 +361,7 @@ address = regind_addr +
absind_con + absind_con +
ext_regX . ext_regX .
all_regind = indirect + offsetted + index_off + pre_post + all_regind = indirect + offsetted + index_off + pre_post +
reg_memind + regind_addr . reg_memind + regind_addr + areg .
all_indir = all_regind + memind + ILOCAL . all_indir = all_regind + memind + ILOCAL .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) . local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) .

4
mach/m68k2/ncg/table
View file

@ -332,7 +332,7 @@ index_off = index_off4 + index_off2 + index_off1 .
regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon . regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon .
address = ext_addr + local_addr + regAcon + regAregXcon . address = ext_addr + local_addr + regAcon + regAregXcon .
all_regind = indirect + offsetted + pre_post + index_off + all_regind = indirect + offsetted + pre_post + index_off +
regind_addr . regind_addr + areg .
all_indir = all_regind . all_indir = all_regind .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + local_addr + ext_addr + regAcon + regAregXcon +
@ -361,7 +361,7 @@ address = regind_addr +
absind_con + absind_con +
ext_regX . ext_regX .
all_regind = indirect + offsetted + index_off + pre_post + all_regind = indirect + offsetted + index_off + pre_post +
reg_memind + regind_addr . reg_memind + regind_addr + areg .
all_indir = all_regind + memind + ILOCAL . all_indir = all_regind + memind + ILOCAL .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) . local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) .

4
mach/m68k4/ncg/table
View file

@ -332,7 +332,7 @@ index_off = index_off4 + index_off2 + index_off1 .
regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon . regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon .
address = ext_addr + local_addr + regAcon + regAregXcon . address = ext_addr + local_addr + regAcon + regAregXcon .
all_regind = indirect + offsetted + pre_post + index_off + all_regind = indirect + offsetted + pre_post + index_off +
regind_addr . regind_addr + areg .
all_indir = all_regind . all_indir = all_regind .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + local_addr + ext_addr + regAcon + regAregXcon +
@ -361,7 +361,7 @@ address = regind_addr +
absind_con + absind_con +
ext_regX . ext_regX .
all_regind = indirect + offsetted + index_off + pre_post + all_regind = indirect + offsetted + index_off + pre_post +
reg_memind + regind_addr . reg_memind + regind_addr + areg .
all_indir = all_regind + memind + ILOCAL . all_indir = all_regind + memind + ILOCAL .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) . local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) .

4
mach/moon3/ncg/table
View file

@ -332,7 +332,7 @@ index_off = index_off4 + index_off2 + index_off1 .
regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon . regind_addr = regAcon + regAregXcon + t_regAcon + t_regAregXcon .
address = ext_addr + local_addr + regAcon + regAregXcon . address = ext_addr + local_addr + regAcon + regAregXcon .
all_regind = indirect + offsetted + pre_post + index_off + all_regind = indirect + offsetted + pre_post + index_off +
regind_addr . regind_addr + areg .
all_indir = all_regind . all_indir = all_regind .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + local_addr + ext_addr + regAcon + regAregXcon +
@ -361,7 +361,7 @@ address = regind_addr +
absind_con + absind_con +
ext_regX . ext_regX .
all_regind = indirect + offsetted + index_off + pre_post + all_regind = indirect + offsetted + index_off + pre_post +
reg_memind + regind_addr . reg_memind + regind_addr + areg .
all_indir = all_regind + memind + ILOCAL . all_indir = all_regind + memind + ILOCAL .
allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 + allexceptcon = ALL - ( D_REG + A_REG + consts + dreg2 + dreg1 +
local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) . local_addr + ext_addr + regAcon + regAregXcon + ext_regX ) .