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166
doc/ceg/ceg.tr
166
doc/ceg/ceg.tr
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@ -15,7 +15,11 @@ Amsterdam, The Netherlands
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Introduction
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.PP
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A \fBcode expander\fR (\fBce\fR for short) is a part of the
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Amsterdam Compiler Kit (\fBACK\fR) and provides the user with
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Amsterdam Compiler Kit
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.[
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toolkit
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.]
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(\fBACK\fR) and provides the user with
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high-speed generation of medium-quality code. Although conceptually
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equivalent to the more usual \fBcode generator\fR, it differs in some
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aspects.
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@ -24,7 +28,7 @@ Normally, a program to be compiled with \fBACK\fR
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is first fed to the preprocessor. The output of the preprocessor goes
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into the appropriate front end, which produces EM
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.[
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Tanenbaum toolkit
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block
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.]
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(a
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machine independent low level intermediate code). The generated EM code is fed
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@ -131,10 +135,10 @@ routines from the EM_CODE interface that generate object code directly.
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.PP
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As already indicated, the compound table does not exist either. Instead, each
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assembly instruction in the as_table is converted to a routine generating C
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code
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.[
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Kernighan
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.]
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code
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to generate C code to call the \fBback\fR-primitives. The EM_table is
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converted into a program that for each EM instruction generates a routine,
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using the routines generated from the as_table. Execution of the latter program
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@ -647,7 +651,7 @@ When the code expander generator is used for generating assembly instead of
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object code (see section 5), not all the above mentioned constants
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and functions have to
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be defined. In this
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case, the constants ``BYTES_REVERSED'' and ``WORDS_REVERSED'' are not used.
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case, the constants ``BYTES_REVERSED'' and ``WORDS_\%REVERSED'' are not used.
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.NH 1
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Description of the as_table
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.PP
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@ -796,7 +800,10 @@ PUSH src ==> /* save in ax */
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mov_instr( AX_oper, src);
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/* set flag */
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@assign( push_waiting, TRUE).
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\fR
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.DE
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.DS
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\f5
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POP dst ==> @if ( push_waiting)
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/* ``mov_instr'' is asg-generated */
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mov_instr( dst, AX_oper);
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@ -858,7 +865,7 @@ the type of the operand in the following way.
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center tab(#);
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l c l.
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reference#::=#``%'' conversion
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##``('' operand-name ``\(->'' field-name ``)''
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##``('' operand-name ``\->'' field-name ``)''
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conversion#::=# printformat
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#|#``$''
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#|#``dist''
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@ -983,9 +990,10 @@ and ``references'' (see 4.2.4) also work in the functions defined in ``as.c''.
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.PP
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The following example shows the representative and essential parts of the
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8086 ``as.h'' and ``as.c'' files.
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.DS L
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.nr PS 10
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.nr VS 12
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.LP
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.DS L
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\f5
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/* Constants and type definitions in as.h */
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@ -1027,12 +1035,13 @@ struct t_operand {
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extern struct t_operand saved_op, *AX_oper;
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\fR
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.DE
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.nr PS 12
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.nr VS 14
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.DE
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.DS L
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.LP
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.nr PS 10
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.nr VS 12
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.DS L
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\f5
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/* Some functions in as.c. */
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@ -1045,19 +1054,6 @@ extern struct t_operand saved_op, *AX_oper;
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#define RIGHT ')'
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#define DOLLAR '$'
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process_label( l)
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char *l;
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{
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}
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process_mnemonic( m)
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char *m;
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{
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}
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process_operand( str, op)
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char *str;
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struct t_operand *op;
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@ -1107,74 +1103,74 @@ struct t_operand *op;
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* Note the $-operators
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*/
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{
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if ( REG( op))
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R233( 0x3, reg, op->reg);
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else if ( ADDR( op)) {
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R233( 0x0, reg, 0x6);
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@reloc2( %$(op->lab), %$(op->off), ABSOLUTE);
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}
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else if ( strcmp( op->expr, "0") == 0)
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switch( op->reg) {
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case SI : R233( 0x0, reg, 0x4);
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break;
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if ( REG( op))
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R233( 0x3, reg, op->reg);
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else if ( ADDR( op)) {
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R233( 0x0, reg, 0x6);
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@reloc2( %$(op->lab), %$(op->off), ABSOLUTE);
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}
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else if ( strcmp( op->expr, "0") == 0)
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switch( op->reg) {
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case SI : R233( 0x0, reg, 0x4);
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break;
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case DI : R233( 0x0, reg, 0x5);
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break;
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case DI : R233( 0x0, reg, 0x5);
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break;
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case BP : R233( 0x1, reg, 0x6); /* exception! */
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@text1( 0);
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break;
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case BP : R233( 0x1, reg, 0x6); /* exception! */
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@text1( 0);
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break;
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case BX : R233( 0x0, reg, 0x7);
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break;
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case BX : R233( 0x0, reg, 0x7);
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break;
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default : fprint( STDERR, "Wrong index register %d\n",
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op->reg);
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}
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else {
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@if ( fit_byte( %$(op->expr)))
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switch( op->reg) {
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case SI : R233( 0x1, reg, 0x4);
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break;
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default : fprint( STDERR, "Wrong index register %d\en",
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op->reg);
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}
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else {
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@if ( fit_byte( %$(op->expr)))
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switch( op->reg) {
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case SI : R233( 0x1, reg, 0x4);
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break;
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case DI : R233( 0x1, reg, 0x5);
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break;
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case DI : R233( 0x1, reg, 0x5);
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break;
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case BP : R233( 0x1, reg, 0x6);
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break;
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case BP : R233( 0x1, reg, 0x6);
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break;
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case BX : R233( 0x1, reg, 0x7);
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break;
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case BX : R233( 0x1, reg, 0x7);
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break;
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default : fprint( STDERR, "Wrong index register %d\n",
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op->reg);
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}
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@text1( %$(op->expr));
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@else
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switch( op->reg) {
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case SI : R233( 0x2, reg, 0x4);
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break;
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default : fprint( STDERR, "Wrong index register %d\en",
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op->reg);
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}
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@text1( %$(op->expr));
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@else
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switch( op->reg) {
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case SI : R233( 0x2, reg, 0x4);
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break;
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case DI : R233( 0x2, reg, 0x5);
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break;
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case DI : R233( 0x2, reg, 0x5);
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break;
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case BP : R233( 0x2, reg, 0x6);
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break;
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case BP : R233( 0x2, reg, 0x6);
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break;
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case BX : R233( 0x2, reg, 0x7);
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break;
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case BX : R233( 0x2, reg, 0x7);
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break;
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default : fprint( STDERR, "Wrong index register %d\n",
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op->reg);
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}
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@text2( %$(op->expr));
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@fi
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}
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default : fprint( STDERR, "Wrong index register %d\en",
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op->reg);
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}
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@text2( %$(op->expr));
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@fi
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}
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}
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\fR
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.DE
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.nr PS 12
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.nr VS 14
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.DE
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.NH 2
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Generating assembly code
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.PP
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@ -1229,7 +1225,9 @@ tested (e.g., by running the compiler on the EM test set). If an error occurs,
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change the EM_table and type
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.IP
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.br
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\f5update\fR \fBC_instr\fR
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\f5
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update\fR \fBC_instr
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\fR
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.br
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.LP
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where \fBC_instr\fR stands for the name of the erroneous EM-instruction.
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@ -1247,9 +1245,9 @@ Remove the ``ce'' and ``ceg'' directories.
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Write the ``as_table'', ``as.h'', and ``as.c'' files.
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.IP \0\03:
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type
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.br
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.sp
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\f5 install_ceg -obj \fR
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.br
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.sp
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The option \f5-obj\fR means that ``back.a'' will contain a library
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for generating
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ACK.OUT(5ACK) object files, see appendix B.
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@ -1264,16 +1262,14 @@ The as_table is ready to be tested. If an error occurs, adapt the table.
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Then there are two ways to proceed:
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.IP \0\01:
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recompile the whole EM_table,
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.br
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\f5
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update ALL
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\fR
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.sp
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\f5 update ALL \fR
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.sp
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.IP \0\02:
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recompile just the few EM-instructions that contained the error,
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\f5
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.br
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update \fBC_instr\fR
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.br
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.sp
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\f5 update \fBC_instr\fR
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.sp
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where \fBC_instr\fR is an erroneous EM-instruction.
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This has to be done for every EM-instruction that contained the erroneous
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assembly instruction.
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