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Added CSA ==4 and CSB ==4 entries, needed for ANSI C

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ceriel 1989-10-25 17:21:52 +00:00
parent 13ea4896b0
commit a5b0790d96
2 changed files with 17 additions and 0 deletions
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3
mach/i86/ncg/mach.c
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@ -43,6 +43,9 @@ con_mult(sz) word sz; {
#define CODE_GENERATOR #define CODE_GENERATOR
#define IEEEFLOAT #define IEEEFLOAT
#define FL_MSL_AT_LOW_ADDRESS 0
#define FL_MSW_AT_LOW_ADDRESS 0
#define FL_MSB_AT_LOW_ADDRESS 0
#include <con_float> #include <con_float>
/* /*

14
mach/i86/ncg/table
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@ -2848,23 +2848,37 @@ with BXREG ACC
kills ALL kills ALL
gen jmp {label, ".csa2"} gen jmp {label, ".csa2"}
pat csa $1==4
with BXREG ACC DXREG
kills ALL
gen jmp {label, ".csa4"}
/*
pat csa !defined($1) pat csa !defined($1)
with rm-BXREG-ACC ACC with rm-BXREG-ACC ACC
kills ALL kills ALL
gen cmp %1,{ANYCON,2} gen cmp %1,{ANYCON,2}
jne {label, ".unknown"} jne {label, ".unknown"}
jmp {label, ".csa2"} jmp {label, ".csa2"}
*/
pat csb $1==2 pat csb $1==2
with BXREG ACC with BXREG ACC
kills ALL kills ALL
gen jmp {label, ".csb2"} gen jmp {label, ".csb2"}
pat csb $1==4
with BXREG ACC DXREG
kills ALL
gen jmp {label, ".csb4"}
/*
pat csb !defined($1) pat csb !defined($1)
with rm-BXREG-ACC BXREG ACC with rm-BXREG-ACC BXREG ACC
gen cmp %1,{ANYCON,2} gen cmp %1,{ANYCON,2}
jne {label, ".unknown"} jne {label, ".unknown"}
jmp {label, ".csb2"} jmp {label, ".csb2"}
*/
pat dup $1==2 pat dup $1==2
with anyreg yields %1 %1 with anyreg yields %1 %1