From aaf81a512b17d3323aca8e78f56fda671019eadf Mon Sep 17 00:00:00 2001
From: sater <none@none>
Date: Thu, 12 Jul 1984 14:51:48 +0000
Subject: [PATCH] *** empty log message ***

---
 man/6500_as.1 | 65 +++++++++++++++++++++++++++++++++++++++++++++++++++
 man/6800_as.1 | 55 +++++++++++++++++++++++++++++++++++++++++++
 man/8080_as.1 | 36 ++++++++++++++++++++++++++++
 3 files changed, 156 insertions(+)
 create mode 100644 man/6500_as.1
 create mode 100644 man/6800_as.1
 create mode 100644 man/8080_as.1

diff --git a/man/6500_as.1 b/man/6500_as.1
new file mode 100644
index 000000000..f3708cfdf
--- /dev/null
+++ b/man/6500_as.1
@@ -0,0 +1,65 @@
+\" $Header$
+.TH 6500_AS 1
+.ad
+.SH NAME
+6500_as \- assembler for Mostek 6500
+.SH SYNOPSIS
+/usr/em/lib/6500_as [options] argument ...
+.SH DESCRIPTION
+This assembler is made with the general framework
+described in \fIuni_ass\fP(6).
+.SH "SEGMENTS and TYPES"
+An additional segment, the \fIzeropage\fP, can be started by the
+\&\fI.zero\fP pseudo-instruction.
+Some adressing-modes require an address between 0 and 255.
+Such an address must be defined with the means of the \fI.zero\fP
+pseudo-instruction.
+A plain number between 0 and 255 is not allowed.
+The assembler will complain that it must be a zero page expression.
+.IP example
+\&.zero
+.br
+answer: .space 1
+.br
+\&.text
+.br
+and     (answer, x)
+.SH SYNTAX
+.IP expressions
+An two-byte expression followed by the pseudo-operator \fI.h\fP (\fI.l\fP)
+has the value of the higher (lower) byte of the expression.
+\&\fI.h\fP and \fI.l\fP bind stronger than all other operators.
+E.g. -1.h parses as -[1.h] which has value 0.
+You have to write [-1].h to get 0xFF.
+.IP "addressing modes"
+.nf
+.ta 8 16 24 32 40 48
+syntax		meaning (name)
+
+#expr		8-bit value (immediate)
+
+expr		address (direct)
+
+expr, x		expr + contents of x
+   or			or
+expr, y		expr + contents of y
+			yields address (indexed)
+
+(expr)		address of address (only with JMP) (indirect)
+
+In the next two addressing modes `expr' has to be
+a zeropage expression.
+
+(expr, x)	expr + contents of x
+			yields address (pre-indexed indirect)
+
+(expr), y	contents of expr + contents of y
+			yields address (post-indexed indirect)
+.fi
+.IP instructions
+There are two mnemonics that do not map onto one machine-instruction:
+`add' and `sub'. `Add mode' maps onto `clc; adc mode'.
+`Sub mode' maps onto `sec; sbc mode'.
+.SH "SEE ALSO"
+uni_ass(6),
+ack(1)
diff --git a/man/6800_as.1 b/man/6800_as.1
new file mode 100644
index 000000000..6fec1bab9
--- /dev/null
+++ b/man/6800_as.1
@@ -0,0 +1,55 @@
+\" $Header$
+.TH 6800_AS 1
+.ad
+.SH NAME
+6800_as \- assembler for Motorola 6800
+.SH SYNOPSIS
+/usr/em/lib/6800_as [options] argument ...
+.SH DESCRIPTION
+This assembler is made with the general framework
+described in \fIuni_ass\fP(6).
+.SH SYNTAX
+.IP registers
+The 6800 has two accumulator registers, A and B. An instruction that refers
+to accumulator A, has an "a" as last character. In the same way a "b" means
+that the instruction uses B as accumulator.
+.IP "addressing modes"
+.nf
+.ta 8 16 24 32 40 48
+syntax		meaning (name)
+
+#expr		with cpx, ldx, lds a 2-byte value,
+		otherwise a 1-byte value (immediate)
+
+<expr		1-byte address.  Not allowed with:
+		asl, asr, clr, com, dec, inc, lsl, lsr,
+		neg, rol, ror, tst (base page direct)
+
+expr		2-byte address (extended direct)
+
+expr, x		1-byte expr + contents of x
+		yields address (indexed)
+.fi
+.SH "SEE ALSO"
+uni_ass(6),
+ack(1),
+.br
+A. Osborne, 6800 programming for logic design,
+Adam Osborne and Associates Inc., 1977
+.SH EXAMPLE
+An example of Motorola 6800 assembly code.
+.sp 2
+.nf
+.ta 8 16 32 40 48 56 64
+	.data
+	val:	0
+	.text
+		ldx	<val
+		com	val, x
+		bhs	someplace	! branch on carry clear
+		sta	<val
+		adda	#18		! add 18 to accumulator A
+.fi
+.SH BUGS
+You have to specify whether an address fits in one byte
+with the token `<'. It should be done automatically.
diff --git a/man/8080_as.1 b/man/8080_as.1
new file mode 100644
index 000000000..271745d6d
--- /dev/null
+++ b/man/8080_as.1
@@ -0,0 +1,36 @@
+\" $Header$
+.TH 8080_AS 1
+.ad
+.SH NAME
+8080_as \- assembler for Intel 8080 and 8085
+.SH SYNOPSIS
+/usr/em/lib/8080_as [options] argument ...
+.SH DESCRIPTION
+This assembler is made with the general framework
+described in \fIuni_ass\fP(6).
+.SH SYNTAX
+.IP registers
+The 8080 has seven one-byte registers: a, b, c, d, e, h, l;
+and two two-byte registers: sp and psw, respectively the stack pointer
+and the processor status word.
+.IP "addressing modes"
+.nf
+.ta 8 16 24 32 40 48
+syntax		meaning
+
+expr		one- or two-byte address or immediate
+		data, depending on the instruction.
+
+a,b,c,d,e,h,l
+sp,psw		(lower byte) of register
+
+b,d,h		register-pair b-c, d-e, or h-l
+
+m		register-pair h-l is address of
+		(one or two byte) operand
+.fi
+.SH "SEE ALSO"
+uni_ass(1),
+ack(1),
+.br
+System 80/20-4 microcomputer hardware reference manual, 1978 Intel corporation