Clang-format before editing.
This commit is contained in:
David Given
parent
c4e3d0903e
commit
ac33bdd031
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@ -18,7 +18,7 @@ static char rcsid[] = "$Id$";
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#include "orig.h"
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#include "sym.h"
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#define UBYTE(x) ((x) & BYTEMASK)
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#define UBYTE(x) ((x)&BYTEMASK)
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static uint16_t read2(char* addr, int type)
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{
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@ -34,10 +34,13 @@ static uint32_t read4(char* addr, int type)
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{
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unsigned short word0, word1;
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if (type & RELBR) {
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if (type & RELBR)
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{
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word0 = (UBYTE(addr[0]) << WIDTH) + UBYTE(addr[1]);
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word1 = (UBYTE(addr[2]) << WIDTH) + UBYTE(addr[3]);
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} else {
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}
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else
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{
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word0 = (UBYTE(addr[1]) << WIDTH) + UBYTE(addr[0]);
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word1 = (UBYTE(addr[3]) << WIDTH) + UBYTE(addr[2]);
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}
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@ -61,9 +64,9 @@ static uint32_t get_vc4_valu(char* addr)
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* st<w> rd, $+o: [1110 0111 ww 1 d:5] [11111 o:27]
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*/
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int32_t value = read4(addr+2, 0);
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int32_t value = read4(addr + 2, 0);
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value &= 0x07ffffff;
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value = value<<5>>5;
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value = value << 5 >> 5;
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return value;
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}
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@ -75,7 +78,7 @@ static uint32_t get_vc4_valu(char* addr)
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uint32_t value = read4(addr, RELWR);
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value &= 0x007fffff;
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value = value<<9>>9;
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value = value << 9 >> 9;
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value *= 2;
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return value;
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}
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@ -90,8 +93,8 @@ static uint32_t get_vc4_valu(char* addr)
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int32_t value = read4(addr, RELWR);
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int32_t lov = value & 0x007fffff;
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int32_t hiv = value & 0x0f000000;
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value = lov | (hiv>>1);
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value = value<<5>>5;
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value = lov | (hiv >> 1);
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value = value << 5 >> 5;
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value *= 2;
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return value;
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}
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@ -100,7 +103,7 @@ static uint32_t get_vc4_valu(char* addr)
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{
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/* lea: [1110 0101 000 d:5] [o:32] */
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return read4(addr+2, 0);
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return read4(addr + 2, 0);
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}
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assert(0 && "unrecognised VC4 instruction");
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@ -137,22 +140,20 @@ static bool is_powerpc_memory_op(uint32_t opcode)
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static uint32_t get_powerpc_valu(char* addr, uint16_t type)
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{
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uint32_t opcode1 = read4(addr+0, type);
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uint32_t opcode2 = read4(addr+4, type);
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uint32_t opcode1 = read4(addr + 0, type);
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uint32_t opcode2 = read4(addr + 4, type);
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if ((opcode1 & 0xfc000000) == 0x48000000)
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{
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/* branch instruction */
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return opcode1 & 0x03fffffd;
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}
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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((opcode2 & 0xfc000000) == 0x60000000))
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) && ((opcode2 & 0xfc000000) == 0x60000000))
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{
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/* addis / ori instruction pair */
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return ((opcode1 & 0xffff) << 16) | (opcode2 & 0xffff);
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}
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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is_powerpc_memory_op(opcode2))
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) && is_powerpc_memory_op(opcode2))
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{
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/* addis / memoryop instruction pair */
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uint16_t hi = opcode1 & 0xffff;
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@ -166,12 +167,13 @@ static uint32_t get_powerpc_valu(char* addr, uint16_t type)
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return ((hi << 16) | lo);
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}
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fatal("Don't know how to read from PowerPC fixup on instructions 0x%08lx+0x%08lx",
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fatal(
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"Don't know how to read from PowerPC fixup on instructions 0x%08lx+0x%08lx",
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(unsigned long)opcode1, (unsigned long)opcode2);
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}
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/* RELOPPC_LIS stores a signed 26-bit offset in the low bits. */
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static uint32_t get_lis_valu(char *addr, uint16_t type)
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static uint32_t get_lis_valu(char* addr, uint16_t type)
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{
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uint32_t valu = read4(addr, type) & 0x03ffffff;
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if (valu & 0x02000000)
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@ -189,7 +191,7 @@ static uint32_t get_mips_valu(char* addr)
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case 3: /* jal */
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case 29: /* jalx */
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/* Unsigned 26-bit payload. */
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value = value & ((1<<26)-1);
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value = value & ((1 << 26) - 1);
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break;
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default: /* assume everything else is a b, there are lots */
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@ -209,7 +211,8 @@ static uint32_t get_mips_valu(char* addr)
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*/
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static uint32_t getvalu(char* addr, uint16_t type)
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{
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switch (type & RELSZ) {
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switch (type & RELSZ)
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{
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case RELO1:
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return UBYTE(addr[0]);
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case RELO2:
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@ -236,10 +239,13 @@ static void write2(uint16_t valu, char* addr, int type)
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{
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unsigned short word0, word1;
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if (type & RELBR) {
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if (type & RELBR)
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{
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addr[0] = valu >> WIDTH;
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addr[1] = valu;
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} else {
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}
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else
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{
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addr[0] = valu;
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addr[1] = valu >> WIDTH;
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}
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@ -249,19 +255,25 @@ static void write4(uint32_t valu, char* addr, int type)
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{
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unsigned short word0, word1;
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if (type & RELWR) {
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if (type & RELWR)
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{
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word0 = valu >> (2 * WIDTH);
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word1 = valu;
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} else {
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}
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else
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{
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word0 = valu;
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word1 = valu >> (2 * WIDTH);
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}
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if (type & RELBR) {
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if (type & RELBR)
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{
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addr[0] = word0 >> WIDTH;
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addr[1] = word0;
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addr[2] = word1 >> WIDTH;
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addr[3] = word1;
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} else {
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}
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else
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{
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addr[0] = word0;
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addr[1] = word0 >> WIDTH;
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addr[2] = word1;
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@ -283,10 +295,10 @@ static void put_vc4_valu(char* addr, uint32_t value)
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* st<w> rd, o, (pc): [1110 0111 ww 1 d:5] [11111 o:27]
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*/
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uint32_t v = read4(addr+2, 0);
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uint32_t v = read4(addr + 2, 0);
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v &= 0xf8000000;
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v |= value & 0x07ffffff;
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write4(v, addr+2, 0);
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write4(v, addr + 2, 0);
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}
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else if ((opcode & 0xf080) == 0x9000)
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{
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@ -296,7 +308,7 @@ static void put_vc4_valu(char* addr, uint32_t value)
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uint32_t v = read4(addr, RELWR);
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v &= 0xff800000;
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v |= (value/2) & 0x007fffff;
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v |= (value / 2) & 0x007fffff;
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write4(v, addr, RELWR);
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}
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else if ((opcode & 0xf080) == 0x9080)
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@ -307,17 +319,17 @@ static void put_vc4_valu(char* addr, uint32_t value)
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*/
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uint32_t v = read4(addr, RELWR);
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uint32_t lovalue = (value/2) & 0x007fffff;
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uint32_t hivalue = (value/2) & 0x07800000;
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uint32_t lovalue = (value / 2) & 0x007fffff;
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uint32_t hivalue = (value / 2) & 0x07800000;
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v &= 0xf0800000;
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v |= lovalue | (hivalue<<1);
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v |= lovalue | (hivalue << 1);
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write4(v, addr, RELWR);
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}
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else if ((opcode & 0xffe0) == 0xe500)
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{
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/* lea: [1110 0101 000 d:5] [o:32] */
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write4(value, addr+2, 0);
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write4(value, addr + 2, 0);
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}
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else
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assert(0 && "unrecognised VC4 instruction");
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@ -330,8 +342,8 @@ static void put_vc4_valu(char* addr, uint32_t value)
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static void put_powerpc_valu(char* addr, uint32_t value, uint16_t type)
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{
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uint32_t opcode1 = read4(addr+0, type);
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uint32_t opcode2 = read4(addr+4, type);
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uint32_t opcode1 = read4(addr + 0, type);
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uint32_t opcode2 = read4(addr + 4, type);
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if ((opcode1 & 0xfc000000) == 0x48000000)
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{
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@ -340,18 +352,16 @@ static void put_powerpc_valu(char* addr, uint32_t value, uint16_t type)
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i |= value & 0x03fffffd;
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write4(i, addr, type);
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}
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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((opcode2 & 0xfc000000) == 0x60000000))
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) && ((opcode2 & 0xfc000000) == 0x60000000))
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{
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/* addis / ori instruction pair */
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uint16_t hi = value >> 16;
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uint16_t lo = value & 0xffff;
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write4((opcode1 & 0xffff0000) | hi, addr+0, type);
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write4((opcode2 & 0xffff0000) | lo, addr+4, type);
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write4((opcode1 & 0xffff0000) | hi, addr + 0, type);
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write4((opcode2 & 0xffff0000) | lo, addr + 4, type);
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}
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) &&
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is_powerpc_memory_op(opcode2))
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else if (((opcode1 & 0xfc1f0000) == 0x3c000000) && is_powerpc_memory_op(opcode2))
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{
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/* addis / memoryop instruction pair */
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uint16_t hi = value >> 16;
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@ -362,12 +372,13 @@ static void put_powerpc_valu(char* addr, uint32_t value, uint16_t type)
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if (lo > 0x7fff)
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hi++;
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write4((opcode1 & 0xffff0000) | hi, addr+0, type);
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write4((opcode2 & 0xffff0000) | lo, addr+4, type);
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write4((opcode1 & 0xffff0000) | hi, addr + 0, type);
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write4((opcode2 & 0xffff0000) | lo, addr + 4, type);
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}
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else
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fatal("Don't know how to write a PowerPC fixup to instructions 0x%08lx+0x%08lx",
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fatal(
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"Don't know how to write a PowerPC fixup to instructions 0x%08lx+0x%08lx",
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(unsigned long)opcode1, (unsigned long)opcode2);
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}
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@ -413,14 +424,14 @@ static void put_mips_valu(char* addr, uint32_t value)
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case 3: /* jal */
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case 29: /* jalx */
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/* Unsigned 26-bit payload. */
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value = value & ((1<<26)-1);
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opcode = opcode & ~((1<<26)-1);
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value = value & ((1 << 26) - 1);
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opcode = opcode & ~((1 << 26) - 1);
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break;
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default: /* assume everything else is a b, there are lots */
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/* Signed 16-bit payload. */
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value = value & ((1<<16)-1);
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opcode = opcode & ~((1<<16)-1);
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value = value & ((1 << 16) - 1);
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opcode = opcode & ~((1 << 16) - 1);
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break;
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}
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@ -435,7 +446,8 @@ static void put_mips_valu(char* addr, uint32_t value)
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static putvalu(uint32_t valu, char* addr, uint16_t type)
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{
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switch (type & RELSZ) {
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switch (type & RELSZ)
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{
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case RELO1:
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addr[0] = valu;
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break;
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@ -443,10 +455,10 @@ static putvalu(uint32_t valu, char* addr, uint16_t type)
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write2(valu, addr, type);
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break;
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case RELO2HI:
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write2(valu>>16, addr, type);
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write2(valu >> 16, addr, type);
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break;
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case RELO2HISAD:
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write2((valu>>16) + !!(valu&0x8000), addr, type);
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write2((valu >> 16) + !!(valu & 0x8000), addr, type);
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break;
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case RELO4:
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write4(valu, addr, type);
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@ -483,42 +495,47 @@ extern struct orig relorig[];
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* Second case: we must update the value by the change
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* in position of the section of local.
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*/
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static unsigned
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addrelo(relo, names, valu_out)
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struct outrelo *relo;
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struct outname *names;
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long *valu_out; /* Out variable. */
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static unsigned addrelo(relo, names, valu_out) struct outrelo* relo;
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struct outname* names;
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long* valu_out; /* Out variable. */
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{
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register struct outname *local = &names[relo->or_nami];
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register struct outname* local = &names[relo->or_nami];
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register unsigned short index = NLocals;
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register long valu = *valu_out;
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if ((local->on_type & S_SCT)) {
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if ((local->on_type & S_SCT))
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{
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register int sectindex = (local->on_type & S_TYP) - S_MIN;
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valu += relorig[sectindex].org_size;
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valu += outsect[sectindex].os_base;
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index += NGlobals + sectindex;
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} else {
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register struct outname *name;
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}
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else
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{
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register struct outname* name;
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extern int hash();
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extern struct outname *searchname();
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extern struct outname* searchname();
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extern unsigned indexof();
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extern struct outhead outhead;
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name = searchname(local->on_mptr, hash(local->on_mptr));
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if (name == (struct outname *)0)
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if (name == (struct outname*)0)
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fatal("name %s not found in pass 2", local->on_mptr);
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if (ISCOMMON(name) || ISUNDEFINED(name)) {
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debug("can't relocate from %s\n",local->on_mptr,0,0,0);
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if (ISCOMMON(name) || ISUNDEFINED(name))
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{
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debug("can't relocate from %s\n", local->on_mptr, 0, 0, 0);
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index += indexof(name);
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} else {
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}
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else
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{
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valu += name->on_valu;
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if ((name->on_type & S_TYP) == S_ABS) {
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if ((name->on_type & S_TYP) == S_ABS)
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{
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index += NGlobals + outhead.oh_nsect;
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}
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else index += NGlobals +
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(name->on_type & S_TYP) - S_MIN;
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else
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index += NGlobals + (name->on_type & S_TYP) - S_MIN;
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}
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}
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*valu_out = valu;
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@ -530,12 +547,11 @@ addrelo(relo, names, valu_out)
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* which the header is pointed to by `head'. Relocation is relative to the
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* names in `names'; `relo' tells how to relocate.
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*/
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relocate(head, emit, names, relo, off)
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struct outhead *head;
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char *emit;
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struct outname names[];
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struct outrelo *relo;
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long off;
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relocate(head, emit, names, relo, off) struct outhead* head;
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char* emit;
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struct outname names[];
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struct outrelo* relo;
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long off;
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{
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long valu;
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int sectindex = relo->or_sect - S_MIN;
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@ -553,10 +569,13 @@ relocate(head, emit, names, relo, off)
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* - a section name
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* - the first name outside! the name table (argh)
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*/
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if (relo->or_nami < head->oh_nname) {
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if (relo->or_nami < head->oh_nname)
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{
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/* First two cases. */
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relo->or_nami = addrelo(relo, names, &valu);
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} else {
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}
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else
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{
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/*
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* Third case: it is absolute. The relocation of absolute
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* names is always 0. We only need to change the index.
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@ -571,7 +590,7 @@ relocate(head, emit, names, relo, off)
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* now we subtract the origin of the referencING section.
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*/
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if (relo->or_type & RELPC)
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valu -= relorig[sectindex].org_size+outsect[sectindex].os_base;
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valu -= relorig[sectindex].org_size + outsect[sectindex].os_base;
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/*
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* Now put the value back.
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