Replaced clr by the faster mov #0, (for d registers).

This commit is contained in:
keie 1984-12-18 17:06:36 +00:00
parent 5f41dcd958
commit b544d3b401

View file

@ -93,7 +93,7 @@ mli_2W:
#else #else
move.l (sp)+,d0 ; move.l (sp)+,d1 move.l (sp)+,d0 ; move.l (sp)+,d1
#endif #endif
4: clr.w d5 ; tst.l d0 ; bpl 5f 4: move.l #0,d5 ; tst.l d0 ; bpl 5f
neg.l d0 ; not.w d5 neg.l d0 ; not.w d5
5: tst.l d1 ; bpl 6f 5: tst.l d1 ; bpl 6f
neg.l d1 ; not.w d5 neg.l d1 ; not.w d5
@ -189,6 +189,7 @@ rmi_2W:
jmp (a4) jmp (a4)
! 2byte division . In d1: quotient=low word ; remainder=high word ! 2byte division . In d1: quotient=low word ; remainder=high word
#ifndef lword
dvi2: move.l (sp)+,d2 dvi2: move.l (sp)+,d2
move.w (sp)+,d0 !divisor move.w (sp)+,d0 !divisor
move.w (sp)+,d1 ; ext.l d1 !dividend move.w (sp)+,d1 ; ext.l d1 !dividend
@ -203,6 +204,7 @@ dvi2: move.l (sp)+,d2
#endif #endif
divs d0,d1 divs d0,d1
4: move.l d2,-(sp) ; rts 4: move.l d2,-(sp) ; rts
#endif
! long signed division . quotient in d1 , remainder in d3 ! long signed division . quotient in d1 , remainder in d3
dvi4: move.l (sp)+,d5 dvi4: move.l (sp)+,d5
@ -214,7 +216,7 @@ dvi4: move.l (sp)+,d5
0: bsr e_iund 0: bsr e_iund
1: 1:
#endif #endif
clr.l d4 !sign in d4 move.l #0,d4 !sign in d4
tst.l d0 ; bpl 1f tst.l d0 ; bpl 1f
neg.l d0 ; not.w d4 neg.l d0 ; not.w d4
1: tst.l d1 ; bpl 2f 1: tst.l d1 ; bpl 2f
@ -238,7 +240,7 @@ dvu4:
bsr e_idivz bsr e_idivz
1: 1:
#endif #endif
clr.l d3 ; move.l #32,d2 move.l #0,d3 ; move.l #32,d2
3: lsl.l #1,d1 ; roxl.l #1,d3 3: lsl.l #1,d1 ; roxl.l #1,d3
cmp.l d0,d3 ; blt 4f cmp.l d0,d3 ; blt 4f
sub.l d0,d3 ; add.l #1,d1 sub.l d0,d3 ; add.l #1,d1