adapted to phototypesetter

lang/pc/pem/em_pem.6

@@ -39,7 +39,7 @@ ISO/TC97/SC5-N462, received November 1979.
 .IP [4]
 J.W.Stevenson "The Amsterdam Compiler Kit Pascal reference manual".
 .br
-(try 'nroff /usr/em/doc/pcref.doc')
+(try \fInroff /usr/em/doc/pcref.doc\fP)
 .IP [5]
 \fIack\fP(I)
 .SH DIAGNOSTICS

man/6500_as.1

@@ -1,6 +1,5 @@
 .\" $Header$
 .TH 6500_AS 1
-.ad
 .SH NAME
 6500_as \- assembler for Mostek 6500
 .SH SYNOPSIS
@@ -33,7 +32,7 @@ E.g. -1.h parses as -[1.h] which has value 0.
 You have to write [-1].h to get 0xFF.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 16n 24n 32n 40n 48n
 syntax	meaning (name)
 
 #expr	8-bit value (immediate)
@@ -46,10 +45,12 @@ expr, y		expr + contents of y
 		yields address (indexed)
 
 (expr)	address of address (only with JMP) (indirect)
+.fi
 
-In the next two addressing modes `expr' has to be
+In the next two addressing modes \fIexpr\fP has to be
 a zeropage expression.
 
+.nf
 (expr, x)	expr + contents of x
 		yields address (pre-indexed indirect)
 
@@ -58,8 +59,8 @@ a zeropage expression.
 .fi
 .IP instructions
 There are two mnemonics that do not map onto one machine-instruction:
-`add' and `sub'. `Add mode' maps onto `clc; adc mode'.
+\fIadd\fP and \fIsub\fP. \fIAdd mode\fP maps onto \fIclc; adc mode\fP.
-`Sub mode' maps onto `sec; sbc mode'.
+\fISub mode\fP maps onto \fIsec; sbc mode\fP.
 .SH "SEE ALSO"
 uni_ass(6),
 ack(1)

man/6800_as.1

@@ -15,7 +15,7 @@ to accumulator A, has an "a" as last character. In the same way a "b" means
 that the instruction uses B as accumulator.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name)
 
 #expr		with cpx, ldx, lds a 2-byte value,
@@ -40,7 +40,7 @@ Adam Osborne and Associates Inc., 1977
 An example of Motorola 6800 assembly code.
 .sp 2
 .nf
-.ta 8 16 32 40 48 56 64
+.ta 8n 16n 32n 40n 48n 56n 64n
 	.data
 	val:	0
 	.text
@@ -52,4 +52,4 @@ An example of Motorola 6800 assembly code.
 .fi
 .SH BUGS
 You have to specify whether an address fits in one byte
-with the token `<'. It should be done automatically.
+with the token \fI<\fP. It should be done automatically.

man/6805_as.1

@@ -27,7 +27,7 @@ range it is replaced by a reversed condition branch, followed by
 a jump, automatically.
 .sp
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name)
 
 #expr		a one byte value (immediate)
@@ -68,7 +68,7 @@ Prentice-Hall, Inc., 1983, (ISBN 0-13-541375-3).
 An example of Motorola 6805 assembly code.
 .sp 2
 .nf
-.ta 8 16 32 40 48 56 64
+.ta 8n 16n 32n 40n 48n 56n 64n
 	.dram
 	one:	.space	1		! a-port
 	.dprom

man/6809_as.1

@@ -34,28 +34,28 @@ This is used for efficient address encoding of some addressing
 mode (see below).
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name)
 
-reg		The operand of the instruction is in `reg'.
+reg		The operand of the instruction is in \fIreg\fP.
 
-reglist		`reglist' is a either list of registers, seperated
+reglist		\fIreglist\fP is a either list of registers, seperated
 		by ','s, or the word "all". It encodes in a register
 		save mask, where "all" means all registers, that can
 		be used by the push-pull instructions pshs, pshu,
 		puls, and pulu.
 
-<expr		The one-byte value of `expr' is an address within
+<expr		The one-byte value of \fIexpr\fP is an address within
 		a 256-byte page. The particular page in use is
-		indicated by the contents of dp, so `expr' is the
+		indicated by the contents of dp, so \fIexpr\fP is the
 		low byte of the effective address of the operand,
 		and dp the high byte. (direct)
 
->expr		The two-byte value of `expr' is the exact memory
+>expr		The two-byte value of \fIexpr\fP is the exact memory
 		address. Not that this mode always requires one
 		byte more than "<expr". (extended)
 
-expr		The value of `expr' is an address.
+expr		The value of \fIexpr\fP is an address.
 		Except for long branches, this value is examined
 		first to see if a short encoding is possible.
 		When the instruction is a short branch, the value
@@ -68,58 +68,58 @@ expr		The value of `expr' is an address.
 		"<expr", else by ">expr".
 		(relative for branch-instructions)
 
-#expr		The value of `expr' is one- or two-byte immediate
+#expr		The value of \fIexpr\fP is one- or two-byte immediate
 		data. (immediate)
 
-(expr)		The value of `expr' is a pointer to the address
+(expr)		The value of \fIexpr\fP is a pointer to the address
 		of the operand. (indirect)
 
-expr, reg	The value of `expr' added to the contents of `reg'
+expr, reg	The value of \fIexpr\fP added to the contents of \fIreg\fP
 		(which must be a 16-bit register) yields the
 		effective address of the operand.
 		(constant-offset indexed)
 
-, ireg		The contents of `ireg' (which must be indexable)
+, ireg		The contents of \fIireg\fP (which must be indexable)
 		yields the effective address of the operand.
 		(constant-offset indexed)
 
-(expr, reg)	The value of `expr' added to the contents of `reg'
+(expr, reg)	The value of \fIexpr\fP added to the contents of \fIreg\fP
 		(which must be a 16-bit register) yields a pointer
 		to the effective address of the operand.
 		(constant-offset indexed indirect)
 
-(, ireg)	The contents of `ireg' (which must be indexable)
+(, ireg)	The contents of \fIireg\fP (which must be indexable)
 		yields a pointer to the effective address of the
 		operand. (constant-offset indexed indirect)
 
-ac, ireg	The contents of `ac' (which must be an accumulator)
+ac, ireg	The contents of \fIac\fP (which must be an accumulator)
-		added to the contents of `ireg' (which must be
+		added to the contents of \fIireg\fP (which must be
 		indexable) yields the effective address of the
 		operand. (accumulator indexed)
 
-(ac, ireg)	The contents of `ac' (which must be an accumulator)
+(ac, ireg)	The contents of \fIac\fP (which must be an accumulator)
-		added to the contents of `ireg' (which must be
+		added to the contents of \fIireg\fP (which must be
 		indexable) yields a pointer to the effective address
 		of the operand. (accumulator indexed indirect)
 
 ,ireg+
-,ireg++		The contents of `ireg' (which must be indexable) is
+,ireg++		The contents of \fIireg\fP (which must be indexable) is
 		used as effective address of the operand. After that
 		it is incremented by 1 (+) or 2 (++).
 		(auto-increment)
 
-(,ireg++)	The contents of `ireg' (which must be indexable) is
+(,ireg++)	The contents of \fIireg\fP (which must be indexable) is
 		used as a pointer to the effective address of the
 		operand. After that it is incremented by 2.
 		(auto-increment indirect)
 
 ,-ireg
-,--ireg		`ireg' (which must be indexable) is decremented
+,--ireg		\fIireg\fP (which must be indexable) is decremented
 		by 1 (-) or 2 (--). After that, its contents is used
 		as effective address of the operand.
 		(auto-decrement)
 
-(,--ireg)	`ireg (which must be indexable) is decremented by 2.
+(,--ireg)	\fIireg\fP (which must be indexable) is decremented by 2.
 		After that, its contents is used as a pointer to the
 		effective address of the operand.
 		(auto-decrement indirect)
@@ -133,7 +133,7 @@ MC6809 preliminary programming manual, Motorola Inc., First Edition, 1979
 .SH EXAMPLE
 An example of 6809 assembly code.
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 	contby = 80
 
 	compgo:	lda	#contby

man/8080_as.1

@@ -15,7 +15,7 @@ and two two-byte registers: sp and psw, respectively the stack pointer
 and the processor status word.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning
 
 expr		one- or two-byte address or immediate

man/i86_as.1

@@ -14,7 +14,8 @@ An address on the Intel 8086 consists of two pieces:
 a segment number and an offset. A memory address is computed as
 the segment number shifted left 4 bits + the offset.
 Assembly language addresses only give the offset, with the exception of
-the address of an inter-segment jump or call (see `addressing modes' below).
+the address of an inter-segment jump or call (see \fIaddressing modes\fP
+below).
 For each segment type (.org, .text, .data, or .bss) the segment number
 must be given with the .sbase pseudo-instruction.
 The syntax is:
@@ -40,10 +41,10 @@ Two index registers: si (source index) and di (destination index).
 Four segment registers: cs (code), ds (data), ss (stack), and es (extra).
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning
 
-expr		the value of `expr' is immediate data or
+expr		the value of \fIexpr\fP is immediate data or
 		an address offset. There is no special
 		notation for immediate data.
 
@@ -54,22 +55,22 @@ register	one of the aforementioned general registers
 (expr)		the value of expr is the address of the operand.
 
 (reg)
-expr (reg)	the value of `expr' (if present) + the contents of
+expr (reg)	the value of \fIexpr\fP (if present) + the contents of
-		`reg' (which must be a pointer or an index register)
+		\fIreg\fP (which must be a pointer or an index register)
 		is the address of the operand.
 
 (preg) (ireg)
 expr (preg) (ireg)
-		the value of `expr' (if present) + the contents of
+		the value of \fIexpr\fP (if present) + the contents of
-		`preg' (which must be a pointer register) + the
+		\fIpreg\fP (which must be a pointer register) + the
-		contents of `ireg' (which must be an index register)
+		contents of \fIireg\fP (which must be an index register)
 		is the address of the operand.
 
 The next addressing mode is only allowed with the instructions
 "callf" or "jmpf".
 
-expr : expr	the value of the first `expr' is a segment number,
+expr : expr	the value of the first \fIexpr\fP is a segment number,
-		the value of the second `expr' is an address offset.
+		the value of the second \fIexpr\fP is an address offset.
 		The (absolute) address of the operand is computed
 		as described above.
 .fi
@@ -90,7 +91,7 @@ ack(1),
 MCS-86 assembly language reference manual, 1978, Intel Corporation
 .SH EXAMPLE
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 An example of Intel 8086 assembly language:
 
 	_panic:

man/libmon.7

@@ -6,25 +6,25 @@ libmon \- library of system call routines with EM calling sequence
 .SH DESCRIPTION
 The modules in this library contain the UNIX system calls with EM calling sequence.
 This library is written in EM assembly language and can be used
-for interpreted programs, and 'a.out' programs.
+for interpreted programs, and \fIa.out\fP programs.
 If these routines are used in Pascal programs, then the calling sequence
 requires some attention.
 Some hints may be useful:
 .IP -
 The c-option {$c+} allows you to declare zero-terminated string
 constants in Pascal like "/etc/passwd".
-Moreover, the identifier 'string' is then defined as type identifier for
+Moreover, the identifier \fIstring\fP is then defined as type identifier for
 a pointer to these zero-terminated strings.
 .IP -
 The d-option {$d+} allows you to use double precision integers (longs).
 The lseek system call, for instance, needs a long argument and returns a long result.
 .IP -
-If the system call requires a pointer as argument use a 'var' parameter.
+If the system call requires a pointer as argument use a \fIvar\fP parameter.
 For instance declare times as:
 .br
      procedure times(var t:timesbuf); extern;
 .br
-Note that a 'string' is already a pointer.
+Note that a \fIstring\fP is already a pointer.
 .IP -
 When defining types, use packed records if two bytes must be allocated
 in a single word, as in
@@ -49,44 +49,48 @@ can be declared as:
 .br
      creatmode = set of XHIM..SUID;
 .IP -
-There are special system call routines 'uread' and 'uwrite' in libpc(VII),
+There are special system call routines \fIuread\fP and \fIuwrite\fP
-because the names 'read' and 'write' are blocked by similar functions in Pascal.
+in libpc(VII),
+because the names \fIread\fP and \fIwrite\fP
+are blocked by similar functions in Pascal.
 .PP
-The system call 'signal' exists, but uses 'sigtrp'.
+The system call \fIsignal\fP exists, but uses \fIsigtrp\fP.
 This EM system call has the
 following calling sequence:
 .br
      function sigtrp(signo,trapno:integer):integer;
 .br
-The action values of 'signal', odd for 'ignore' and zero
+The action values of \fIsignal\fP, odd for \fIignore\fP and zero
-for 'get back to default',
+for \fIget back to default\fP,
 may interfere with the EM procedure identification in some
 implementations.
 In most interpreters procedures in EM are numbered consecutively from zero up.
-The first argument of 'sigtrp' is the signal number 'signo' as for 'signal'.
+The first argument of \fIsigtrp\fP is the signal number \fIsigno\fP
-The second argument is an integer 'trapno', indicating the action to be performed
+as for \fIsignal\fP.
+The second argument is an integer \fItrapno\fP,
+indicating the action to be performed
 when the signal is issued:
 .IP -2 8
-Reset the action for signal 'signo' to the default.
+Reset the action for signal \fIsigno\fP to the default.
 .IP -3
-Ignore signal 'signo'.
+Ignore signal \fIsigno\fP.
 .IP "0-252"
-Perform an EM instruction TRP with error code 'trapno',
+Perform an EM instruction TRP with error code \fItrapno\fP,
-whenever the signal 'signo' is issued.
+whenever the signal \fIsigno\fP is issued.
 Note that the error codes 0-127 are reserved for EM machine errors
 and language runtime system errors.
 .PP
-The routine 'sigtrp' returns the old 'trapno' or -1 if an erroneous
+The routine \fIsigtrp\fP returns the old \fItrapno\fP or -1 if an erroneous
 signal number is specified.
 Only the signal numbers 1, 2, 3, 13, 14, 15 and 16 may be used as argument
-for 'sigtrp'.
+for \fIsigtrp\fP.
 .SH FILES
 .IP /usr/em/mach/*/lib/tail_mon
 .PD
 .SH "SEE ALSO"
 em(I), ack(I), *(II), libpc(VII)
 .SH DIAGNOSTICS
-All routines put the UNIX error code in the global variable 'errno'.
+All routines put the UNIX error code in the global variable \fIerrno\fP.
 Errno is not cleared by successful system calls, so it always gives
 the error of the last failed call.
 One exception: ptrace clears errno when successful.

man/libpc.7

@@ -4,7 +4,7 @@
 .SH NAME
 libpc \- library of external routines for Pascal programs
 .SH SYNOPSIS
-.ta 11
+.ta 11n
 const   bufsize = ?;
 .br
 type    br1 =  1..bufsize;
@@ -90,7 +90,7 @@ Returns a pointer to the i-th environment string (i>=0). Returns nil
 if i is beyond the end of the environment list (UNIX version 7).
 .IP argshift
 Effectively deletes the first argument from the argument list.
-Its function is equivalent to 'shift' in the UNIX shell: argv[2] becomes
+Its function is equivalent to \fIshift\fP in the UNIX shell: argv[2] becomes
 argv[1], argv[3] becomes argv[2], etc.
 It is a useful procedure to skip optional flag arguments.
 Note that the matching of arguments and files
@@ -163,26 +163,27 @@ Trap generates the trap passed as argument (0..252).
 The trap numbers 128..252 may be used freely. The others are reserved.
 .PD 0
 .IP encaps
-Encapsulate the execution of 'p' with the trap handler 'q'.
+Encapsulate the execution of \fIp\fP with the trap handler \fIq\fP.
-Encaps replaces the previous trap handler by 'q', calls 'p' and restores
+Encaps replaces the previous trap handler by \fIq\fP, calls \fIp\fP
-the previous handler when 'p' returns.
+and restores
-If, during the execution of 'p', a trap occurs,
+the previous handler when \fIp\fP returns.
-then 'q' is called with the trap number as parameter.
+If, during the execution of \fIp\fP, a trap occurs,
-For the duration of 'q' the previous trap handler is restored, so that
+then \fIq\fP is called with the trap number as parameter.
-you may handle only some of the errors in 'q'. All the other errors must
+For the duration of \fIq\fP the previous trap handler is restored, so that
-then be raised again by a call to 'trap'.
+you may handle only some of the errors in \fIq\fP. All the other errors must
+then be raised again by a call to \fItrap\fP.
 .br
 Encapsulations may be nested: you may encapsulate a procedure while executing
 an encapsulated routine.
 .br
 Jumping out of an encapsulated procedure (non-local goto) is dangerous,
 because the previous trap handler must be restored.
-Therefore, you may only jump out of procedure 'p' from inside 'q' and
+Therefore, you may only jump out of procedure \fIp\fP from inside \fIq\fP and
 you may only jump out of one level of encapsulation.
 If you want to exit several levels of encapsulation, use traps.
 See pc_emlib(VII) and pc_prlib(VII) for lists of trap numbers
 for EM machine errors and Pascal run time system errors.
-Note that 'p' may not have parameters.
+Note that \fIp\fP may not have parameters.
 .PD
 .PP
 .RE

man/m68k2_as.1

@@ -19,40 +19,40 @@ a status register (sr), and a condition codes register (ccr) which is actually
 just the low order byte of the status register.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name)
 
-reg		contents of `reg' is operand, where `reg' is
+reg		contents of \fIreg\fP is operand, where \fIreg\fP is
 		one of the registers mentioned above (register direct)
 
-(areg)		contents of `areg' is address of operand, where
+(areg)		contents of \fIareg\fP is address of operand, where
-		`areg' is an address-register
+		\fIareg\fP is an address-register
 		(address register indirect)
 
 (areg)+		same as (areg), but after the address is used,
-		`areg' is incremented by the operand length
+		\fIareg\fP is incremented by the operand length
 		(postincrement)
 
 -(areg)		same as (areg), but before the address is used,
-		`areg' is decremented by the operand length
+		\fIareg\fP is decremented by the operand length
 		(predecrement)
 
 expr(areg)
-expr(pc)	`expr' + the contents of the register yields the
+expr(pc)	\fIexpr\fP + the contents of the register yields the
 		address of the operand (displacement)
 
 expr(areg, ireg)
-expr(pc, ireg)	`expr' + the contents of the register + the contents
+expr(pc, ireg)	\fIexpr\fP + the contents of the register + the contents
-		of `ireg' yields the address of the operand. `ireg' is
+		of \fIireg\fP yields the address of the operand. \fIireg\fP is
 		an address- or a data-register.
-		`ireg' may be followed by .w or .l indicating whether
+		\fIireg\fP may be followed by .w or .l indicating whether
 		the size of the index is a word or a long
 		(displacement with index)
 
-expr		`expr' is the address of the operand
+expr		\fIexpr\fP is the address of the operand
 		(absolute address)
 
-#expr		`expr' is the operand (immediate)
+#expr		\fIexpr\fP is the operand (immediate)
 .fi
 
 Some instructions have as operand a register list. This list consists of 
@@ -72,7 +72,7 @@ MC68000 16-bit microprocessor User's manual, Motorola Inc, 1979
 .SH EXAMPLE
 .sp 2
 .nf
-.ta 8 16 24 32 40 48 56 64
+.ta 8n 16n 24n 32n 40n 48n 56n 64n
 	.define	.cii
 	
 		.text

man/m68k_int.1

@@ -91,6 +91,6 @@ in the source.
 In that case adapt source file mloopc to your machine.
 Also the instruction that causes the machine to allocate stack
 space might differ .
-In that case adapt the macro 'claimstack' in deffile.
+In that case adapt the macro \fIclaimstack\fP in deffile.
 .SH AUTHOR
 Freek van Schagen

man/macro.v7

@@ -1,6 +1,8 @@
 .\" $Header$
 .de TH
 .PD
+.br
+.bp
 .lc
 .nr in 5
 .de hd
@@ -29,7 +31,7 @@
 .sp \\n(pdu
 .ne 2
 .fi
-\s+3\fB\\$1\fP\s0
+\fB\\$1\fP
 .br
 ..
 .de LP

man/ns_as.1

@@ -62,7 +62,7 @@ The convention used to indicate offset length by appending :B, :W or :D
 to offsets is not implemented.
 The assembler tries to find out the minimal size needed for any constant
 in an operand of the instruction placed in the text segment.
-Offsets in instructions outside '.text' are always four bytes.
+Offsets in instructions outside \fI.text\fP are always four bytes.
 .PP
 All special operands, e.g. register list, configuration list, have
 the same format as in the Programmers Reference Manual.
@@ -90,7 +90,7 @@ Two different possibilities are given for the encoding of
 the instructions movsu and movus.
 .SH EXAMPLE
 .nf
-.ta 12 20 28 36
+.ta 12n 20n 28n 36n
 
 00000000 0E0B02		setcfg	[ m ]
 		label:

man/pc_prlib.7

@@ -4,7 +4,7 @@
 .SH NAME
 pc_prlib \- library of Pascal runtime routines
 .SH SYNOPSIS
-.ta 11
+.ta 11n
 type    alpha=packed array[1..8] of char;
 .br
         pstring= ^packed array[] of char;
@@ -310,16 +310,18 @@ Array operations:
 The only useful form of packing implemented, is packing bytes into words.
 All other forms of packing and unpacking result in a plain copy.
 .IP _pac
-Pack an unpacked array 'a' into a packed array 'z'. 'ap' and 'zp'
+Pack an unpacked array \fIa\fP into a packed array \fIz\fP.
-are pointers to 'a' and 'z'. 'ad' and 'zd'
+\fIap\fP and \fIzp\fP
-are pointers to the descriptors of 'a' and 'z'. 'i' is
+are pointers to \fIa\fP and \fIz\fP. \fIad\fP and \fIzd\fP
-the index in 'a' of the first element to be packed.
+are pointers to the descriptors of \fIa\fP and \fIz\fP. \fIi\fP is
-Pack until 'z' is full.
+the index in \fIa\fP of the first element to be packed.
+Pack until \fIz\fP is full.
 .PD 0
 .IP _unp
-Unpack 'z' into 'a'. 'ap', 'zp', 'ad' and 'zd' are as for _pac. 'i' is
+Unpack \fIz\fP into \fIa\fP.
-the index in 'a' where the first element of 'z' is copied into.
+\fIap\fP, \fIzp\fP, \fIad\fP and \fIzd\fP are as for _pac. \fIi\fP is
-Unpack all elements of 'z'.
+the index in \fIa\fP where the first element of \fIz\fP is copied into.
+Unpack all elements of \fIz\fP.
 .IP _asz
 Compute array size. Used for copying conformant arrays.
 .PD
@@ -331,12 +333,13 @@ The compiler allows you to verify assertions.
 It generates a call to the routine _ass to check the assertion at runtime.
 Another feature of the compiler is that it enables you to trace the
 procedure calling sequence. If the correct option is turned on, then
-a call to the procedure 'procentry' is generated at the start of each
+a call to the procedure \fIprocentry\fP is generated at the start of each
-compiled procedure or function. Likewise, the routine 'procexit' is called
+compiled procedure or function. Likewise, the routine \fIprocexit\fP is called
 just before a procedure or function exits.
-Default procedure 'procentry' and 'procexit' are available in this library.
+Default procedure \fIprocentry\fP
+and \fIprocexit\fP are available in this library.
 .IP _ass 10
-If 'b' is zero, then change eb[0] to 'line'
+If \fIb\fP is zero, then change eb[0] to \fIline\fP
 (to give an error message with source line number) and call the error routine.
 .PD 0
 .IP procentry
@@ -489,7 +492,7 @@ Close a file. Closing of files is done for local files when the procedure
 in which they are declared exits.
 The compiler only closes local files if they are not part of a structured type.
 Files allocated in the heap are not closed when they are deallocated.
-There is an external routine 'pclose' in libP(VII), that may be called
+There is an external routine \fIpclose\fP in libP(VII), that may be called
 explicitly to do the closing in these cases.
 Closing may be necessary to flush buffers or to keep the number of
 simultaneously opened files below NFILES.
@@ -548,40 +551,40 @@ fetch the next character first.
 Write a character, not preceeded by spaces.
 .IP _wsc
 Write a character, left padded with spaces up to a field width
-of 'w'.
+of \fIw\fP.
 .IP _wri
 Write an integer, left padded with spaces up to a field width
 of 6.
 .IP _wsi
 Write an integer, left padded with spaces up to a field width
-of 'w'.
+of \fIw\fP.
 .IP _wrl
 Write a long, left padded with spaces up to a field width
 of 11.
 .IP _wsl
 Write a long, left padded with spaces up to a field width
-of 'w'.
+of \fIw\fP.
 .IP _wrr
 Write a real in scientific format,
 left padded with spaces up to a field width of 13.
 .IP _wsr
 Write a real in scientific format,
-left padded with spaces up to a field width of 'w'.
+left padded with spaces up to a field width of \fIw\fP.
 .IP _wrf
-Write a real in fixed point format, with exactly 'ndigit' digits
+Write a real in fixed point format, with exactly \fIndigit\fP digits
 behind the decimal point, the last one rounded; it is left padded up to
-a field width of 'w'.
+a field width of \fIw\fP.
 .IP _wrs
-Write a string of length 'l', without additional spaces.
+Write a string of length \fIl\fP, without additional spaces.
 .IP _wss
-Write a string of length 'l', left padded up to a field
+Write a string of length \fIl\fP, left padded up to a field
-width of 'w'.
+width of \fIw\fP.
 .IP _wrb
 Write a boolean, represented by "true" or "false", left padded
 up to a field width of 5.
 .IP _wsb
 Write a boolean, represented by "true" or "false", left padded
-up to a field width of 'w'.
+up to a field width of \fIw\fP.
 .IP _wrz
 Write a C-type string up to the zero-byte.
 .IP _wsz
@@ -670,7 +673,7 @@ ISO/TC97/SC5-N462, received November 1979.
 .IP [4]
 Ed Keizer, "The Amsterdam Compiler Kit reference manual".
 .br
-(try 'nroff /usr/emi/doc/pcref.doc').
+(try \fInroff /usr/emi/doc/pcref.doc\fP).
 .IP [5]
 ack(I), pc_pem(VI)
 .PD
@@ -723,7 +726,7 @@ array bound error in pack
 .IP 70
 array bound error in unpack
 .IP 71
-only positive j in 'i mod j'
+only positive j in \fIi mod j\fP
 .IP 72
 file not yet open
 .IP 73

man/pdp_as.1

@@ -11,13 +11,13 @@ described in \fIuni_ass\fP(6).
 .SH SYNTAX
 .IP registers
 The pdp11 has seven general registers, numbered r0 through r7. 
-Of these, r6 is the stack pointer and can also be referenced to by `sp',
+Of these, r6 is the stack pointer and can also be referenced to by \fIsp\fP,
-r7 is the program counter and has `pc' as synonym. There are also six
+r7 is the program counter and has \fIpc\fP as synonym. There are also six
 floating-point registers fr0 through fr5, but the names r0 through r5 can
 also be used. From the context will be derived what kind of register is meant.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name)
 
 reg		contents of register reg is operand.
@@ -75,7 +75,7 @@ in the handbook mentioned below. Synonyms ending in "d" for instructions ending
 in "f" are not recognized. Some instructions have different names; the mapping
 is as below.
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 
 handbook		pdp_as
 
@@ -105,7 +105,7 @@ This instruction is synonymous with trap.
 .SH EXAMPLE
 An example of pdp11 assembly code.
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 
 !this is the routine that reads numbers into r0
 !the number is terminated by any non digit

man/uni_ass.6

@@ -136,9 +136,9 @@ if the number ends with an 'h' it is hexadecimal else
         if the number starts with '0' it is octal else
             it's decimal.
 .fi
-Note that the number '0x10h' is an illegal hexadecimal number,
+Note that the number \fI0x10h\fP is an illegal hexadecimal number,
-because 'x' is an illegal hexadecimal digit.
+because \fIx\fP is an illegal hexadecimal digit.
-The number should be written as '0x10' or '10h'.
+The number should be written as \fI0x10\fP or \fI10h\fP.
 The range of numbers depends on the machine.
 A rule of the thumb is that the width of the machine's registers
 the same is as the number of bits allowed in numbers.
@@ -260,7 +260,7 @@ ack(I), arch(I), a.out(V)
 An example of INtel 8086 assembly code.
 .sp 2
 .nf
-.ta 8 16 32 40 48 56 64
+.ta 8n 16n 32n 40n 48n 56n 64n
 	.define begbss
 	.define hol0,.diverr,.reghp
 	.define EIDIVZ

man/z8000_as.1

@@ -10,8 +10,8 @@ described in \fIuni_ass\fP(6).
 .SH SYNTAX
 .IP instructions
 Instruction mnemonics are implemented exactly as described in
-`Z8000 PLZ/ASM Assembly Language Programming Manual' and
+\fIZ8000 PLZ/ASM Assembly Language Programming Manual\fP and
-`AmZ8001/2 Processor Instruction Set'.
+\fIAmZ8001/2 Processor Instruction Set\fP.
 .IP registers
 The z8000 has sixteen 16-bit general purpose registers specified
 as R0 through R15.  All sixteen registers can be used as accumulators.
@@ -24,9 +24,9 @@ indirect, index or base-address register.
 It is also possible to address registers as groups of 8, 32 or 64 bits.
 These registers are specified as follows.
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 - RH0, RL0, RH1, RL1, ..., RH7, RL7  for  8-bit  regis-
-  ters. (`H' stands for high-order byte, and `L' stands
+  ters. (\fIH\fP stands for high-order byte, and \fIL\fP stands
   for low-order byte within a  word  register).   These
   registers overlap 16-bit registers R0 through R7.
 - RR0, RR2, ..., RR14 for 32-bit register pairs.
@@ -35,7 +35,7 @@ These registers are specified as follows.
 Besides register pair RR14 is used as stackpointer.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning (name-mnemonic)
 
 $expr		the value of expr is the operand.
@@ -108,7 +108,7 @@ a corresponding `normal' jump/call (JP/CALL).
 .SH EXAMPLE
 An example of z8000 assembly code.
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 
 !   This z8000 assembly routine converts a positive number
 !(in R1) to a string representing the number and puts this
@@ -145,16 +145,16 @@ AmZ8001/2 Processor Instruction Set, 1979.
 .SH BUGS
 You cannot use (reg16) instead of 0(reg16).
 .br
-Condition codes `Z' (meaning zero), `C' (meaning carry) and <nothing>
+Condition codes \fIZ\fP (meaning zero), \fIC\fP (meaning carry) and <nothing>
 (meaning always false) are not implemented.
 The first two because they also represent flags and the third one
 because it's useless.
-So for `Z'/`C' use `EQ'/`ULT'.
+So for \fIZ\fP/\fIC\fP use \fIEQ\fP/\fIULT\fP.
 .br
 The z8000 assembly instruction set as described in the book
-`AmZ8001/2 Processor Instruction Set' differs from the one
+\fIAmZ8001/2 Processor Instruction Set\fP differs from the one
-described in the manual `Z8000 PLZ/ASM Assembly Language Programming
+described in the manual \fIZ8000 PLZ/ASM Assembly Language Programming
-Manual' in that the book includes CLRL, LDL (format F5.1) and
+Manual\fP in that the book includes CLRL, LDL (format F5.1) and
 PUSHL (format F5.1) which all in fact do not (!) work.
 .br
 On the other side the book excludes SIN, SIND, SINDR, SINI, SINIR,

man/z80_as.1

@@ -23,11 +23,11 @@ contents of the accumulator and flag register can be exchanged with the contents
 of their alternates by the "ex af, af2"-instruction.
 .IP "addressing modes"
 .nf
-.ta 8 16 24 32 40 48
+.ta 8n 16n 24n 32n 40n 48n
 syntax		meaning
 
 expr		dependent on the instruction, the
-		value of `expr' can be immediate
+		value of \fIexpr\fP can be immediate
 		data or the address of the operand.
 		There is no special notation for
 		immediate data.
@@ -35,16 +35,16 @@ expr		dependent on the instruction, the
 (ireg + expr)
 (ireg - expr)	the contents of ireg (which must be
 		one of the index-registers) + or -
-		the - one byte - value of `expr'
+		the - one byte - value of \fIexpr\fP
 		yield the address of the operand.
 
-(expr)		the value of `expr' is the address of
+(expr)		the value of \fIexpr\fP is the address of
 		the operand.
 
-reg		the contents of `reg' - one of the above-
+reg		the contents of \fIreg\fP - one of the above-
 		mentioned registers - is the operand.
 
-(reg)		the contents of `reg' - one of the 16-bit
+(reg)		the contents of \fIreg\fP - one of the 16-bit
 		registers except pc - is the address of
 		the operand.
 

util/ack/ack.1.X

@@ -2,9 +2,9 @@
 .de SB
 .\" SuBheader
 .sp 1
+.PP
 .nr Sf \\n(.f
 .ft B
-.PP
 \\$1 \\$2 \\$3 \\$4 \\$5 \\$6 \\$7 \\$8 \\$9
 .ft \\n(Sf
 .sp 1
@@ -22,6 +22,8 @@ ack \- Amsterdam Compiler Kit
 .br
 \fBabc\fP arguments
 .br
+\fBint\fP arguments
+.br
 \fImachine\fP arguments
 .SH DESCRIPTION
 This program transforms sources in several
@@ -38,7 +40,8 @@ are also automatically included.
 Two types of load files can be distinguished,
 \fIa.out\fP files containing machine code and \fIe.out\fP
 files containing virtual EM machine code.
-The last type is designed for interpretation.
+The last type is designed for interpretation; it is obtained by calling
+the compiler as \fIint\fP.
 Compilation time for interpretation is fast and gives many
 runtime checks,
 but execution is about seven times slower.

util/cpp/cpp.6

@@ -1,5 +1,4 @@
-.TH 
+.TH CPP VI
-.I cpp
 .SH NAME
 cpp \- C Pre-Processor
 .SH SYNOPSIS
@@ -154,7 +153,7 @@ message handling.
 The following extensions to C are processed by cpp:
 .nf
 .sp 1
-.ta 4 27
+.ta 4n 27n
 	#elif expression	(#else #if)
 	'\exNNN'	(Hexadecimal constants)
 	'\ea'	(Ascii BELL)