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many fixes; now passes the tests

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This commit is contained in:
ceriel 1989-10-10 10:44:26 +00:00
parent 8f74dd7ae6
commit d25472bbfb
2 changed files with 124 additions and 193 deletions
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161
mach/i386/ncg/mach.c
View file

@ -39,149 +39,9 @@ con_mult(sz) word sz; {
fprintf(codefile,"\t.data4 %ld\n", l); fprintf(codefile,"\t.data4 %ld\n", l);
} }
#ifdef NOFLOAT #define CODE_GENERATOR
con_float() {
static int been_here;
if (argval != 4 && argval != 8)
fatal("bad fcon size");
fputs(".data4\t", codefile);
if (argval == 8)
fputs("0,", codefile);
fputs("0 !dummy float\n", codefile);
if ( !been_here++)
{
fputs("Warning : dummy float-constant(s)\n", stderr);
}
}
#else
#define IEEEFLOAT #define IEEEFLOAT
#include <con_float>
con_float() {
double f;
double atof();
int i;
int j;
double frexp();
#ifndef OWNFLOAT
int sign = 0;
int fraction[4] ;
#else OWNFLOAT
float fl;
char *p;
#endif OWNFLOAT
if (argval!= 4 && argval!= 8) {
fprintf(stderr,"float constant size = %d\n",argval);
fatal("bad fcon size");
}
fprintf(codefile,"!float %s sz %d\n", str, argval);
f = atof(str);
if (f == 0) {
if (argval == 8) fprintf(codefile, ".data4 0\n");
fprintf(codefile, ".data4 0\n");
return;
}
#ifdef OWNFLOAT
if (argval == 4) {
/* careful: avoid overflow */
double ldexp();
f = frexp(f, &i);
fl = f;
fl = frexp(fl,&j);
if (i+j > 127) {
/* overflow situation */
fprintf(codefile, ".data1 0%o, 0377, 0377, 0377 ! overflow\n",
f < 0 ? 0377 : 0177);
return;
}
if (i+j < -127) {
/* underflow situation */
fprintf(codefile, ".data1 0%o, 0200, 0, 0 ! underflow\n",
f < 0 ? 0200 : 0);
return;
}
fl = ldexp(fl, i+j);
p = (char *) &fl;
}
else {
p = (char *) &f;
}
fprintf(codefile, ".data1 0%o", *p++ & 0377);
for (i = argval-1; i; i--) {
fprintf(codefile,",0%o", *p++ & 0377);
}
#else OWNFLOAT
f = frexp(f, &i);
if (f < 0) {
f = -f;
sign = 1;
}
while (f < 0.5) {
f += f;
i --;
}
f = 2*f - 1.0; /* hidden bit */
#ifdef IEEEFLOAT
if (argval == 4) {
#endif IEEEFLOAT
i = (i + 128) & 0377;
fraction[0] = (sign << 15) | (i << 7);
for (j = 6; j>= 0; j--) {
f *= 2;
if (f >= 1.0) {
f -= 1.0;
fraction[0] |= (1 << j);
}
}
#ifdef IEEEFLOAT
}
else {
i = (i + 1024) & 03777;
fraction[0] = (sign << 15) | (i << 4);
for (j = 3; j>= 0; j--) {
f *= 2;
if (f >= 1.0) {
fraction[0] |= (1 << j);
f -= 1.0;
}
}
}
#endif IEEEFLOAT
for (i = 1; i < argval / 2; i++) {
fraction[i] = 0;
for (j = 15; j>= 0; j--) {
f *= 2;
if (f >= 1.0) {
fraction[i] |= (1 << j);
f -= 1.0;
}
}
}
if (f >= 0.5) {
for (i = argval/2 - 1; i >= 0; i--) {
for (j = 0; j < 16; j++) {
if (fraction[i] & (1 << j)) {
fraction[i] &= ~(1 << j);
}
else {
fraction[i] |= (1 << j);
break;
}
}
if (j != 16) break;
}
}
for (i = 0; i < argval/2; i++) {
fprintf(codefile,
i != 0 ? ", 0%o, 0%o" : ".data1 0%o, 0%o",
(fraction[i]>>8)&0377,
fraction[i]&0377);
}
#endif OWNFLOAT
putc('\n', codefile);
}
#endif
/* /*
@ -194,12 +54,19 @@ string holstr(n) word n; {
prolog(nlocals) full nlocals; { prolog(nlocals) full nlocals; {
if (nlocals < 32767) { fputs("push ebp\nmov ebp,esp\n", codefile);
fprintf(codefile, "\tenter %ld,0\n", nlocals); switch(nlocals) {
} case 8:
else { fputs("push eax\n", codefile);
fputs("\tenter 0,0\n", codefile); /* fall through */
case 4:
fputs("push eax\n", codefile);
/* fall through */
case 0:
break;
default:
fprintf(codefile, "\tsub\tesp,%ld\n",nlocals); fprintf(codefile, "\tsub\tesp,%ld\n",nlocals);
break;
} }
} }

154
mach/i386/ncg/table
View file

@ -205,9 +205,7 @@ and LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
#endif #endif
and rm:rw:cc, regorconst:ro. and rm:rw:cc, regorconst:ro.
and anyreg:rw:cc, rmorconst:ro. and anyreg:rw:cc, rmorconst:ro.
cbw "o16 cbw" kills ah cost(2,3).
cdq kills edx cost(1,3). cdq kills edx cost(1,3).
cwde cost(1,3).
cmp rm:ro, regorconst:ro kills :cc. cmp rm:ro, regorconst:ro kills :cc.
cmp anyreg:ro, rmorconst:ro kills :cc. cmp anyreg:ro, rmorconst:ro kills :cc.
cmpb rm1:rw, const:ro kills :cc. cmpb rm1:rw, const:ro kills :cc.
@ -236,10 +234,11 @@ jmp label cost(1,4).
proccall "call" label+rm cost(1,8). proccall "call" label+rm cost(1,8).
jxx "syntax error" label cost(1,4). jxx "syntax error" label cost(1,4).
lea anyreg:rw, halfindir:ro. lea anyreg:rw, halfindir:ro.
lea LOCAL:rw, halfindir:ro. /* only for register variables, UNSAFE!!! */
leave cost(1,4). leave cost(1,4).
loop label kills ecx. loop label kills ecx.
#ifdef REGVARS #ifdef REGVARS
mov LOCAL:wo, memory:ro. /* only for register variables, UNSAFE!!! */ mov LOCAL:wo, rmorconst:ro. /* only for register variables, UNSAFE!!! */
#endif #endif
mov a_word:wo, regorconst:ro. mov a_word:wo, regorconst:ro.
mov anyreg:wo, rmorconst:ro. mov anyreg:wo, rmorconst:ro.
@ -247,9 +246,13 @@ movb rm1:wo, regorconst124:ro.
movb REG1:wo, rm1:ro. movb REG1:wo, rm1:ro.
movw "o16 mov" rm2:wo, regorconst124:ro cost(3,2). movw "o16 mov" rm2:wo, regorconst124:ro cost(3,2).
movw "o16 mov" REG2:wo, rmorconst2:ro cost(3,2). movw "o16 mov" REG2:wo, rmorconst2:ro cost(3,2).
movsxb anyreg:wo, REG+rmorconst1:ro.
movsx anyreg:wo, REG+rmorconst2:ro.
movzxb anyreg:wo, REG+rmorconst1:ro.
movzx anyreg:wo, REG+rmorconst2:ro.
mul rmorconst:ro kills :cc eax edx cost(2,41). mul rmorconst:ro kills :cc eax edx cost(2,41).
neg rmorconst:rw:cc. neg rmorconst:rw:cc.
not rmorconst:rw:cc. not rmorconst:rw.
ORB "orb" REG1:ro, REG1:ro:cc. /* use ORB for tests */ ORB "orb" REG1:ro, REG1:ro:cc. /* use ORB for tests */
ORW "o16 or" REG2:ro, REG2:ro:cc. /* use ORW for tests */ ORW "o16 or" REG2:ro, REG2:ro:cc. /* use ORW for tests */
OR "or" anyreg:ro, anyreg:ro:cc. /* Use OR for tests */ OR "or" anyreg:ro, anyreg:ro:cc. /* Use OR for tests */
@ -304,7 +307,7 @@ MOVES
/*****************************************************************/ /*****************************************************************/
#ifdef REGVARS #ifdef REGVARS
from memory to LOCAL /* unsafe !!! */ from rmorconst to LOCAL /* unsafe !!! */
gen mov %2,%1 gen mov %2,%1
#endif #endif
@ -317,6 +320,9 @@ gen mov %2,%1
from halfindir to register+AREG from halfindir to register+AREG
gen lea %2,%1 gen lea %2,%1
from halfindir to LOCAL /* unsafe !!! */
gen lea %2,%1
from rm1 to REG1 from rm1 to REG1
gen movb %2,%1 gen movb %2,%1
@ -384,21 +390,23 @@ from const to STACK
gen push %1 gen push %1
from rm1 to STACK from rm1 to STACK
uses GENREG uses REG
gen move {ANYCON,0},%a gen movzxb %a,%1
move %1,%a.1
push %a push %a
from rm1 to STACK from rm1 to STACK
gen push eax gen push eax
xor eax,eax movzxb eax,%1
movb al,%1
xchg {indir_r,esp},eax xchg {indir_r,esp},eax
from rm2 to STACK
uses REG
gen movzx %a,%1
push %a
from rm2 to STACK from rm2 to STACK
gen push eax gen push eax
xor eax,eax movzx eax,%1
movw ax,%1
xchg {indir_r,esp},eax xchg {indir_r,esp},eax
from Xreg_off to STACK from Xreg_off to STACK
@ -406,8 +414,7 @@ from Xreg_off to STACK
push %1.reg push %1.reg
from ADDR_LOCAL %ind==0 to STACK from ADDR_LOCAL %ind==0 to STACK
gen gen push ebp
push ebp
from halfindir to STACK from halfindir to STACK
uses REG uses REG
@ -462,9 +469,21 @@ from rm1
uses reusing %1,REG1=%1 yields %a uses reusing %1,REG1=%1 yields %a
from rm1 from rm1
uses GENREG={ANYCON,0} uses GENREG
gen gen
move %1,%a.1 yields %a movzxb %a,%1 yields %a
/****************
* From source2 *
****************/
from rm2
uses reusing %1,REG2=%1 yields %a
from rm2
uses GENREG
gen
movzx %a,%1 yields %a
/************************ /************************
* From STACK coercions * * From STACK coercions *
@ -495,7 +514,7 @@ pat stl lol $1==$2
#endif #endif
leaving dup 4 stl $1 leaving dup 4 stl $1
pat sdl ldl $1==$2 leaving dup 4 sdl $1 pat sdl ldl $1==$2 leaving dup 8 sdl $1
pat lol lol $1==$2 pat lol lol $1==$2
#ifdef REGVARS #ifdef REGVARS
@ -564,7 +583,7 @@ pat lxl $1>2
uses ADDREG={indir_r_off,ebp,SSL}, uses ADDREG={indir_r_off,ebp,SSL},
CXREG={ANYCON,$1-1} CXREG={ANYCON,$1-1}
gen 1: gen 1:
mov %a,{indir_r_off,%a,4} mov %a,{indir_r_off,%a,SSL}
loop {label,1b} yields %a loop {label,1b} yields %a
pat lxa $1==0 yields {ADDR_LOCAL,SL} pat lxa $1==0 yields {ADDR_LOCAL,SL}
@ -580,7 +599,7 @@ pat lxa $1>2
uses ADDREG={indir_r_off,ebp,SSL}, uses ADDREG={indir_r_off,ebp,SSL},
CXREG={ANYCON,$1-1} CXREG={ANYCON,$1-1}
gen 1: gen 1:
mov %a,{indir_r_off,%a,4} mov %a,{indir_r_off,%a,SSL}
loop {label,1b} yields {Xreg_off,%a,SSL} loop {label,1b} yields {Xreg_off,%a,SSL}
pat dch leaving loi 4 pat dch leaving loi 4
@ -685,6 +704,9 @@ pat stl inreg($1)==reg_any
with rmorconst with rmorconst
kills regvar($1) kills regvar($1)
gen move %1, {LOCAL,$1,4} gen move %1, {LOCAL,$1,4}
with exact halfindir
kills regvar($1)
gen move %1, {LOCAL,$1,4}
with exact STACK with exact STACK
kills regvar($1) kills regvar($1)
gen pop {LOCAL, $1, 4} gen pop {LOCAL, $1, 4}
@ -753,7 +775,7 @@ pat stf
with ADDR_LOCAL regorconst with ADDR_LOCAL regorconst
kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4 kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
gen move %2,{LOCAL,%1.ind+$1,4} gen move %2,{LOCAL,%1.ind+$1,4}
with exact ADDR_LOCAL with exact ADDR_LOCAL STACK
kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4 kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
gen pop {LOCAL,%1.ind+$1,4} gen pop {LOCAL,%1.ind+$1,4}
with ADDR_EXTERN regorconst with ADDR_EXTERN regorconst
@ -791,7 +813,7 @@ pat sti $1==4
with ADDR_LOCAL regorconst with ADDR_LOCAL regorconst
kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4 kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4
gen move %2,{LOCAL,%1.ind,4} gen move %2,{LOCAL,%1.ind,4}
with exact ADDR_LOCAL with exact ADDR_LOCAL STACK
kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4 kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4
gen pop {LOCAL,%1.ind,4} gen pop {LOCAL,%1.ind,4}
with ADDR_EXTERN regorconst with ADDR_EXTERN regorconst
@ -1135,15 +1157,10 @@ pat dvf $1==4 leaving cal ".dvf4" asp 4
pat dvf $1==8 leaving cal ".dvf8" asp 8 pat dvf $1==8 leaving cal ".dvf8" asp 8
pat ngf $1==4 leaving cal ".ngf4" pat ngf $1==4 leaving cal ".ngf4"
pat ngf $1==8 leaving cal ".ngf8" pat ngf $1==8 leaving cal ".ngf8"
pat fif $1==4 leaving cal ".fif4" pat fif $1==4 leaving lor 1 cal ".fif4" asp 4
pat fif $1==8 leaving cal ".fif8" pat fif $1==8 leaving lor 1 cal ".fif8" asp 4
pat fef $1==4 leaving dup 4 cal ".fef4" pat fef $1==4 leaving lor 1 adp 0-4 cal ".fef4"
pat fef $1==8 pat fef $1==8 leaving lor 1 adp 0-4 cal ".fef8"
with REG REG
kills ALL
gen push %1
push %2
push %1 leaving cal ".fef8"
/****************************************************************** /******************************************************************
* Group 6: Pointer Arithmetic * * Group 6: Pointer Arithmetic *
@ -1387,6 +1404,12 @@ with regorconst
kills all_mems kills all_mems
gen axx* {indir_r, regvar($1)}, %1 gen axx* {indir_r, regvar($1)}, %1
proc xxxrstl example adi stl
with rmorconst rmorconst-RREG
kills regvar($2)
gen move %1, {LOCAL, $2, 4}
axx* {LOCAL, $2, 4}, %2
pat lol adi stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add") pat lol adi stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
pat lol adu stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add") pat lol adu stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
pat lol ads stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add") pat lol ads stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
@ -1400,6 +1423,13 @@ pat lil ads sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("add")
pat lil and sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("and") pat lil and sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("and")
pat lil ior sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("or") pat lil ior sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("or")
pat lil xor sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("xor") pat lil xor sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("xor")
pat adi stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
pat adu stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
pat ads stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
pat and stl $1==4 && inreg($2)==reg_any call xxxrstl("and")
pat ior stl $1==4 && inreg($2)==reg_any call xxxrstl("or")
pat xor stl $1==4 && inreg($2)==reg_any call xxxrstl("xor")
#endif #endif
proc lolxxxstl example lol adi stl proc lolxxxstl example lol adi stl
@ -1502,6 +1532,12 @@ pat lol lof ngi lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
call lofruxxsof("neg") call lofruxxsof("neg")
pat lol lof com lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any pat lol lof com lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
call lofruxxsof("not") call lofruxxsof("not")
pat lol lof dup adp lol stf $1==$5 && $2==$6 && $3==4 && inreg($1)==reg_any
kills all_mems
uses ADDREG={indir_r_off, regvar($1), $2}
gen add {indir_r_off, regvar($1), $2}, {ANYCON, $4} yields %a
#endif #endif
proc lofuxxsof example lol lof inc lol stf proc lofuxxsof example lol lof inc lol stf
@ -1531,6 +1567,13 @@ pat lol lof and lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("and")
pat lol lof ior lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("or") pat lol lof ior lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("or")
pat lol lof xor lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("xor") pat lol lof xor lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("xor")
pat lol lof dup adp lol stf $1==$5 && $2==$6 && $3==4
kills all_mems
uses ADDREG={LOCAL,$1,4},ADDREG
gen mov %b, {indir_r_off, %a, $2}
add {indir_r_off, %a, $2}, {ANYCON, $4}
killreg %a yields %b
proc lefuxxsef example loe lof inc loe stf proc lefuxxsef example loe lof inc loe stf
kills all_mems kills all_mems
uses ADDREG={EXTERN,$1} uses ADDREG={EXTERN,$1}
@ -1558,6 +1601,13 @@ pat loe lof and loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("and")
pat loe lof ior loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("or") pat loe lof ior loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("or")
pat loe lof xor loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("xor") pat loe lof xor loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("xor")
pat loe lof dup adp loe stf $1==$5 && $2==$6 && $3==4
kills all_mems
uses ADDREG={EXTERN,$1},ADDREG
gen mov %b, {indir_r_off, %a, $2}
add {indir_r_off, %a, $2}, {ANYCON, $4}
killreg %a yields %b
proc leiuxxsei example loe loi inc loe sti proc leiuxxsei example loe loi inc loe sti
kills all_mems kills all_mems
uses ADDREG={EXTERN,$1} uses ADDREG={EXTERN,$1}
@ -1700,8 +1750,8 @@ proc lolcxxstl example lol loc sbi stl
pat lol loc sbi stl $1==$4 && $3==4 call lolcxxstl("sub") pat lol loc sbi stl $1==$4 && $3==4 call lolcxxstl("sub")
pat lol loc sbu stl $1==$4 && $3==4 call lolcxxstl("sub") pat lol loc sbu stl $1==$4 && $3==4 call lolcxxstl("sub")
pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("sub") pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("add")
pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("sub") pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("add")
pat lol loc sli stl $1==$4 && $3==4 call lolcxxstl("sal") pat lol loc sli stl $1==$4 && $3==4 call lolcxxstl("sal")
pat lol loc slu stl $1==$4 && $3==4 call lolcxxstl("sal") pat lol loc slu stl $1==$4 && $3==4 call lolcxxstl("sal")
pat lol loc sri stl $1==$4 && $3==4 call lolcxxstl("sar") pat lol loc sri stl $1==$4 && $3==4 call lolcxxstl("sar")
@ -1747,15 +1797,28 @@ pat lol lol adp stl loi stl $1==$2 && $2==$4 && $5<=4
leaving lol $1 loi $5 stl $6 lol $2 adp $3 stl $4 leaving lol $1 loi $5 stl $6 lol $2 adp $3 stl $4
#ifdef REGVARS #ifdef REGVARS
pat lol lol adp stl loi loc loc cii $1==$2 && $2==$4 && $5==1 && inreg($1) > 0 && $6==1 && $7==4
uses REG
gen movsxb %a,{indir_r1, regvar($1)}
yields %a
leaving lol $2 adp $3 stl $4
pat lol lol adp stl loi $1==$2 && $2==$4 && $5==1 && inreg($1) > 0 pat lol lol adp stl loi $1==$2 && $2==$4 && $5==1 && inreg($1) > 0
uses REG1 = {indir_r1, regvar($1)} uses REG1 = {indir_r1, regvar($1)}
yields %a yields %a
leaving lol $2 adp $3 stl $4 leaving lol $2 adp $3 stl $4
pat lol lol adp stl loi loc loc cii $1==$2 && $2==$4 && $5==2 && inreg($1) > 0 && $6==2 && $7==4
uses REG
gen movsx %a,{indir_r2, regvar($1)}
yields %a
leaving lol $2 adp $3 stl $4
pat lol lol adp stl loi $1==$2 && $2==$4 && $5==2 && inreg($1) > 0 pat lol lol adp stl loi $1==$2 && $2==$4 && $5==2 && inreg($1) > 0
uses REG2 = {indir_r2, regvar($1)} uses REG2 = {indir_r2, regvar($1)}
yields %a yields %a
leaving lol $2 adp $3 stl $4 leaving lol $2 adp $3 stl $4
pat lol lol adp stl loi $1==$2 && $2==$4 && $5==4 && inreg($1) > 0 pat lol lol adp stl loi $1==$2 && $2==$4 && $5==4 && inreg($1) > 0
uses REG = {indir_r, regvar($1)} uses REG = {indir_r, regvar($1)}
yields %a yields %a
@ -1887,20 +1950,17 @@ pat loc loc cii loc and zne $4<65536 && $4>=0 && $5==4 && $1==2 && $2==4
pat loc loc cii $1==1 && $2==4 pat loc loc cii $1==1 && $2==4
with ACC with ACC
gen cbw. gen movsxb %1,%1 yields eax
cwde. yields eax
with exact rmorconst1 with exact rmorconst1
uses reusing %1, ACC1=%1 uses reusing %1, GENREG
gen cbw. gen movsxb %a,%1 yields %a
cwde. yields eax
pat loc loc cii $1==2 && $2==4 pat loc loc cii $1==2 && $2==4
with ACC with ACC
gen cwde. yields eax gen movsx %1,%1 yields eax
with exact rmorconst2 with exact rmorconst2
uses ACC uses reusing %1,GENREG
gen movw ax,%1 gen movsx %a,%1 yields %a
cwde. yields eax
pat loc loc ciu leaving loc $1 loc $2 cuu pat loc loc ciu leaving loc $1 loc $2 cuu
pat loc loc cui leaving loc $1 loc $2 cuu pat loc loc cui leaving loc $1 loc $2 cuu
@ -1930,6 +1990,9 @@ with REG rmorconst
with rmorconst REG with rmorconst REG
gen and %2,%1 yields %2 gen and %2,%1 yields %2
pat loc and $1==255 && $2==4
with GENREG yields %1.1
pat and $1==8 pat and $1==8
with EXACT REG REG rmorconst rmorconst with EXACT REG REG rmorconst rmorconst
gen and %1,%3 gen and %1,%3
@ -2229,9 +2292,10 @@ with REG REG rmorconst rmorconst
pat cms defined($1) pat cms defined($1)
kills ALL kills ALL
gen mov ecx,{ANYCON,$1} gen mov ecx,{ANYCON,$1}
proccall {label,".cms"} yields ecx proccall {label,".cms"} yields ecx
pat cms !defined($1) pat cms !defined($1)
with CXREG
kills ALL kills ALL
gen proccall {label,".cms"} yields ecx gen proccall {label,".cms"} yields ecx
@ -2535,13 +2599,13 @@ pat ret $1==8
pat asp $1==4 pat asp $1==4
with exact a_word with exact a_word
with STACK with STACK
uses BXREG /* GENREG may contain lfr area */ uses CXREG /* GENREG may contain lfr area */
gen pop %a gen pop %a
pat asp $1==8 pat asp $1==8
with exact a_word a_word with exact a_word a_word
with STACK with STACK
uses BXREG /* GENREG may contain lfr area */ uses CXREG /* GENREG may contain lfr area */
gen pop %a gen pop %a
pop %a pop %a
@ -2589,7 +2653,7 @@ kills ALL
gen jmp {label, ".csa4"} gen jmp {label, ".csa4"}
pat csa !defined($1) pat csa !defined($1)
with rm-BXREG-ACC ACC with rm-BXREG-ACC BXREG ACC
kills ALL kills ALL
gen cmp %1,{ANYCON,4} gen cmp %1,{ANYCON,4}
jne {label, ".unknown"} jne {label, ".unknown"}