Removed wrong patterns
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@ -66,10 +66,6 @@ move.l AREG,DREG : move.l DREG,AREG -> move.l AREG,DREG ;
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move.w DREG,DREG2 : move.w DREG2,DREG -> move.w DREG,DREG2 ;
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move.l AREG,AREG -> ;
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move.l A,B : move.l A,B -> move.l A,B ;
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move.w A,B : move.w A,B -> move.w A,B ;
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move.b A,B : move.b A,B -> move.b A,B ;
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/* register subsumption */
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move.w DREG,A : ANY A,X
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{reg_subs_allowed(ANY) &&
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