Add "kills MEMORY" to powerpc sti rules.
Adjust some of the loi rules (and associated moves) so we can identify
the tokens that must be in MEMORY.
With this commit, I can navigate the Enterprise even if I comment out
my work-around from e22c888
.
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19f0eb86a4
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@ -214,8 +214,11 @@ TOKENS
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SEX_H = { GPR reg; } 4.
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IND_RC_B = { GPR reg; INT off; } 4.
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IND_RR_B = { GPR reg1; GPR reg2; } 4.
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IND_RC_H = { GPR reg; INT off; } 4.
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IND_RR_H = { GPR reg1; GPR reg2; } 4.
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IND_RC_H_S = { GPR reg; INT off; } 4.
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IND_RR_H_S = { GPR reg1; GPR reg2; } 4.
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IND_RC_W = { GPR reg; INT off; } 4.
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IND_RR_W = { GPR reg1; GPR reg2; } 4.
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IND_RC_D = { GPR reg; INT off; } 8.
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@ -253,11 +256,18 @@ SETS
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LOGICAL_ALL = NOT_R + AND_RR + OR_RR + OR_RC + XOR_RR +
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XOR_RC.
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IND_ALL_W = IND_RC_W + IND_RR_W.
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/* indirect 4-byte value */
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IND_ALL_W = IND_RC_W + IND_RR_W.
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/* indirect 8-byte value */
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IND_ALL_D = IND_RC_D + IND_RR_D.
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/* any indirect value that fits in a GPR */
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IND_ALL_BHW = IND_RC_B + IND_RR_B + IND_RC_H + IND_RR_H +
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IND_RC_H_S + IND_RR_H_S + IND_ALL_W.
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/* anything killed by sti (store indirect) */
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MEMORY = IND_ALL_BHW + IND_ALL_D.
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OP_ALL_W = SUM_ALL + TRISTATE_ALL + SEX_ALL + LOGICAL_ALL +
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IND_ALL_W.
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@ -301,18 +311,18 @@ INSTRUCTIONS
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fsubs FSREG:wo, FSREG:ro, FSREG:ro.
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fmr FPR:wo, FPR:ro.
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fmr FSREG:wo, FSREG:ro.
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lbzx GPR:wo, GPR:ro, GPR:ro.
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lbz GPR:wo, GPRINDIRECT:ro.
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lbzx GPR:wo, GPR:ro, GPR:ro.
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lfd FPR:wo, GPRINDIRECT:ro.
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lfdu FPR:wo, GPRINDIRECT:ro.
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lfdx FPR:wo, GPR:ro, GPR:ro.
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lfs FSREG:wo, GPRINDIRECT:ro.
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lfsu FSREG:wo, GPRINDIRECT:rw.
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lfsx FSREG:wo, GPR:ro, GPR:ro.
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lhzx GPR:wo, GPR:ro, GPR:ro.
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lhax GPR:wo, GPR:ro, GPR:ro.
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lha GPR:wo, GPRINDIRECT:ro.
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lhax GPR:wo, GPR:ro, GPR:ro.
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lhz GPR:wo, GPRINDIRECT:ro.
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lhzx GPR:wo, GPR:ro, GPR:ro.
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li32 GPR:wo, LABEL:ro.
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lwzu GPR:wo, GPRINDIRECT:ro.
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lwzx GPR:wo, GPR:ro, GPR:ro.
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@ -420,35 +430,64 @@ MOVES
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COMMENT("move SUM_RR->GPR")
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add %2, %1.reg1, %1.reg2
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/* Read/write byte */
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/* Read byte */
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from IND_RC_B to GPR
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gen
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COMMENT("move IND_RC_B->GPR")
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lbz %2, {GPRINDIRECT, %1.reg, %1.off}
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from IND_RR_B to GPR
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gen
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COMMENT("move IND_RR_B->GPR")
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lbzx %2, %1.reg1, %1.reg2
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/* Write byte */
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from GPR to IND_RC_B
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gen
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COMMENT("move GPR->IND_RC_B")
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stb %1, {GPRINDIRECT, %2.reg, %2.off}
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/* Read/write halfword (short) */
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from GPR to IND_RR_B
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gen
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COMMENT("move GPR->IND_RR_B")
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stbx %1, %2.reg1, %2.reg2
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/* Read halfword (short) */
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from IND_RC_H to GPR
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gen
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COMMENT("move IND_RC_H->GPR")
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lhz %2, {GPRINDIRECT, %1.reg, %1.off}
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from IND_RR_H to GPR
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gen
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COMMENT("move IND_RR_H->GPR")
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lhzx %2, %1.reg1, %1.reg2
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from IND_RC_H_S to GPR
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gen
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COMMENT("move IND_RC_H_S->GPR")
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lha %2, {GPRINDIRECT, %1.reg, %1.off}
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from IND_RR_H_S to GPR
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gen
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COMMENT("move IND_RR_H_S->GPR")
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lhax %2, %1.reg1, %1.reg2
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/* Write halfword */
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from GPR to IND_RC_H
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gen
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COMMENT("move GPR->IND_RC_H")
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sth %1, {GPRINDIRECT, %2.reg, %2.off}
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from GPR to IND_RR_H
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gen
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COMMENT("move GPR->IND_RR_H")
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sthx %1, %2.reg1, %2.reg2
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/* Read word */
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from IND_RC_W to GPR
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@ -670,7 +709,7 @@ STACKINGRULES
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move %1, RSCRATCH
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stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
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from IND_ALL_W to STACK
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from IND_ALL_BHW to STACK
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gen
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move %1, RSCRATCH
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stwu RSCRATCH, {GPRINDIRECT, SP, 0-4}
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@ -771,7 +810,7 @@ COERCIONS
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addi SP, SP, {CONST, 4}
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yields %a
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from IND_ALL_W
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from IND_ALL_BHW
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uses REG
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gen
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move %1, %a
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@ -1048,55 +1087,29 @@ PATTERNS
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pat loi $1==INT8 /* Load byte indirect */
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with GPR
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uses REG
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gen
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lbz %a, {GPRINDIRECT, %1, 0}
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yields %a
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yields {IND_RC_B, %1, 0}
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with SUM_RR
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uses reusing %1, REG
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gen
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lbzx %a, %1.reg1, %1.reg2
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yields %a
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yields {IND_RR_B, %1.reg1, %1.reg2}
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with SUM_RC
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uses REG
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gen
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move {IND_RC_B, %1.reg, %1.off}, %a
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yields %a
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pat loi loc loc cii $1==INT16 && $2==INT16 && $3==INT32 /* Load half-word indirect and sign extend */
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yields {IND_RC_B, %1.reg, %1.off}
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pat loi loc loc cii $1==INT16 && $2==INT16 && $3==INT32
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/* Load half-word indirect and sign extend */
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with GPR
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uses REG
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gen
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lha %a, {GPRINDIRECT, %1, 0}
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yields %a
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yields {IND_RC_H_S, %1, 0}
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with SUM_RR
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uses reusing %1, REG
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gen
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lhax %a, %1.reg1, %1.reg2
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yields %a
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yields {IND_RR_H_S, %1.reg1, %1.reg2}
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with SUM_RC
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uses REG
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gen
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move {IND_RC_H_S, %1.reg, %1.off}, %a
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yields %a
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yields {IND_RC_H_S, %1.reg, %1.off}
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pat loi $1==INT16 /* Load half-word indirect */
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with GPR
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uses REG
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gen
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lhz %a, {GPRINDIRECT, %1, 0}
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yields %a
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yields {IND_RC_H, %1, 0}
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with SUM_RR
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uses reusing %1, REG
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gen
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lhzx %a, %1.reg1, %1.reg2
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yields %a
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yields {IND_RR_H, %1.reg1, %1.reg2}
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with SUM_RC
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uses REG
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gen
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move {IND_RC_H, %1.reg, %1.off}, %a
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yields %a
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yields {IND_RC_H, %1.reg, %1.off}
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pat loi $1==INT32 /* Load word indirect */
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with GPR
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yields {IND_RC_W, %1, 0}
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@ -1123,73 +1136,93 @@ PATTERNS
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kills ALL
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gen
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bl {LABEL, ".los"}
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pat sti $1==INT8 /* Store byte indirect */
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with GPR GPR
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kills MEMORY
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gen
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stb %2, {GPRINDIRECT, %1, 0}
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with SUM_RR GPR
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kills MEMORY
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gen
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stbx %2, %1.reg1, %1.reg2
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with SUM_RC GPR
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kills MEMORY
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gen
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move %2, {IND_RC_B, %1.reg, %1.off}
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with GPR SEX_B
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kills MEMORY
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gen
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stb %2.reg, {GPRINDIRECT, %1, 0}
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with SUM_RR SEX_B
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kills MEMORY
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gen
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stbx %2.reg, %1.reg1, %1.reg2
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with SUM_RC SEX_B
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kills MEMORY
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gen
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move %2.reg, {IND_RC_B, %1.reg, %1.off}
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pat sti $1==INT16 /* Store half-word indirect */
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with GPR GPR
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kills MEMORY
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gen
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sth %2, {GPRINDIRECT, %1, 0}
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with SUM_RR GPR
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kills MEMORY
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gen
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sthx %2, %1.reg1, %1.reg2
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with SUM_RC GPR
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kills MEMORY
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gen
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move %2, {IND_RC_H, %1.reg, %1.off}
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with GPR SEX_H
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kills MEMORY
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gen
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sth %2.reg, {GPRINDIRECT, %1, 0}
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with SUM_RR SEX_H
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kills MEMORY
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gen
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sthx %2.reg, %1.reg1, %1.reg2
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with SUM_RC SEX_H
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kills MEMORY
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gen
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move %2.reg, {IND_RC_H, %1.reg, %1.off}
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pat sti $1==INT32 /* Store word indirect */
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with GPR GPR+FSREG
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kills MEMORY
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gen
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move %2, {IND_RC_W, %1, 0}
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with SUM_RR GPR+FSREG
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kills MEMORY
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gen
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move %2, {IND_RR_W, %1.reg1, %1.reg2}
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with SUM_RC GPR+FSREG
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kills MEMORY
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gen
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move %2, {IND_RC_W, %1.reg, %1.off}
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pat sti $1==INT64 /* Store double-word indirect */
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with GPR FREG
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kills MEMORY
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gen
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move %2, {IND_RC_D, %1, 0}
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with SUM_RR FREG
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kills MEMORY
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gen
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move %2, {IND_RR_D, %1.reg1, %1.reg2}
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with SUM_RC FREG
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kills MEMORY
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gen
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move %2, {IND_RC_D, %1.reg, %1.off}
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with GPR GPR GPR
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kills MEMORY
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gen
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stw %2, {GPRINDIRECT, %1, 0}
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stw %3, {GPRINDIRECT, %1, 4}
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with SUM_RC GPR GPR
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kills MEMORY
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gen
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move %2, {IND_RC_W, %1.reg, %1.off}
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move %3, {IND_RC_W, %1.reg, %1.off+4}
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@ -1198,8 +1231,8 @@ PATTERNS
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leaving
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loc $1
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sts INT32
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pat sts /* Load arbitrary size */
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pat sts /* Store arbitrary size */
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with GPR3 GPR4 STACK
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kills ALL
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gen
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