In PowerPC ncg, allocate register for ha16[label].

Use it to generate code like

    lis r12,ha16[__II0]
    lis r11,ha16[_f]
    lfs f1,lo16[_f](r11)
    lfs f2,lo16[__II0](r12)
    fadds f13,f2,f1
    stfs f13,lo16[_f](r11)

Here ncg has allocated r11 for ha16[_f].  We use r11 in lfs and again
in stfs.  Before this change, we needed an extra lis before stfs,
because ncg did not remember that ha16[_f] was in a register.

This example has a gap between ha16[__II0] and lo16[__II0], because
the lo16 is not in the next instruction.  This requires my previous
commit 1bf58cf for RELOLIS.  There is a gap because ncg emits the lis
as soon as I allocate it.  The "lfs f2,lo16[__II0](r12)" happens in a
coercion from IND_RL_W to FSREG.  The coercion allocates one FSREG but
may not allocate any other registers.  So I must allocate r12 earlier.
I allocate r12 in pat lae, but this causes a gap.
This commit is contained in:
George Koehler 2017-02-08 12:23:06 -05:00
parent 754e96ef16
commit ed21a59a82

View file

@ -162,7 +162,6 @@ TOKENS
LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]". LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]".
LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]". LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]".
LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]". LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]".
LABEL_STACK = { GPR reg; ADDR adr; } 4.
LOCAL = { INT off; } 4 ">>> BUG IN LOCAL". LOCAL = { INT off; } 4 ">>> BUG IN LOCAL".
/* Allows us to use regvar() to refer to registers */ /* Allows us to use regvar() to refer to registers */
@ -181,9 +180,10 @@ TOKENS
/* Expression partial results */ /* Expression partial results */
SUM_RIS = { GPR reg; INT offhi; } 4. SUM_RIS = { GPR reg; INT offhi; } 4. /* reg + (offhi << 16) */
SUM_RC = { GPR reg; INT off; } 4. SUM_RC = { GPR reg; INT off; } 4. /* reg + off */
SUM_RR = { GPR reg1; GPR reg2; } 4. SUM_RL = { GPR reg; ADDR adr; } 4. /* reg + lo16[adr] */
SUM_RR = { GPR reg1; GPR reg2; } 4. /* reg1 + reg2 */
SEX_B = { GPR reg; } 4. SEX_B = { GPR reg; } 4.
SEX_H = { GPR reg; } 4. SEX_H = { GPR reg; } 4.
@ -237,7 +237,7 @@ SETS
CONST_STACK = CONST_N8000 + CONST_N7FFF_N0001 + CONST_0000_7FFF + CONST_STACK = CONST_N8000 + CONST_N7FFF_N0001 + CONST_0000_7FFF +
CONST_8000 + CONST_8001_FFFF + CONST_HZ + CONST_HL. CONST_8000 + CONST_8001_FFFF + CONST_HZ + CONST_HL.
SUM_ALL = SUM_RC + SUM_RR. SUM_ALL = SUM_RC + SUM_RL + SUM_RR.
SEX_ALL = SEX_B + SEX_H. SEX_ALL = SEX_B + SEX_H.
@ -420,12 +420,6 @@ MOVES
gen gen
lis %2, %1 lis %2, %1
from LABEL_STACK to GPR
gen
move {LABEL_HA, %1.adr}, %1.reg
addi %2, %1.reg, {LABEL_LO, %1.adr}
/* Sign extension */ /* Sign extension */
from SEX_B to GPR from SEX_B to GPR
@ -450,6 +444,11 @@ MOVES
COMMENT("move SUM_RC->GPR") COMMENT("move SUM_RC->GPR")
addi %2, %1.reg, {CONST, %1.off} addi %2, %1.reg, {CONST, %1.off}
from SUM_RL to GPR
gen
COMMENT("move SUM_RL->GPR")
addi %2, %1.reg, {LABEL_LO, %1.adr}
from SUM_RR to GPR from SUM_RR to GPR
gen gen
COMMENT("move SUM_RR->GPR") COMMENT("move SUM_RR->GPR")
@ -522,7 +521,6 @@ MOVES
from IND_RL_W to GPR from IND_RL_W to GPR
gen gen
move {LABEL_HA, %1.adr}, %1.reg
lwz %2, %1 lwz %2, %1
from IND_RR_W to GPR from IND_RR_W to GPR
@ -537,7 +535,6 @@ MOVES
from IND_RL_W to FSREG from IND_RL_W to FSREG
gen gen
move {LABEL_HA, %1.adr}, %1.reg
lfs %2, %1 lfs %2, %1
from IND_RR_W to FSREG from IND_RR_W to FSREG
@ -552,6 +549,10 @@ MOVES
COMMENT("move GPR->IND_RC_W") COMMENT("move GPR->IND_RC_W")
stw %1, %2 stw %1, %2
from GPR to IND_RL_W
gen
stw %1, %2
from GPR to IND_RR_W from GPR to IND_RR_W
gen gen
COMMENT("move GPR->IND_RR_W") COMMENT("move GPR->IND_RR_W")
@ -562,6 +563,10 @@ MOVES
COMMENT("move FSREG->IND_RC_W") COMMENT("move FSREG->IND_RC_W")
stfs %1, %2 stfs %1, %2
from FSREG to IND_RL_W
gen
stfs %1, %2
from FSREG to IND_RR_W from FSREG to IND_RR_W
gen gen
COMMENT("move FSREG->IND_RR_W") COMMENT("move FSREG->IND_RR_W")
@ -738,12 +743,6 @@ STACKINGRULES
move %1, RSCRATCH move %1, RSCRATCH
stwu RSCRATCH, {IND_RC_W, SP, 0-4} stwu RSCRATCH, {IND_RC_W, SP, 0-4}
from LABEL_STACK to STACK
gen
COMMENT("stack LABEL_STACK")
move %1, RSCRATCH
stwu RSCRATCH, {IND_RC_W, SP, 0-4}
from SEX_B to STACK from SEX_B to STACK
gen gen
COMMENT("stack SEX_B") COMMENT("stack SEX_B")
@ -1082,8 +1081,8 @@ PATTERNS
lae $1 lae $1
pat lae /* Load address of external */ pat lae /* Load address of external */
uses REG uses REG={LABEL_HA, $1}
yields {LABEL_STACK, %a, $1} yields {SUM_RL, %a, $1}
pat loe /* Load word external */ pat loe /* Load word external */
leaving leaving
@ -1111,20 +1110,16 @@ PATTERNS
ste $1 ste $1
pat ine /* Increment external */ pat ine /* Increment external */
kills MEMORY leaving
uses REG={LABEL, $1}, REG loe $1
gen inc
lwz %b, {IND_RC_W, %a, 0} ste $1
addi %b, %b, {CONST, 1}
stw %b, {IND_RC_W, %a, 0}
pat dee /* Decrement external */ pat dee /* Decrement external */
kills MEMORY leaving
uses REG={LABEL, $1}, REG loe $1
gen dec
lwz %b, {IND_RC_W, %a, 0} ste $1
addi %b, %b, {CONST, 0-1}
stw %b, {IND_RC_W, %a, 0}
@ -1182,10 +1177,10 @@ PATTERNS
pat loi $1==INT32 /* Load word indirect */ pat loi $1==INT32 /* Load word indirect */
with GPR with GPR
yields {IND_RC_W, %1, 0} yields {IND_RC_W, %1, 0}
with exact LABEL_STACK
yields {IND_RL_W, %1.reg, %1.adr}
with exact SUM_RC with exact SUM_RC
yields {IND_RC_W, %1.reg, %1.off} yields {IND_RC_W, %1.reg, %1.off}
with exact SUM_RL
yields {IND_RL_W, %1.reg, %1.adr}
with exact SUM_RR with exact SUM_RR
yields {IND_RR_W, %1.reg1, %1.reg2} yields {IND_RR_W, %1.reg1, %1.reg2}
@ -1265,20 +1260,14 @@ PATTERNS
kills MEMORY kills MEMORY
gen gen
move %2, {IND_RC_W, %1, 0} move %2, {IND_RC_W, %1, 0}
with LABEL_STACK REG
kills MEMORY
gen
move {LABEL_HA, %1.adr}, %1.reg
stw %2, {IND_RL_W, %1.reg, %1.adr}
with LABEL_STACK FSREG
kills MEMORY
gen
move {LABEL_HA, %1.adr}, %1.reg
stfs %2, {IND_RL_W, %1.reg, %1.adr}
with SUM_RR REG+FSREG with SUM_RR REG+FSREG
kills MEMORY kills MEMORY
gen gen
move %2, {IND_RR_W, %1.reg1, %1.reg2} move %2, {IND_RR_W, %1.reg1, %1.reg2}
with SUM_RL REG+FSREG
kills MEMORY
gen
move %2, {IND_RL_W, %1.reg, %1.adr}
with SUM_RC REG+FSREG with SUM_RC REG+FSREG
kills MEMORY kills MEMORY
gen gen
@ -1415,12 +1404,6 @@ PATTERNS
with REG CONST_STACK-CONST2-CONST_HZ with REG CONST_STACK-CONST2-CONST_HZ
uses reusing %1, REG={SUM_RIS, %1, his(%2.val)} uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
yields {SUM_RC, %a, los(%2.val)} yields {SUM_RC, %a, los(%2.val)}
with exact CONST_STACK LABEL_STACK
uses reusing %2.reg, REG
yields {LABEL_STACK, %a, %2.adr+%1.val}
with exact LABEL_STACK CONST_STACK
uses reusing %1.reg, REG
yields {LABEL_STACK, %a, %1.adr+%2.val}
pat sbi $1==4 /* Subtract word (second - top) */ pat sbi $1==4 /* Subtract word (second - top) */
with REG REG with REG REG
@ -1436,9 +1419,6 @@ PATTERNS
with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG
uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)} uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
yields {SUM_RC, %a, los(0-%1.val)} yields {SUM_RC, %a, los(0-%1.val)}
with exact CONST_STACK LABEL_STACK
uses reusing %2.reg, REG
yields {LABEL_STACK, %a, %2.adr+(0-%1.val)}
pat ngi $1==4 /* Negate word */ pat ngi $1==4 /* Negate word */
with REG with REG