In PowerPC ncg, allocate register for ha16[label].
Use it to generate code like
lis r12,ha16[__II0]
lis r11,ha16[_f]
lfs f1,lo16[_f](r11)
lfs f2,lo16[__II0](r12)
fadds f13,f2,f1
stfs f13,lo16[_f](r11)
Here ncg has allocated r11 for ha16[_f]. We use r11 in lfs and again
in stfs. Before this change, we needed an extra lis before stfs,
because ncg did not remember that ha16[_f] was in a register.
This example has a gap between ha16[__II0] and lo16[__II0], because
the lo16 is not in the next instruction. This requires my previous
commit 1bf58cf
for RELOLIS. There is a gap because ncg emits the lis
as soon as I allocate it. The "lfs f2,lo16[__II0](r12)" happens in a
coercion from IND_RL_W to FSREG. The coercion allocates one FSREG but
may not allocate any other registers. So I must allocate r12 earlier.
I allocate r12 in pat lae, but this causes a gap.
This commit is contained in:
parent
754e96ef16
commit
ed21a59a82
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@ -162,7 +162,6 @@ TOKENS
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LABEL_HI = { ADDR adr; } 4 "hi16[" adr "]".
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LABEL_HA = { ADDR adr; } 4 "ha16[" adr "]".
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LABEL_LO = { ADDR adr; } 4 "lo16[" adr "]".
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LABEL_STACK = { GPR reg; ADDR adr; } 4.
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LOCAL = { INT off; } 4 ">>> BUG IN LOCAL".
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/* Allows us to use regvar() to refer to registers */
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@ -181,9 +180,10 @@ TOKENS
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/* Expression partial results */
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SUM_RIS = { GPR reg; INT offhi; } 4.
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SUM_RC = { GPR reg; INT off; } 4.
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SUM_RR = { GPR reg1; GPR reg2; } 4.
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SUM_RIS = { GPR reg; INT offhi; } 4. /* reg + (offhi << 16) */
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SUM_RC = { GPR reg; INT off; } 4. /* reg + off */
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SUM_RL = { GPR reg; ADDR adr; } 4. /* reg + lo16[adr] */
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SUM_RR = { GPR reg1; GPR reg2; } 4. /* reg1 + reg2 */
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SEX_B = { GPR reg; } 4.
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SEX_H = { GPR reg; } 4.
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@ -237,7 +237,7 @@ SETS
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CONST_STACK = CONST_N8000 + CONST_N7FFF_N0001 + CONST_0000_7FFF +
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CONST_8000 + CONST_8001_FFFF + CONST_HZ + CONST_HL.
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SUM_ALL = SUM_RC + SUM_RR.
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SUM_ALL = SUM_RC + SUM_RL + SUM_RR.
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SEX_ALL = SEX_B + SEX_H.
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@ -420,12 +420,6 @@ MOVES
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gen
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lis %2, %1
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from LABEL_STACK to GPR
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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addi %2, %1.reg, {LABEL_LO, %1.adr}
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/* Sign extension */
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from SEX_B to GPR
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@ -450,6 +444,11 @@ MOVES
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COMMENT("move SUM_RC->GPR")
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addi %2, %1.reg, {CONST, %1.off}
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from SUM_RL to GPR
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gen
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COMMENT("move SUM_RL->GPR")
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addi %2, %1.reg, {LABEL_LO, %1.adr}
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from SUM_RR to GPR
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gen
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COMMENT("move SUM_RR->GPR")
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@ -522,7 +521,6 @@ MOVES
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from IND_RL_W to GPR
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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lwz %2, %1
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from IND_RR_W to GPR
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@ -537,7 +535,6 @@ MOVES
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from IND_RL_W to FSREG
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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lfs %2, %1
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from IND_RR_W to FSREG
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@ -552,6 +549,10 @@ MOVES
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COMMENT("move GPR->IND_RC_W")
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stw %1, %2
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from GPR to IND_RL_W
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gen
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stw %1, %2
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from GPR to IND_RR_W
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gen
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COMMENT("move GPR->IND_RR_W")
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@ -562,6 +563,10 @@ MOVES
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COMMENT("move FSREG->IND_RC_W")
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stfs %1, %2
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from FSREG to IND_RL_W
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gen
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stfs %1, %2
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from FSREG to IND_RR_W
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gen
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COMMENT("move FSREG->IND_RR_W")
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@ -738,12 +743,6 @@ STACKINGRULES
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move %1, RSCRATCH
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stwu RSCRATCH, {IND_RC_W, SP, 0-4}
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from LABEL_STACK to STACK
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gen
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COMMENT("stack LABEL_STACK")
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move %1, RSCRATCH
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stwu RSCRATCH, {IND_RC_W, SP, 0-4}
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from SEX_B to STACK
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gen
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COMMENT("stack SEX_B")
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@ -1082,8 +1081,8 @@ PATTERNS
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lae $1
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pat lae /* Load address of external */
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uses REG
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yields {LABEL_STACK, %a, $1}
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uses REG={LABEL_HA, $1}
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yields {SUM_RL, %a, $1}
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pat loe /* Load word external */
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leaving
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@ -1111,20 +1110,16 @@ PATTERNS
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ste $1
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pat ine /* Increment external */
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kills MEMORY
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uses REG={LABEL, $1}, REG
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gen
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lwz %b, {IND_RC_W, %a, 0}
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addi %b, %b, {CONST, 1}
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stw %b, {IND_RC_W, %a, 0}
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leaving
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loe $1
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inc
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ste $1
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pat dee /* Decrement external */
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kills MEMORY
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uses REG={LABEL, $1}, REG
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gen
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lwz %b, {IND_RC_W, %a, 0}
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addi %b, %b, {CONST, 0-1}
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stw %b, {IND_RC_W, %a, 0}
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leaving
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loe $1
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dec
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ste $1
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@ -1182,10 +1177,10 @@ PATTERNS
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pat loi $1==INT32 /* Load word indirect */
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with GPR
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yields {IND_RC_W, %1, 0}
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with exact LABEL_STACK
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yields {IND_RL_W, %1.reg, %1.adr}
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with exact SUM_RC
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yields {IND_RC_W, %1.reg, %1.off}
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with exact SUM_RL
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yields {IND_RL_W, %1.reg, %1.adr}
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with exact SUM_RR
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yields {IND_RR_W, %1.reg1, %1.reg2}
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@ -1265,20 +1260,14 @@ PATTERNS
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kills MEMORY
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gen
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move %2, {IND_RC_W, %1, 0}
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with LABEL_STACK REG
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kills MEMORY
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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stw %2, {IND_RL_W, %1.reg, %1.adr}
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with LABEL_STACK FSREG
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kills MEMORY
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gen
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move {LABEL_HA, %1.adr}, %1.reg
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stfs %2, {IND_RL_W, %1.reg, %1.adr}
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with SUM_RR REG+FSREG
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kills MEMORY
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gen
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move %2, {IND_RR_W, %1.reg1, %1.reg2}
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with SUM_RL REG+FSREG
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kills MEMORY
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gen
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move %2, {IND_RL_W, %1.reg, %1.adr}
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with SUM_RC REG+FSREG
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kills MEMORY
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gen
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@ -1415,12 +1404,6 @@ PATTERNS
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with REG CONST_STACK-CONST2-CONST_HZ
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uses reusing %1, REG={SUM_RIS, %1, his(%2.val)}
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yields {SUM_RC, %a, los(%2.val)}
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with exact CONST_STACK LABEL_STACK
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uses reusing %2.reg, REG
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yields {LABEL_STACK, %a, %2.adr+%1.val}
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with exact LABEL_STACK CONST_STACK
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uses reusing %1.reg, REG
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yields {LABEL_STACK, %a, %1.adr+%2.val}
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pat sbi $1==4 /* Subtract word (second - top) */
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with REG REG
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with CONST_STACK-CONST2_WHEN_NEG-CONST_HZ REG
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uses reusing %2, REG={SUM_RIS, %2, his(0-%1.val)}
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yields {SUM_RC, %a, los(0-%1.val)}
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with exact CONST_STACK LABEL_STACK
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uses reusing %2.reg, REG
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yields {LABEL_STACK, %a, %2.adr+(0-%1.val)}
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pat ngi $1==4 /* Negate word */
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with REG
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