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many changes because of introduction of register variables si/di

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This commit is contained in:
ceriel 1987-06-09 10:22:50 +00:00
parent 798261d992
commit f751192942
32 changed files with 271 additions and 171 deletions
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4
mach/i86/libem/and.s
View file

@ -2,9 +2,12 @@
.define .and
! #bytes in cx
! save di; it might be a register variable
.sect .text
.and:
pop bx ! return address
mov dx,di
mov di,sp
add di,cx
sar cx,1
@ -13,4 +16,5 @@
and ax,(di)
stos
loop 1b
mov di,dx
jmp bx

18
mach/i86/libem/cii.s
View file

@ -3,32 +3,32 @@
.sect .text
.cii:
pop di ! return address
pop bx ! return address
! pop cx, dest. size
! pop bx, src. size
! pop dx, src. size
! ax is first word of source
cmp bx,1
cmp dx,1
jne 2f
cbw
mov bx,2
mov dx,2
2:
cmp bx,cx
cmp dx,cx
je 8f
cmp bx,2
cmp dx,2
je 1f
cmp bx,4
cmp dx,4
jne 9f
cmp cx,2
jne 9f
pop dx
8:
jmp di
jmp bx
1:
cmp cx,4
jne 9f
cwd
push dx
jmp di
jmp bx
9:
push ax ! push low source
.extern EILLINS

4
mach/i86/libem/cms.s
View file

@ -6,6 +6,8 @@
.cms:
pop bx ! return address
mov dx,sp
push si
push di
mov si,dx
add dx,cx
mov di,dx
@ -15,5 +17,7 @@
je 1f
inc cx
1:
pop di
pop si
mov sp,dx
jmp bx

26
mach/i86/libem/cmu4.s
View file

@ -4,23 +4,25 @@
.sect .text
.cmu4:
pop bx ! return address
xor ax,ax
pop cx
pop dx
pop si
pop di
cmp di,dx
pop ax
push si
mov si,sp
xchg bx,2(si)
pop si
cmp bx,dx
ja 1f
jb 2f
cmp si,cx
cmp ax,cx
ja 1f
je 3f
2:
dec ax
3:
jmp bx
1:
inc ax
jmp bx
mov ax,-1
ret
3:
xor ax,ax
ret
1:
mov ax,1
ret

12
mach/i86/libem/com.s
View file

@ -4,12 +4,12 @@
! #bytes in cx
.sect .text
.com:
pop bx ! return address
mov di,sp
mov bx,sp
add bx,2
sar cx,1
1:
not (di)
inc di
inc di
not (bx)
inc bx
inc bx
loop 1b
jmp bx
ret

15
mach/i86/libem/csa2.s
View file

@ -3,14 +3,15 @@
.sect .text
.csa2:
! si, descriptor address
! bx, index
mov dx,(si) ! default
sub bx,2(si)
cmp bx,4(si)
! bx, descriptor address
! ax, index
mov dx,(bx) ! default
sub ax,2(bx)
cmp ax,4(bx)
ja 1f
sal bx,1
mov bx,6(bx)(si)
sal ax,1
add bx,ax
mov bx,6(bx)
test bx,bx
jnz 2f
1:

17
mach/i86/libem/csb2.s
View file

@ -3,20 +3,17 @@
.sect .text
.csb2:
!si, descriptor address
!dx, index
lods
xchg ax,bx ! default
lods
xchg ax,cx ! number of cases
!bx, descriptor address
!ax, index
mov dx,(bx)
mov cx,2(bx)
1:
add bx,4
dec cx
jl 2f
lods
cmp ax,dx
lods
cmp ax,(bx)
jne 1b
xchg ax,bx
mov bx,2(bx)
2:
test bx,bx
jnz 3f

14
mach/i86/libem/cuu.s
View file

@ -7,27 +7,27 @@
.ciu:
.cui:
.cuu:
pop di ! return address
pop bx ! return address
! pop cx, dest. size
! pop bx, source size
! pop dx, source size
! ax is low word of source
cmp bx,cx
cmp dx,cx
je 8f
cmp bx,2
cmp dx,2
je 1f
cmp bx,4
cmp dx,4
jne 9f
cmp cx,2
jne 9f
pop dx
8:
jmp di
jmp bx
1:
cmp cx,4
jne 9f
xor dx,dx
push dx
jmp di
jmp bx
9:
push ax ! to help debugging ?
.extern EILLINS

4
mach/i86/libem/dup.s
View file

@ -5,9 +5,13 @@
.sect .text
.dup:
pop bx ! return address
mov ax,si
mov dx,di
mov si,sp
sub sp,cx
mov di,sp
sar cx,1
rep movs
mov si,ax
mov di,dx
jmp bx

2
mach/i86/libem/dvi.s
View file

@ -28,7 +28,7 @@
.extern .dvi4
call .dvi4
pop bx
push cx
push dx
push ax
jmp bx
9:

15
mach/i86/libem/dvi4.s
View file

@ -1,13 +1,15 @@
.sect .text; .sect .rom; .sect .data; .sect .bss
.define .dvi4
yl=2
yh=4
xl=6
xh=8
yl=6
yh=8
xl=10
xh=12
.sect .text
.dvi4:
push si
push di
mov si,sp ! copy of sp
mov bx,yl(si)
mov ax,yh(si)
@ -42,7 +44,10 @@ xh=8
1:
! cx is high order result
! ax is low order result
ret 8
mov dx,cx
pop di
pop si
ret 8 ! result in ax/dx
7:
push dx ! sign of y

2
mach/i86/libem/dvu.s
View file

@ -28,7 +28,7 @@
.extern .dvu4
call .dvu4
pop bx
push cx
push dx
push ax
jmp bx
9:

15
mach/i86/libem/dvu4.s
View file

@ -1,13 +1,15 @@
.sect .text; .sect .rom; .sect .data; .sect .bss
.define .dvu4
yl=2
yh=4
xl=6
xh=8
yl=6
yh=8
xl=10
xh=12
.sect .text
.dvu4:
push si
push di
mov si,sp ! copy of sp
mov bx,yl(si)
mov ax,yh(si)
@ -22,7 +24,10 @@ xh=8
9:
! cx is high order result
! ax is low order result
ret 8
mov dx,cx
pop di
pop si
ret 8 ! result in ax/dx
7:
mov di,ax

27
mach/i86/libem/exg.s
View file

@ -4,18 +4,17 @@
! #bytes in cx
.sect .text
.exg:
pop bx ! return address
mov dx,cx
mov si,sp
sub sp,cx
mov di,sp
rep movs
mov si,sp
mov di,sp
add di,dx
add di,dx
mov cx,dx
push di
mov sp,di
add di,4
mov bx,di
add bx,cx
sar cx,1
rep movs
mov sp,si
jmp bx
1:
mov ax,(bx)
xchg ax,(di)
mov (bx),ax
loop 1b
2:
pop di
ret

16
mach/i86/libem/iaar.s
View file

@ -3,15 +3,17 @@
.define .iaar
.iaar:
pop bx
pop cx
pop dx
cmp dx,2
.extern .unknown
jne .unknown
pop si ! descriptor address
pop bx ! descriptor address
pop ax ! index
pop di ! array base
sub ax,(si)
mul 4(si)
add di,ax
jmp bx
pop dx ! array base
sub ax,(bx)
mul 4(bx)
mov bx,dx
add bx,ax
push cx
ret

7
mach/i86/libem/ilar.s
View file

@ -3,14 +3,13 @@
.define .ilar
.ilar:
pop bx
pop cx
pop dx
.extern .unknown
cmp dx,2
jne .unknown
pop di ! descriptor address
pop bx ! descriptor address
pop ax ! index
pop si ! array base
push bx
push cx
.extern .lar2
jmp .lar2

24
mach/i86/libem/inn.s
View file

@ -5,22 +5,24 @@
! #bytes in cx
! bit # in ax
.inn:
pop bx ! return address
xor dx,dx
xor si,si
mov di,8
div di
mov di,sp
add di,ax
mov bx,8
div bx
mov bx,sp
add bx,2
add bx,ax
cmp ax,cx
xchg ax,dx
xchg ax,si ! ax:=si,si:=dx,does not change carry
jae 1f
movb dl,bits(si)
testb (di),dl
movb al,(bx)
mov bx,dx
testb al,bits(bx)
jz 1f
inc ax
mov ax,1
jmp 2f
1:
xor ax,ax
2:
pop bx
add sp,cx
! ax is result
jmp bx

2
mach/i86/libem/ior.s
View file

@ -5,6 +5,7 @@
! #bytes in cx
.ior:
pop bx ! return address
mov dx,di
mov di,sp
add di,cx
sar cx,1
@ -13,4 +14,5 @@
or ax,(di)
stos
loop 1b
mov di,dx
jmp bx

11
mach/i86/libem/isar.s
View file

@ -3,14 +3,13 @@
.define .isar
.isar:
pop bx
pop dx
cmp dx,2
pop cx
pop ax
cmp ax,2
.extern .unknown
jne .unknown
pop si ! descriptor address
pop bx ! descriptor address
pop ax ! index
pop di ! array base
push bx
push cx
.extern .sar2
jmp .sar2

23
mach/i86/libem/lar2.s
View file

@ -3,22 +3,33 @@
.define .lar2
.lar2:
pop bx ! return address
! di, descriptor address
! bx, descriptor address
! ax, index
! si, base address
sub ax,(di)
mov cx,4(di)
pop cx
pop dx ! base address
push cx
push si
mov si,dx
sub ax,(bx)
mov cx,4(bx)
imul cx
add si,ax
sar cx,1
jnb 1f
xorb ah,ah
lodsb
pop si
pop bx
push ax
jmp bx
1:
sub sp,4(di)
pop dx ! saved si
mov ax,4(bx)
pop bx ! return address
sub sp,ax
mov ax,di ! save di
mov di,sp
rep movs
mov di,ax
mov si,dx
jmp bx

16
mach/i86/libem/loi.s
View file

@ -3,18 +3,26 @@
.define .loi
! #bytes in cx
! source address in si
! address in bx
! save si/di. they might be register variables
.loi:
pop bx
mov dx,cx
pop ax
mov dx,si
mov si,bx
mov bx,ax
mov ax,cx
sar cx,1
jnb 1f
xorb ah,ah
lodsb
mov si,dx
push ax
jmp bx
1:
sub sp,dx
sub sp,ax
mov ax,di
mov di,sp
rep movs
mov si,dx
mov di,ax
jmp bx

26
mach/i86/libem/mli.s
View file

@ -13,15 +13,27 @@
push ax
jmp bx
1:
mov dx,bx
cmp ax,4
jne 9f
pop si
pop di
pop bx
pop ax
push dx
jmp .mli4
push bx
mov cx,bx
mov bx,sp
mov ax,2(bx)
mov (bx),ax
mov ax,4(bx)
mov 2(bx),ax
mov ax,6(bx)
mov 4(bx),ax
mov ax,8(bx)
mov 6(bx),ax
mov 8(bx),cx
pop ax
pop dx
jsr .mli4
pop bx
push dx
push ax
jmp bx
9:
.extern EODDZ
.extern .trp

29
mach/i86/libem/mli4.s
View file

@ -2,17 +2,24 @@
.sect .text
.define .mli4
! x * y with
! x.low = si x.high = di
! y.low = bx y.high = ax
yl=2
yh=4
! x * y
! xl in ax
! xh in dx
.mli4:
mul si ! xl*yh
mov cx,ax
mov ax,di
mul bx ! xh*yl
add cx,ax ! xh*yl+xl*yh
mov ax,si
mul bx ! xl*yl
mov bx,sp
push dx
mov cx,ax
mul yh(bx) ! xl*yh
pop dx
push ax
mov ax,dx
mul yl(bx) ! xh * yl
pop dx
add dx,ax ! xh*yl+xl*yh
mov ax,cx
mul yl(bx) ! xl*yl
add dx,cx
ret
ret 4

6
mach/i86/libem/rck.s
View file

@ -2,12 +2,12 @@
.sect .text
.define .rck
! descriptor address in si
! descriptor address in bx
! value in ax, must be left there
.rck:
cmp ax,(si)
cmp ax,(bx)
jl 2f
cmp ax,2(si)
cmp ax,2(bx)
jg 2f
ret
2:

6
mach/i86/libem/rmi.s
View file

@ -27,10 +27,10 @@
push ax
.extern .rmi4
call .rmi4
pop ax
push bx
pop bx
push dx
jmp ax
push ax
jmp bx
9:
.extern EODDZ
.extern .trp

14
mach/i86/libem/rmi4.s
View file

@ -2,12 +2,14 @@
.sect .text
.define .rmi4
yl=2
yh=4
xl=6
xh=8
yl=6
yh=8
xl=10
xh=12
.rmi4:
push si
push di
mov si,sp ! copy of sp
mov bx,yl(si)
mov ax,yh(si)
@ -41,6 +43,10 @@ xh=8
1:
! bx is high order result
! dx is low order result
mov ax,dx
mov dx,bx ! result in ax/dx
pop di
pop si
ret 8
7:

6
mach/i86/libem/rmu.s
View file

@ -27,10 +27,10 @@
push ax
.extern .rmu4
call .rmu4
pop ax
push bx
pop bx
push dx
jmp ax
push ax
jmp bx
9:
.extern EODDZ
.extern .trp

16
mach/i86/libem/rmu4.s
View file

@ -2,12 +2,14 @@
.sect .text
.define .rmu4
yl=2
yh=4
xl=6
xh=8
yl=6
yh=8
xl=10
xh=12
.rmu4:
push si
push di
mov si,sp ! copy of sp
mov bx,yl(si)
mov ax,yh(si)
@ -25,7 +27,11 @@ xh=8
9:
! bx is high order result
! dx is low order result
ret 8
mov ax,dx
mov dx,bx
pop di
pop si
ret 8 ! result in ax/dx
7:
mov di,ax

20
mach/i86/libem/sar2.s
View file

@ -3,21 +3,31 @@
.define .sar2
.sar2:
pop bx ! return address
! si, descriptor address
! bx, descriptor address
! ax, index
! di, base address
sub ax,(si)
mov cx,4(si)
pop cx
pop dx ! base address
push cx
xchg di,dx ! di = base address, dx is saved di
sub ax,(bx)
mov cx,4(bx)
push dx
imul cx
pop dx
add di,ax
sar cx,1
jnb 1f
pop bx
pop ax
stosb
mov di,dx
jmp bx
1:
pop bx
mov ax,si
mov si,sp
rep movs
mov sp,si
mov si,ax
mov di,dx
jmp bx

31
mach/i86/libem/set.s
View file

@ -8,27 +8,32 @@
pop bx ! return address
xor dx,dx
!ifdef create set
mov di,sp
sub di,cx
sub sp,cx
push bx
push di
mov bx,sp
xor di,di
sar cx,1
1:
push dx
cmp sp,di
ja 1b
mov dx,4(di)(bx)
add di,2
loop 1b
!endif
mov di,8
div di
cmp ax,cx
mov bx,8
div bx
cmp ax,di
jae 2f
mov di,dx
movb dl,bits(di)
mov di,sp
add di,ax
mov si,dx
movb dl,bits(si)
orb (di),dl
jmp bx
orb 4(di),dl
pop di
ret
2:
.extern ESET
.extern .trp
push bx
pop di
mov ax,ESET
push ax
jmp .trp

12
mach/i86/libem/sti.s
View file

@ -3,16 +3,24 @@
.define .sti
! #bytes in cx
! destination address in di
! address in bx
! save di/si. they might be register variables
.sti:
pop bx ! return address
mov dx,di ! save di
pop ax ! return address
mov di,bx
mov bx,ax
sar cx,1
jnb 1f
pop ax
stosb
mov di,dx
jmp bx
1:
mov bx,si
mov si,sp
rep movs
mov sp,si
mov di,dx
mov si,bx
jmp bx

2
mach/i86/libem/xor.s
View file

@ -5,6 +5,7 @@
! #bytes in cx
.xor:
pop bx ! return address
mov dx,di
mov di,sp
add di,cx
sar cx,1
@ -13,4 +14,5 @@
xor ax,(di)
stos
loop 1b
mov di,dx
jmp bx