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yet another bug fix in instructions handling special registers

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This commit is contained in:
ceriel 1990-04-23 12:35:41 +00:00
parent 564bb0b81c
commit fb25b628d6
1 changed files with 6 additions and 6 deletions
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12
mach/i386/as/mach4.c
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@ -144,29 +144,29 @@ oper : NOOP_1
{ {
if ($1 != 1 || !(reg_1 & IS_R32)) if ($1 != 1 || !(reg_1 & IS_R32))
serror("syntax error"); serror("syntax error");
emit1(0xF); emit1(042); emit1(0200|($4<<3)|(reg_1&07));} emit1(0xF); emit1(0x20); emit1(0300|($4<<3)|(reg_1&07));}
| MOV ea_1 ',' RSYSDR | MOV ea_1 ',' RSYSDR
{ {
if ($1 != 1 || !(reg_1 & IS_R32)) if ($1 != 1 || !(reg_1 & IS_R32))
serror("syntax error"); serror("syntax error");
emit1(0xF); emit1(043); emit1(0200|($4<<3)|(reg_1&07));} emit1(0xF); emit1(0x21); emit1(0300|($4<<3)|(reg_1&07));}
| MOV ea_1 ',' RSYSTR | MOV ea_1 ',' RSYSTR
{ {
if ($1 != 1 || !(reg_1 & IS_R32)) if ($1 != 1 || !(reg_1 & IS_R32))
serror("syntax error"); serror("syntax error");
emit1(0xF); emit1(046); emit1(0200|($4<<3)|(reg_1&07));} emit1(0xF); emit1(0x24); emit1(0300|($4<<3)|(reg_1&07));}
| MOV RSYSCR ',' R32 | MOV RSYSCR ',' R32
{ {
if ($1 != 1) serror("syntax error"); if ($1 != 1) serror("syntax error");
emit1(0xF); emit1(040); emit1(0200|($4<<3)|$2);} emit1(0xF); emit1(0x22); emit1(0300|($2<<3)|$4);}
| MOV RSYSDR ',' R32 | MOV RSYSDR ',' R32
{ {
if ($1 != 1) serror("syntax error"); if ($1 != 1) serror("syntax error");
emit1(0xF); emit1(041); emit1(0200|($4<<3)|$2);} emit1(0xF); emit1(0x23); emit1(0300|($2<<3)|$4);}
| MOV RSYSTR ',' R32 | MOV RSYSTR ',' R32
{ {
if ($1 != 1) serror("syntax error"); if ($1 != 1) serror("syntax error");
emit1(0xF); emit1(044); emit1(0200|($4<<3)|$2);} emit1(0xF); emit1(0x26); emit1(0300|($2<<3)|$4);}
/* Intel 80[23]87 coprocessor instructions */ /* Intel 80[23]87 coprocessor instructions */
| FNOOP | FNOOP
{ emit1($1); emit1($1>>8);} { emit1($1); emit1($1>>8);}