From fd27acb487980e715c1adb8298f85f58a0a478b0 Mon Sep 17 00:00:00 2001 From: George Koehler Date: Tue, 24 Sep 2019 10:44:48 -0400 Subject: [PATCH] Fix assembly of bfffo d1[0:32], d3 The assembler wrongly defined _bfexts_ and _bfffo_ with the same bits as _bfextu_; this turned all bfexts and bfffo instructions into bfextu. Motorola's 68k Programmer's Reference Manual (1992) gives different bits for bfexts, but still has wrong bits for bfffo. Change bfexts and bfffo to match the 68k emulators musahi, aranym, syn68k. The bitfield width is from 1 to 32, not 0 to 31, so move the warning from 32 to 0. This doesn't change the warning message, so it will say that 0 is "too big", when 0 is really too small. --- mach/m68020/as/mach2.c | 2 +- mach/m68020/as/mach3.c | 4 ++-- mach/m68020/as/mach4.c | 11 ++++++++--- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/mach/m68020/as/mach2.c b/mach/m68020/as/mach2.c index 4e658ffcc..9a8b4fb44 100644 --- a/mach/m68020/as/mach2.c +++ b/mach/m68020/as/mach2.c @@ -83,6 +83,6 @@ %type bcdx op_ea regs rrange %type reg sizedef sizenon creg -%type off_width abs31 bd_areg_index +%type off_width off31 wid31 bd_areg_index %type areg_index areg scale cp_cond fc mask %type fsize fregs fcregs frlist frrange diff --git a/mach/m68020/as/mach3.c b/mach/m68020/as/mach3.c index e77745707..95311d911 100644 --- a/mach/m68020/as/mach3.c +++ b/mach/m68020/as/mach3.c @@ -68,8 +68,8 @@ {0, BITFIELD, 0166300, "bfclr"}, {0, BITFIELD, 0167300, "bfset"}, {0, BF_TO_D, 0164700, "bfextu"}, -{0, BF_TO_D, 0164700, "bfexts"}, -{0, BF_TO_D, 0164700, "bfffo"}, +{0, BF_TO_D, 0165700, "bfexts"}, +{0, BF_TO_D, 0166700, "bfffo"}, /* not 0164700 */ {0, BFINS, 0167700, "bfins"}, {0, SHIFT, 0160340, "asr"}, diff --git a/mach/m68020/as/mach4.c b/mach/m68020/as/mach4.c index 7638a680e..3103ad5e1 100644 --- a/mach/m68020/as/mach4.c +++ b/mach/m68020/as/mach4.c @@ -225,12 +225,17 @@ creg : CREG off_width /* note: these should be curly brackets, but that would * leave us without brackets for expressions. */ - : '[' abs31 ':' abs31 ']' + : '[' off31 ':' wid31 ']' { $$ = ($2<<6) | $4; } ; -abs31 : DREG { $$ = 040 | $1;} - | absexp { fit(fit5($1)); +off31 : DREG { $$ = 040 | $1;} + | absexp { fit(fit5($1)); /* 0 to 31 */ + $$ = low5($1); + } + ; +wid31 : DREG { $$ = 040 | $1;} + | absexp { fit(fit5($1) - 1); /* 1 to 32 */ $$ = low5($1); } ;