David Given
21898f784a
We're going to need some type inference after all, I think. Let's do a little
...
for now and see how it goes.
2016-10-01 19:10:22 +02:00
David Given
4a3a9a98dc
It doesn't really make a lot of sense to have BURG nonterminal names different
...
to register classes, so combine them. Refactor the map code.
2016-10-01 12:17:14 +02:00
David Given
3a973a19f3
Move fatal(), warning() and aprintf() into the new data module (because they're
...
really useful).
2016-09-30 19:10:30 +02:00
David Given
a0131fdb47
You know what, the type inference stuff is a complete red herring. What this
...
actually needs is a more intelligent register allocator. So, remove the type
inference.
2016-09-29 19:58:02 +02:00
David Given
4572f1b774
Actually, I don't need vregs: hops work just as well. Particularly if I
...
restructure things so that I don't need to walk the blasted ir / burg tree
every time I look at an instruction.
2016-09-27 23:38:47 +02:00
David Given
e77c5164cf
Fleshed out hops and vregs. The result is almost looking like code now ---
...
uncanny.
2016-09-27 00:19:45 +02:00
David Given
c4b8e00ae2
Revamp the array module not to use nasty macros any more. Slightly more verbose
...
to use, but definitely cleaner.
2016-09-26 22:48:58 +02:00
David Given
cc176e5183
Keep more data around about ir instructions. Implement a half-baked type
...
inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
2016-09-26 22:12:46 +02:00
David Given
416b13fd76
Start factoring out the hardware op code.
2016-09-25 23:29:59 +02:00
David Given
67eb21d428
Rename struct insn to struct em (throughout).
2016-09-25 12:29:03 +02:00
David Given
629e0ddfc6
Some instruction selection is now happening.
2016-09-24 22:46:08 +02:00
David Given
bb9aa030a5
Procedure compilation now happens after the entire EM file has been read in (so
...
that we can look inside data blocks which might be defined in the future...
sigh, csa and csb). csa and csb no longer generate invalid IR.
2016-09-24 01:04:00 +02:00
David Given
ed67d427c9
Replaced the block splicer with a trivial block eliminator (which rewrites
...
jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
2016-09-23 23:59:15 +02:00
David Given
f8bbf9e87d
Each pass now lives in its own source file; much cleaner.
2016-09-23 21:07:16 +02:00
David Given
9077baa850
Add a bodged in algorithm for converting basic block communication from stacked
...
variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11
Tracing cleanup. Simplified the IR code. Some more opcodes.
2016-09-22 00:15:48 +02:00
David Given
36d7d1ee4e
Create hacky fake basic blocks for data fragments, used to track which
...
instruction labels descriptor blocks refer to; this allows csa and csb to know
where they're going.
2016-09-20 00:19:39 +02:00
David Given
6ce2495aeb
Store the EM code up front and build the basic block graph *before*
...
generating the IR code. Lots more IR code.
2016-09-19 23:06:59 +02:00
David Given
176cd7365c
Archival checking of the half-written IR treebuilder.
2016-09-18 23:24:54 +02:00
David Given
24380e2a93
Abstract out the EM reader; skeleton of the tree builder.
2016-09-18 00:02:16 +02:00
