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Author SHA1 Message Date
David Given
1e17921208 Implement saving of dirty registers onto the stack. 2016-10-16 22:37:42 +02:00
George Koehler
19f0eb86a4 Remove IND_LABEL_W and IND_LABEL_D 
Because li32 always loads a label into a GPR, it is sufficient to
coerce LABEL to REG, then use IND_RC_W or IND_RC_D for indirection
through the label.
 2016-10-16 16:33:24 -04:00
George Koehler
5b5f774a64 Simplify moves to and from IND_RC_* 
Now that SUM_RC always has a signed 16-bit constant, it happens that
the various IND_RC_* tokens also have a signed 16-bit constant, so
we no longer need to touch the scratch register.
 2016-10-16 16:02:25 -04:00
David Given
486cf9562f Don't need Lua any more. 2016-10-16 20:10:24 +02:00
David Given
1f56bab521 Remember to create the build directory when bootstrapping. 2016-10-16 20:09:52 +02:00
David Given
479a4efa4f Use a self-hosted Lua instead of the system one. 2016-10-16 20:07:54 +02:00
George Koehler
7c64dab491 Refactor how powerpc ncg pushes constants. 
When loc (load constant) pushes a constant, it now checks the value of
the constant and pushes any of 7 tokens.  These tokens allow stack
patterns to recognize 16-bit signed integers (CONST2), 16-bit unsigned
integers (UCONST2), multiples of 0x10000 (CONST_HZ), and other
interesting forms of constants.

Use the new constant tokens in the rules for adi, sbi, and, ior, xor.
Adjust a few other rules to understand the new tokens.

Require that SUM_RC has a signed 16-bit constant, and OR_RC and XOR_RC
each have an unsigned 16-bit constant.  The moves from SUM_RC, OR_RC,
XOR_RC to GPR no longer touch the scratch register, because the
constant is not too big.
 2016-10-16 13:58:54 -04:00
David Given
714d8985c8 Experiments with declarative apt and OSX. 2016-10-16 18:16:30 +02:00
David Given
6a06ce798b Add missing header that was causing builds to fail on Travis. 2016-10-16 17:58:01 +02:00
George Koehler
baa152217e Remove unused parts of mach/powerpc/ncg/table 
Remove unused tokens GPRINDIRECTLO, HILABEL, LOLABEL, LABELI.  Also
remove an #if 0 ... #endif group of patterns.
 2016-10-15 20:00:48 -04:00
David Given
32c53a452d Merge from trunk. 2016-10-16 00:06:14 +02:00
David Given
6a23906ad8 Various bits of cleanup; we should almost be ready to try sending this to the 
assembler soon...
 2016-10-15 23:39:38 +02:00
David Given
286435a2ed Oops, forgot to add the output option spec to the string! 2016-10-15 23:34:54 +02:00
David Given
b36897c299 References to the stack frame are now rendered properly. 2016-10-15 23:33:30 +02:00
David Given
a8ee82d197 Stop passing proc around, and use a global instead --- much cleaner. 2016-10-15 23:19:44 +02:00
David Given
7aa60a6451 Register spilling to the stack frame works, more or less. 2016-10-15 22:53:56 +02:00
David Given
0eb32e7553 Fix yet another bug to do with IR register outputs. 2016-10-15 19:14:25 +02:00
David Given
9504aec2bd Function termination gets routed through an exit block; we now have prologues 
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
 2016-10-15 18:38:46 +02:00
David Given
5ad3aa8595 Add a pile of new instructions used by Pascal; I'm going to need to think about 
how locals and the local base are handled.
 2016-10-15 13:07:59 +02:00
David Given
358c44de35 Bytes were sometimes failing to be sign extended correctly. 2016-10-15 12:11:40 +02:00
David Given
517120d0fb Allow asm names for registers which are different from the friendly names shown 
in the tracing (because PowerPC register names are just numbers).
 2016-10-15 11:42:47 +02:00
David Given
b2ddf12473 Some more opcodes. 2016-10-15 11:22:40 +02:00
George Koehler
29cb008faa In powerpc table, fix macros los() and his(). 
Change the operator in his() from a - minus to a + plus.  When los(n)
becomes negative, then his(n) needs to add 0x10000, not subtract it.

Also change los(n) to do the sign extension, because smalls(los(n))
should be true, not false.

Also change hi(n) and lo(n) to wrap n in parentheses, as (n), because
these are macros and n might still contain operators.
 2016-10-14 23:59:26 -04:00
David Given
bb17aea73a You can now mark a register as corrupting a certain register class; calls work, 
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
 2016-10-15 01:15:08 +02:00
David Given
886adb86d7 Log empty hops. 2016-10-14 23:19:25 +02:00
David Given
4f2177e41f Reworked loads and stores; it's now *different*, maybe not better. 2016-10-14 23:19:02 +02:00
David Given
a63052427e Factor out the register allocation routines to make them easier to deal with. 2016-10-14 23:17:06 +02:00
David Given
bb53a7fb51 Fix stupid issue where hop output registers were being overwritten, leading to 
invalid SSA form.
 2016-10-14 23:12:29 +02:00
David Given
98fe70a7de Output register equality constraints work. 2016-10-14 22:17:02 +02:00
David Given
216ff5cc43 Make loads and stores in the table nicer; fix a place where it looked like it 
was working but only accidentally.
 2016-10-12 23:12:53 +02:00
David Given
f06b51c981 Keep track of register types as well as attributes --- the type being how we 
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
 2016-10-12 22:58:46 +02:00
David Given
4723a1442f Add code to remove unused phis, converting to pruned SSA form, to avoid 
confusing the register allocator later.
 2016-10-12 21:50:12 +02:00
David Given
df239b3f90 Don't allow the same IR to be added to the sequence list more than once 
(sometimes happens because op_dup, but makes no sense).
 2016-10-12 00:45:36 +02:00
David Given
96dffd2007 Clean up the allocator a bit, in preparation for making it lots more 
complicated; no semantic changes.
 2016-10-11 23:17:30 +02:00
David Given
668cccdff1 A few more opcodes. 2016-10-11 00:29:18 +02:00
David Given
2be1c51885 A little fiddling with store instructions. The PowerPC is not friendly to 
iburg.
 2016-10-11 00:23:35 +02:00
David Given
e93c58dc8d Refactored the way hops are rendered; add support for emitting code (although 
with no prologue or epilogue yet).
 2016-10-11 00:12:11 +02:00
David Given
92bd1ac5f4 Register allocator now gets all the way through all of my test file without 
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
 2016-10-10 23:19:46 +02:00
David Given
a4d06d1795 D'oh, need multiple passes over the edge splitter in order to properly find all 
cases.
 2016-10-10 23:18:37 +02:00
David Given
fac12aae32 Calculate phi congruency groups; use them to solve the 
importing-hreg-from-the-future problem (probably poorly).
 2016-10-09 22:04:20 +02:00
David Given
ff58a6100f Add pmap_remove(). 2016-10-09 22:03:44 +02:00
David Given
23c3575f0f The register allocator now makes a spirited attempt to honour register 
attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
 2016-10-09 15:09:34 +02:00
David Given
38de688c5a Floating point promotion was broken since the IR float change. Fix. 2016-10-09 15:08:03 +02:00
David Given
36cddd6afb Add some more opcodes; rearrange the registers to be more PowerPC-friendly. 2016-10-09 14:45:13 +02:00
David Given
cfe5312fcc Predicates can now take numeric arguments. The PowerPC predicates have been 
turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
 2016-10-09 12:32:36 +02:00
David Given
d75cc0a663 Basic register allocation works! 2016-10-08 23:32:54 +02:00
David Given
4261744537 Replace pmap_get() with pmap_findleft() and pmap_findright(), to allow lookups 
in both directions.
 2016-10-08 23:32:13 +02:00
David Given
637aeed70a Only allocate an output vreg if the instruction actually wants one. 2016-10-08 12:15:21 +02:00
David Given
2198db69b1 Instruction predicates work now. 2016-10-08 11:35:33 +02:00
David Given
9ebf731335 Minor cleanup. 2016-10-08 11:07:28 +02:00