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Author SHA1 Message Date
David Given 2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value 
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
 2016-10-29 11:57:56 +02:00
David Given bfa65168e2 Don't generate phis if unnecessary (because this breaks the 
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
 2016-10-29 10:55:48 +02:00
David Given 658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with 
labels that are the same name as instructions...).
 2016-10-27 23:17:16 +02:00
David Given 81525c0f2c Swaps work (at least for registers). More opcodes. Rearrange the stack layout 
so we can always trivially find fp, which lets CHAINFP work.
 2016-10-27 21:50:58 +02:00
David Given be3dece5af Allow emission of strings containing ". 2016-10-27 21:48:46 +02:00
David Given 51bd3ee4dd Fix bug where some phis weren't being inserted when a given variable definition 
needed more than one phi (due to the dominance frontier containing more than
one basic block).
 2016-10-27 21:40:25 +02:00
David Given 9977ce841a Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a 
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
 2016-10-25 23:04:20 +02:00
David Given 45a7f2e993 Phi copies are now inserted as part of type inference. More opcodes. 2016-10-24 22:14:08 +02:00
David Given 111c13e253 More opcodes. 2016-10-24 20:15:22 +02:00
David Given a4644dee4d More opcodes. 2016-10-24 12:08:40 +02:00
David Given b22780c075 More opcodes, including the difficult and fairly stupid los/sts. 2016-10-23 22:24:08 +02:00
David Given abd0cedd61 Massive change to how IR types are handled; we use the type code for matching 
rather than the size. Much cleaner and simpler.
 2016-10-23 21:54:14 +02:00
David Given b1a3d76d6f Re-re-add the type inference layer, now I know more about how things work. 
Remove that terrible float promotion code.
 2016-10-22 23:04:13 +02:00
David Given 11b0bc1055 More opcodes. 2016-10-22 20:32:51 +02:00
David Given 2d52b1fdaa Remove GETRET; values are now returned directly by CALL. Fix a bug in 
convertstackops which was resulting in duplicate IR groups.
 2016-10-22 12:13:57 +02:00
David Given ceb938fb3c More opcodes. 2016-10-22 11:26:28 +02:00
David Given 7ae888b754 Hacky workaround the way the Modula-2 compiler generates non-standard sized 
loads and saves. More opcodes; simplified table using macros.
 2016-10-22 10:48:22 +02:00
David Given 90d0661639 Typo fix. 2016-10-22 00:48:55 +02:00
David Given f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias 
stuff.
 2016-10-22 00:02:15 +02:00
David Given 4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers. 
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
 2016-10-21 23:31:00 +02:00
David Given e4fec71f9c Lots more opcodes; better eviction behaviour; better register moves. Lots more 
PowerPC stuff (some working).
 2016-10-19 23:29:05 +02:00
David Given ffb1eabf45 Floating point promotion is less buggy. 2016-10-19 23:27:53 +02:00
David Given d5071e7df1 Promote values accessed via NOP. 2016-10-18 23:58:03 +02:00
David Given 5413d47029 '!' tracing is now always emitted; tracing goes to stderr. 2016-10-18 22:32:09 +02:00
David Given 3520704ea8 Add support for floating point constants. 2016-10-18 22:29:42 +02:00
David Given 938fb8c2fc Lots more opcodes. 2016-10-18 00:31:26 +02:00
David Given 4a093b9eba Add li and mr pseudoinstructions. 2016-10-18 00:21:32 +02:00
David Given 5f0164db62 Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating 
*some* code.
 2016-10-17 00:06:06 +02:00
David Given d539389e81 Merge in the unfinished PowerPC branch. 2016-10-16 22:38:27 +02:00
David Given 1e17921208 Implement saving of dirty registers onto the stack. 2016-10-16 22:37:42 +02:00
David Given 6a23906ad8 Various bits of cleanup; we should almost be ready to try sending this to the 
assembler soon...
 2016-10-15 23:39:38 +02:00
David Given 286435a2ed Oops, forgot to add the output option spec to the string! 2016-10-15 23:34:54 +02:00
David Given b36897c299 References to the stack frame are now rendered properly. 2016-10-15 23:33:30 +02:00
David Given a8ee82d197 Stop passing proc around, and use a global instead --- much cleaner. 2016-10-15 23:19:44 +02:00
David Given 7aa60a6451 Register spilling to the stack frame works, more or less. 2016-10-15 22:53:56 +02:00
David Given 0eb32e7553 Fix yet another bug to do with IR register outputs. 2016-10-15 19:14:25 +02:00
David Given 9504aec2bd Function termination gets routed through an exit block; we now have prologues 
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
 2016-10-15 18:38:46 +02:00
David Given 5ad3aa8595 Add a pile of new instructions used by Pascal; I'm going to need to think about 
how locals and the local base are handled.
 2016-10-15 13:07:59 +02:00
David Given 358c44de35 Bytes were sometimes failing to be sign extended correctly. 2016-10-15 12:11:40 +02:00
David Given 517120d0fb Allow asm names for registers which are different from the friendly names shown 
in the tracing (because PowerPC register names are just numbers).
 2016-10-15 11:42:47 +02:00
David Given b2ddf12473 Some more opcodes. 2016-10-15 11:22:40 +02:00
David Given bb17aea73a You can now mark a register as corrupting a certain register class; calls work, 
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
 2016-10-15 01:15:08 +02:00
David Given 886adb86d7 Log empty hops. 2016-10-14 23:19:25 +02:00
David Given 4f2177e41f Reworked loads and stores; it's now *different*, maybe not better. 2016-10-14 23:19:02 +02:00
David Given a63052427e Factor out the register allocation routines to make them easier to deal with. 2016-10-14 23:17:06 +02:00
David Given bb53a7fb51 Fix stupid issue where hop output registers were being overwritten, leading to 
invalid SSA form.
 2016-10-14 23:12:29 +02:00
David Given 98fe70a7de Output register equality constraints work. 2016-10-14 22:17:02 +02:00
David Given 216ff5cc43 Make loads and stores in the table nicer; fix a place where it looked like it 
was working but only accidentally.
 2016-10-12 23:12:53 +02:00
David Given f06b51c981 Keep track of register types as well as attributes --- the type being how we 
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
 2016-10-12 22:58:46 +02:00