David Given
efab08178b
Fix a bunch of issues with pushing and popping mismatched sizes, which the B
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compiler does a lot; dup 8 for pairs of words is now optimised.
2017-01-07 18:47:00 +01:00
David Given
7710c76d56
Introduce sequence points before store instructions to prevent loads from the
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same address being delayed until after the store (at which point they'll return
the wrong value).
2017-01-07 13:17:39 +01:00
David Given
953c08839f
inn works now; add a helper for it.
2016-11-20 12:53:44 +01:00
David Given
196fa914b3
lxa now works, I hope; traps are better (and stubbed out on qemuppc).
2016-11-20 11:57:21 +01:00
David Given
d5328492d7
Better handling of float conversions; more tests; converting to unsigned ints
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works now.
2016-11-20 11:27:40 +01:00
David Given
d31bc6a3f9
Made csa and csb work with mcg; adjust the libem functions and the
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corresponding invocation in the ncg table so the same helpers can be used for
both mcg and ncg. Add a new IR opcode, FARJUMP, which jumps to a helper
function but saves volatile registers.
2016-11-19 10:55:41 +01:00
David Given
43439c6d0c
Remember to push the result of lor onto the stack.
2016-11-17 22:04:32 +01:00
David Given
0289b1004e
Allow values left on the stack at the end of the procedure (it's legal!).
2016-11-14 21:47:49 +01:00
David Given
e3ebf986e9
More opcodes.
2016-10-29 13:32:09 +02:00
David Given
61349389fb
More opcodes. sti can now cope with non-standard sizes (really need a better
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fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
2016-10-29 12:48:05 +02:00
David Given
2cc2c0ae98
Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value
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(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
2016-10-29 11:57:56 +02:00
David Given
111c13e253
More opcodes.
2016-10-24 20:15:22 +02:00
David Given
a4644dee4d
More opcodes.
2016-10-24 12:08:40 +02:00
David Given
b22780c075
More opcodes, including the difficult and fairly stupid los/sts.
2016-10-23 22:24:08 +02:00
David Given
abd0cedd61
Massive change to how IR types are handled; we use the type code for matching
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rather than the size. Much cleaner and simpler.
2016-10-23 21:54:14 +02:00
David Given
11b0bc1055
More opcodes.
2016-10-22 20:32:51 +02:00
David Given
2d52b1fdaa
Remove GETRET; values are now returned directly by CALL. Fix a bug in
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convertstackops which was resulting in duplicate IR groups.
2016-10-22 12:13:57 +02:00
David Given
ceb938fb3c
More opcodes.
2016-10-22 11:26:28 +02:00
David Given
7ae888b754
Hacky workaround the way the Modula-2 compiler generates non-standard sized
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loads and saves. More opcodes; simplified table using macros.
2016-10-22 10:48:22 +02:00
David Given
90d0661639
Typo fix.
2016-10-22 00:48:55 +02:00
David Given
f851ab83af
Better (and more correct) floating point conversions; fif; various new opcodes.
2016-10-22 00:48:26 +02:00
David Given
d535be87b1
fef4 and fef8 is now cleaner, albeit slower; add some more register alias
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stuff.
2016-10-22 00:02:15 +02:00
David Given
4db402f229
Add (pretty crummy) support for register aliases and static pairs of registers.
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We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
2016-10-21 23:31:00 +02:00
David Given
e4fec71f9c
Lots more opcodes; better eviction behaviour; better register moves. Lots more
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PowerPC stuff (some working).
2016-10-19 23:29:05 +02:00
David Given
938fb8c2fc
Lots more opcodes.
2016-10-18 00:31:26 +02:00
David Given
5f0164db62
Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating
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*some* code.
2016-10-17 00:06:06 +02:00
David Given
a8ee82d197
Stop passing proc around, and use a global instead --- much cleaner.
2016-10-15 23:19:44 +02:00
David Given
7aa60a6451
Register spilling to the stack frame works, more or less.
2016-10-15 22:53:56 +02:00
David Given
9504aec2bd
Function termination gets routed through an exit block; we now have prologues
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and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 18:38:46 +02:00
David Given
5ad3aa8595
Add a pile of new instructions used by Pascal; I'm going to need to think about
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how locals and the local base are handled.
2016-10-15 13:07:59 +02:00
David Given
b2ddf12473
Some more opcodes.
2016-10-15 11:22:40 +02:00
David Given
df239b3f90
Don't allow the same IR to be added to the sequence list more than once
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(sometimes happens because op_dup, but makes no sense).
2016-10-12 00:45:36 +02:00
David Given
668cccdff1
A few more opcodes.
2016-10-11 00:29:18 +02:00
David Given
36cddd6afb
Add some more opcodes; rearrange the registers to be more PowerPC-friendly.
2016-10-09 14:45:13 +02:00
David Given
8fedf5a0a8
Added support for the op_bXX conditional branch instructions.
2016-10-04 23:28:16 +02:00
David Given
79d4ab1d96
Add zrl opcode. Keep track of local sizes as well as offsets.
2016-10-02 16:08:46 +02:00
David Given
bf73fcdb64
Add inl and del opcodes.
2016-10-02 14:44:21 +02:00
David Given
b298c27c63
Refactor mcg.h as it's getting a bit big; keep track of register variables.
2016-10-02 00:30:33 +02:00
David Given
a3cfe6047f
More rigorous dealing of IR groups; no need for is_generated and is_root any
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more (but now passes are required to set IR roots properly when changing
instructions).
2016-10-01 22:58:29 +02:00
David Given
0d246c0d73
Much better handling of fragments (no run-time code needed to distinguish them
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from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
2016-09-29 22:06:04 +02:00
David Given
c4b8e00ae2
Revamp the array module not to use nasty macros any more. Slightly more verbose
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to use, but definitely cleaner.
2016-09-26 22:48:58 +02:00
David Given
67eb21d428
Rename struct insn to struct em (throughout).
2016-09-25 12:29:03 +02:00
David Given
629e0ddfc6
Some instruction selection is now happening.
2016-09-24 22:46:08 +02:00
David Given
bb9aa030a5
Procedure compilation now happens after the entire EM file has been read in (so
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that we can look inside data blocks which might be defined in the future...
sigh, csa and csb). csa and csb no longer generate invalid IR.
2016-09-24 01:04:00 +02:00
David Given
ed67d427c9
Replaced the block splicer with a trivial block eliminator (which rewrites
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jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
2016-09-23 23:59:15 +02:00
David Given
9077baa850
Add a bodged in algorithm for converting basic block communication from stacked
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variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11
Tracing cleanup. Simplified the IR code. Some more opcodes.
2016-09-22 00:15:48 +02:00
David Given
36d7d1ee4e
Create hacky fake basic blocks for data fragments, used to track which
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instruction labels descriptor blocks refer to; this allows csa and csb to know
where they're going.
2016-09-20 00:19:39 +02:00
David Given
dcba03646b
Treebuilder now gets to the bottom of my test file, merrily generating
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(probably horribly broken) IR.
2016-09-19 23:30:41 +02:00
David Given
6ce2495aeb
Store the EM code up front and build the basic block graph *before*
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generating the IR code. Lots more IR code.
2016-09-19 23:06:59 +02:00