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Author SHA1 Message Date
David Given acaae765af Emit negative constants correctly. 2016-10-29 12:55:21 +02:00
David Given 61349389fb More opcodes. sti can now cope with non-standard sizes (really need a better 
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
 2016-10-29 12:48:05 +02:00
David Given 2cc2c0ae98 Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value 
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
 2016-10-29 11:57:56 +02:00
David Given bfa65168e2 Don't generate phis if unnecessary (because this breaks the 
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
 2016-10-29 10:55:48 +02:00
David Given 658db4ba71 Mangle label names (turns out that the ACK assembler can't really cope with 
labels that are the same name as instructions...).
 2016-10-27 23:17:16 +02:00
David Given 81525c0f2c Swaps work (at least for registers). More opcodes. Rearrange the stack layout 
so we can always trivially find fp, which lets CHAINFP work.
 2016-10-27 21:50:58 +02:00
David Given be3dece5af Allow emission of strings containing ". 2016-10-27 21:48:46 +02:00
David Given 51bd3ee4dd Fix bug where some phis weren't being inserted when a given variable definition 
needed more than one phi (due to the dominance frontier containing more than
one basic block).
 2016-10-27 21:40:25 +02:00
David Given 9977ce841a Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a 
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
 2016-10-25 23:04:20 +02:00
David Given 45a7f2e993 Phi copies are now inserted as part of type inference. More opcodes. 2016-10-24 22:14:08 +02:00
David Given 111c13e253 More opcodes. 2016-10-24 20:15:22 +02:00
David Given a4644dee4d More opcodes. 2016-10-24 12:08:40 +02:00
David Given b22780c075 More opcodes, including the difficult and fairly stupid los/sts. 2016-10-23 22:24:08 +02:00
David Given abd0cedd61 Massive change to how IR types are handled; we use the type code for matching 
rather than the size. Much cleaner and simpler.
 2016-10-23 21:54:14 +02:00
David Given b1a3d76d6f Re-re-add the type inference layer, now I know more about how things work. 
Remove that terrible float promotion code.
 2016-10-22 23:04:13 +02:00
David Given 11b0bc1055 More opcodes. 2016-10-22 20:32:51 +02:00
David Given 2d52b1fdaa Remove GETRET; values are now returned directly by CALL. Fix a bug in 
convertstackops which was resulting in duplicate IR groups.
 2016-10-22 12:13:57 +02:00
David Given ceb938fb3c More opcodes. 2016-10-22 11:26:28 +02:00
David Given 7ae888b754 Hacky workaround the way the Modula-2 compiler generates non-standard sized 
loads and saves. More opcodes; simplified table using macros.
 2016-10-22 10:48:22 +02:00
David Given 90d0661639 Typo fix. 2016-10-22 00:48:55 +02:00
David Given f851ab83af Better (and more correct) floating point conversions; fif; various new opcodes. 2016-10-22 00:48:26 +02:00
David Given d535be87b1 fef4 and fef8 is now cleaner, albeit slower; add some more register alias 
stuff.
 2016-10-22 00:02:15 +02:00
David Given 4db402f229 Add (pretty crummy) support for register aliases and static pairs of registers. 
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
 2016-10-21 23:31:00 +02:00
David Given e4fec71f9c Lots more opcodes; better eviction behaviour; better register moves. Lots more 
PowerPC stuff (some working).
 2016-10-19 23:29:05 +02:00
David Given ffb1eabf45 Floating point promotion is less buggy. 2016-10-19 23:27:53 +02:00
David Given d5071e7df1 Promote values accessed via NOP. 2016-10-18 23:58:03 +02:00
David Given 5413d47029 '!' tracing is now always emitted; tracing goes to stderr. 2016-10-18 22:32:09 +02:00
David Given 3520704ea8 Add support for floating point constants. 2016-10-18 22:29:42 +02:00
David Given 938fb8c2fc Lots more opcodes. 2016-10-18 00:31:26 +02:00
David Given 4a093b9eba Add li and mr pseudoinstructions. 2016-10-18 00:21:32 +02:00
David Given 5f0164db62 Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating 
*some* code.
 2016-10-17 00:06:06 +02:00
David Given 1e17921208 Implement saving of dirty registers onto the stack. 2016-10-16 22:37:42 +02:00
David Given 6a23906ad8 Various bits of cleanup; we should almost be ready to try sending this to the 
assembler soon...
 2016-10-15 23:39:38 +02:00
David Given 286435a2ed Oops, forgot to add the output option spec to the string! 2016-10-15 23:34:54 +02:00
David Given b36897c299 References to the stack frame are now rendered properly. 2016-10-15 23:33:30 +02:00
David Given a8ee82d197 Stop passing proc around, and use a global instead --- much cleaner. 2016-10-15 23:19:44 +02:00
David Given 7aa60a6451 Register spilling to the stack frame works, more or less. 2016-10-15 22:53:56 +02:00
David Given 0eb32e7553 Fix yet another bug to do with IR register outputs. 2016-10-15 19:14:25 +02:00
David Given 9504aec2bd Function termination gets routed through an exit block; we now have prologues 
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
 2016-10-15 18:38:46 +02:00
David Given 5ad3aa8595 Add a pile of new instructions used by Pascal; I'm going to need to think about 
how locals and the local base are handled.
 2016-10-15 13:07:59 +02:00
David Given 358c44de35 Bytes were sometimes failing to be sign extended correctly. 2016-10-15 12:11:40 +02:00
David Given 517120d0fb Allow asm names for registers which are different from the friendly names shown 
in the tracing (because PowerPC register names are just numbers).
 2016-10-15 11:42:47 +02:00
David Given b2ddf12473 Some more opcodes. 2016-10-15 11:22:40 +02:00
David Given bb17aea73a You can now mark a register as corrupting a certain register class; calls work, 
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
 2016-10-15 01:15:08 +02:00
David Given 886adb86d7 Log empty hops. 2016-10-14 23:19:25 +02:00
David Given 4f2177e41f Reworked loads and stores; it's now *different*, maybe not better. 2016-10-14 23:19:02 +02:00
David Given a63052427e Factor out the register allocation routines to make them easier to deal with. 2016-10-14 23:17:06 +02:00
David Given bb53a7fb51 Fix stupid issue where hop output registers were being overwritten, leading to 
invalid SSA form.
 2016-10-14 23:12:29 +02:00
David Given 98fe70a7de Output register equality constraints work. 2016-10-14 22:17:02 +02:00
David Given 216ff5cc43 Make loads and stores in the table nicer; fix a place where it looked like it 
was working but only accidentally.
 2016-10-12 23:12:53 +02:00
David Given f06b51c981 Keep track of register types as well as attributes --- the type being how we 
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
 2016-10-12 22:58:46 +02:00
David Given 4723a1442f Add code to remove unused phis, converting to pruned SSA form, to avoid 
confusing the register allocator later.
 2016-10-12 21:50:12 +02:00
David Given df239b3f90 Don't allow the same IR to be added to the sequence list more than once 
(sometimes happens because op_dup, but makes no sense).
 2016-10-12 00:45:36 +02:00
David Given 96dffd2007 Clean up the allocator a bit, in preparation for making it lots more 
complicated; no semantic changes.
 2016-10-11 23:17:30 +02:00
David Given 668cccdff1 A few more opcodes. 2016-10-11 00:29:18 +02:00
David Given 2be1c51885 A little fiddling with store instructions. The PowerPC is not friendly to 
iburg.
 2016-10-11 00:23:35 +02:00
David Given e93c58dc8d Refactored the way hops are rendered; add support for emitting code (although 
with no prologue or epilogue yet).
 2016-10-11 00:12:11 +02:00
David Given 92bd1ac5f4 Register allocator now gets all the way through all of my test file without 
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
 2016-10-10 23:19:46 +02:00
David Given a4d06d1795 D'oh, need multiple passes over the edge splitter in order to properly find all 
cases.
 2016-10-10 23:18:37 +02:00
David Given fac12aae32 Calculate phi congruency groups; use them to solve the 
importing-hreg-from-the-future problem (probably poorly).
 2016-10-09 22:04:20 +02:00
David Given 23c3575f0f The register allocator now makes a spirited attempt to honour register 
attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
 2016-10-09 15:09:34 +02:00
David Given 38de688c5a Floating point promotion was broken since the IR float change. Fix. 2016-10-09 15:08:03 +02:00
David Given 36cddd6afb Add some more opcodes; rearrange the registers to be more PowerPC-friendly. 2016-10-09 14:45:13 +02:00
David Given cfe5312fcc Predicates can now take numeric arguments. The PowerPC predicates have been 
turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
 2016-10-09 12:32:36 +02:00
David Given d75cc0a663 Basic register allocation works! 2016-10-08 23:32:54 +02:00
David Given 637aeed70a Only allocate an output vreg if the instruction actually wants one. 2016-10-08 12:15:21 +02:00
David Given 2198db69b1 Instruction predicates work now. 2016-10-08 11:35:33 +02:00
David Given 9ebf731335 Minor cleanup. 2016-10-08 11:07:28 +02:00
David Given 9db902314b Fix bug where pushes were being placed in the wrong blocks. 2016-10-08 10:21:24 +02:00
George Koehler 65c2a8a0ae Remove stackadjust and stackoffset() from ncg. 
This feature has never been used since its introduction, more than 3
years ago, in David Given's commit c93cb69 of May 8, 2013.  The commit
was for "PowerPC and M68K work".  I am not undoing the entire commit.
I am only removing the stackadjust and stackoffset() feature.

This commit removes the feature from my branch kernigh-linuxppc.  This
removal includes the mach/proto/ncg parts.  The default branch already
removed most of the feature, but kept the mach/proto/ncg parts.  That
removal happened in commit 81778b6 of May 13, 2013 (which was a merge;
git diff af0dede 81778b6).  The branch dtrg-experimental-powerpc
merged the default branch but without the removal.  That merge was
commit 4703db0f of Sep 15, 2016 (git diff 8c94b13 4703db0).  My branch
kernigh-linuxppc is off branch dtrg-experimental-powerpc, so I can no
longer get the removal by merging default.

David Given described the stackadjust feature in
  https://sourceforge.net/p/tack/mailman/message/30814691/

The instruction stackadjust would add a value to the offset, and the
function stackoffset() would return this offset.  One would use this
to track sp - fp, then omit the frame pointer by not keeping fp in a
register.
 2016-10-07 20:52:13 -04:00
David Given 4e49830e09 Overhaul of everything phi related; critical edge splitting now happens before 
anything SSA happens; liveness calculations now look like they might be
working.
 2016-10-08 00:21:23 +02:00
David Given ee93389c5f Refactor the cfg and dominance stuff to make it a lot nicer. 2016-10-06 21:34:21 +02:00
David Given d20b63dc94 The register allocator is really a pass, so arrange the code like one. 2016-10-05 23:55:38 +02:00
David Given 87e004e4a9 Warning fix. 2016-10-05 23:55:04 +02:00
David Given 21034c0d65 No, dammit, for register allocation I need to walk the blocks in *dominance* 
order. Since the dominance tree has changed when I fiddled with the graph, I
need to recompute it, so factor it out of the SSA pass. Code is uglier than I'd
like but at least the RET statement goes last in the generated code now.
 2016-10-05 23:52:54 +02:00
David Given d95c75dfd7 Allowing an input filename on the command line makes debuggers happy. (Then we 
don't need to redirect stdin.)
 2016-10-05 23:24:29 +02:00
David Given 88fb231d6e Better constraint syntax; mcgg now passes register usage information up to mcg; 
mcg can track individual hop inputs and outputs (needed for live range
analysis!); the register allocator now puts the basic blocks into the right
order in preparation for live range analysis.
 2016-10-05 22:56:25 +02:00
David Given 7a6fc7a72b Made sure that all files end in vim magic. 2016-10-05 21:07:29 +02:00
David Given 92502901a7 Better management of register data. Add struct hreg. 2016-10-05 21:00:28 +02:00
David Given ac62c34e19 Add a pass to do critical edge splitting. 2016-10-04 23:42:00 +02:00
David Given 8fedf5a0a8 Added support for the op_bXX conditional branch instructions. 2016-10-04 23:28:16 +02:00
David Given 249855ed23 Fix the horror of the startup code; now uses getopt and stuff and the debug 
flags can be set as an option.
 2016-10-04 22:36:01 +02:00
David Given ac063a6f54 Remove unused variable (reduce memory usage by 1/10). 2016-10-04 22:35:08 +02:00
David Given c6f576f758 Bodge in enough phi support to let the instruction generator complete on basic 
programs.
 2016-10-04 21:58:31 +02:00
David Given e13ff5be31 Don't allocate new vregs for REG and NOP --- a bit hacky, but suppresses stray 
movs very effectively.
 2016-10-04 21:29:03 +02:00
David Given bd28bddb92 Massive rewrite of how emitters and the instruction selector works, after I 
realised that the existing approach wasn't working. Now, hopefully, tracks the
instruction trees generated during selection properly.
 2016-10-04 00:16:06 +02:00
David Given 68f98cbad7 Instruction selection now happens on a shadow tree, rather than on the IR tree 
itself. Currently it's semantically the same but the implementation is cleaner.
 2016-10-03 20:52:36 +02:00
David Given 288ee56203 Get quite a long way towards basic output-register equality constraints (needed 
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
 2016-10-02 23:25:54 +02:00
David Given 3aa30e50d1 Come up with a syntax for register constraints. 2016-10-02 21:51:25 +02:00
David Given c079e97492 Perform SSA conversion of locals. Much, *much* better code now, at least 
inasmuch as it looks better before register allocation. Basic blocks now know
their own successors and predecessors (after a certain point in the IR
processing).
 2016-10-02 17:50:34 +02:00
David Given 79d4ab1d96 Add zrl opcode. Keep track of local sizes as well as offsets. 2016-10-02 16:08:46 +02:00
David Given bf73fcdb64 Add inl and del opcodes. 2016-10-02 14:44:21 +02:00
David Given b298c27c63 Refactor mcg.h as it's getting a bit big; keep track of register variables. 2016-10-02 00:30:33 +02:00
David Given 06059233da Make betterer. 2016-10-01 23:41:45 +02:00
David Given 65e75be42d Fix edge case where leftover pushes would occasionally cause infinite loops in 
the analysis.
 2016-10-01 23:41:35 +02:00
David Given 73d7e89c32 Show expression trees correctly. 2016-10-01 23:41:03 +02:00
David Given 3474e20274 Deal with malformed mes instructions emitted by ego. 2016-10-01 23:13:39 +02:00
David Given a3cfe6047f More rigorous dealing of IR groups; no need for is_generated and is_root any 
more (but now passes are required to set IR roots properly when changing
instructions).
 2016-10-01 22:58:29 +02:00
David Given 21898f784a We're going to need some type inference after all, I think. Let's do a little 
for now and see how it goes.
 2016-10-01 19:10:22 +02:00
David Given 91e277e046 Predicates work; we now have prefers and requires clauses. Predicates must be 
functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
 2016-10-01 13:56:52 +02:00