George Koehler
0fc0faef08
Restore an assignment deleted in commit 789f79b.
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Because of the accidental deletion, mcgg on my machine followed a
garbage pointer, and never wrote calls to emit_fragment.
A wrong call to `data->emit_reg(0, 0)` instead of the correct
`data->emit_fragment(0)` caused PowerPC mcg to emit an empty string
instead of `8(fp)`, causing a syntax error in PowerPC as.
The wrong `data->emit_reg(0, 0)` called the function emit_reg() in
mach/proto/mcg/pass_instructionselection.c, but that function
unfortunately has `if (vreg) { ... }`. The call had vreg == NULL
because the fragment wasn't a vreg, but emit_reg() ignored the problem
and emit nothing.
2017-11-07 23:52:52 -05:00
David Given
789f79b369
Ansification, warning fixes, C89ification.
2017-08-06 12:42:17 +02:00
David Given
a311e61360
Add support for preserved registers.
2016-10-29 20:22:44 +02:00
David Given
9977ce841a
Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a
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register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
2016-10-25 23:04:20 +02:00
David Given
abd0cedd61
Massive change to how IR types are handled; we use the type code for matching
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rather than the size. Much cleaner and simpler.
2016-10-23 21:54:14 +02:00
David Given
4db402f229
Add (pretty crummy) support for register aliases and static pairs of registers.
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We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
2016-10-21 23:31:00 +02:00
David Given
d6984d60ac
Add parsing support for register aliases.
2016-10-20 21:47:28 +02:00
David Given
9504aec2bd
Function termination gets routed through an exit block; we now have prologues
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and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
2016-10-15 18:38:46 +02:00
David Given
517120d0fb
Allow asm names for registers which are different from the friendly names shown
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in the tracing (because PowerPC register names are just numbers).
2016-10-15 11:42:47 +02:00
David Given
bb17aea73a
You can now mark a register as corrupting a certain register class; calls work,
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or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
2016-10-15 01:15:08 +02:00
David Given
98fe70a7de
Output register equality constraints work.
2016-10-14 22:17:02 +02:00
David Given
f06b51c981
Keep track of register types as well as attributes --- the type being how we
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find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
2016-10-12 22:58:46 +02:00
David Given
23c3575f0f
The register allocator now makes a spirited attempt to honour register
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attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
2016-10-09 15:09:34 +02:00
David Given
cfe5312fcc
Predicates can now take numeric arguments. The PowerPC predicates have been
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turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
2016-10-09 12:32:36 +02:00
David Given
2198db69b1
Instruction predicates work now.
2016-10-08 11:35:33 +02:00
David Given
88fb231d6e
Better constraint syntax; mcgg now passes register usage information up to mcg;
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mcg can track individual hop inputs and outputs (needed for live range
analysis!); the register allocator now puts the basic blocks into the right
order in preparation for live range analysis.
2016-10-05 22:56:25 +02:00
David Given
92502901a7
Better management of register data. Add struct hreg.
2016-10-05 21:00:28 +02:00
David Given
8d4186130d
Oops --- hadn't updated the nts array for the new child order.
2016-10-04 21:32:28 +02:00
David Given
bd28bddb92
Massive rewrite of how emitters and the instruction selector works, after I
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realised that the existing approach wasn't working. Now, hopefully, tracks the
instruction trees generated during selection properly.
2016-10-04 00:16:06 +02:00
David Given
288ee56203
Get quite a long way towards basic output-register equality constraints (needed
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to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
2016-10-02 23:25:54 +02:00
David Given
3aa30e50d1
Come up with a syntax for register constraints.
2016-10-02 21:51:25 +02:00
David Given
91e277e046
Predicates work; we now have prefers and requires clauses. Predicates must be
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functions. Not convinced that semantic types are actually working --- there are
still problems with earlier statements leaving things in the wrong registers.
2016-10-01 13:56:52 +02:00
David Given
4a3a9a98dc
It doesn't really make a lot of sense to have BURG nonterminal names different
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to register classes, so combine them. Refactor the map code.
2016-10-01 12:17:14 +02:00
David Given
3a973a19f3
Move fatal(), warning() and aprintf() into the new data module (because they're
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really useful).
2016-09-30 19:10:30 +02:00
David Given
b32883b013
More properly keep track of register classes.
2016-09-29 22:32:43 +02:00
David Given
b27758b7de
Error check fragment rules which don't emit anything.
2016-09-29 22:14:11 +02:00
David Given
0d246c0d73
Much better handling of fragments (no run-time code needed to distinguish them
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from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
2016-09-29 22:06:04 +02:00
David Given
cc176e5183
Keep more data around about ir instructions. Implement a half-baked type
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inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
2016-09-26 22:12:46 +02:00
David Given
39aa672422
Sort of keep track of registers and register classes. Start walking the
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generated instruction tree --- holy cow, they look like instructions!
2016-09-25 22:17:14 +02:00
David Given
bde5792b1a
Collapse several rule arrays into one; actually generate the array properly.
2016-09-25 17:14:54 +02:00
David Given
bcc74ba18d
Stupid stringlist is stupid. Use a proper data structure, properly abstracted
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out (so other things can use it).
2016-09-25 12:18:39 +02:00
David Given
9f78e0b36b
Rethink the way patterns are mapped to rules; generate emitters (probably
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badly).
2016-09-25 11:49:51 +02:00
David Given
7c028bdd45
We now record the code fragments to be emitted by each rule.
2016-09-25 00:21:46 +02:00
David Given
629e0ddfc6
Some instruction selection is now happening.
2016-09-24 22:46:08 +02:00
David Given
c8fcbe282a
More grammar changes.
2016-09-24 19:03:55 +02:00
David Given
2acc4ed29d
IR codes are now owned by mcgg; ir terminals are inserted into the table during
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compilation (so you can refer to them).
2016-09-24 18:31:35 +02:00
David Given
1516657907
Crudely bolt on mcgg to mcg itself.
2016-09-24 17:20:40 +02:00
David Given
13132128a1
Parameters are parsed with getopt. Simplify, constify.
2016-09-24 16:59:49 +02:00
David Given
434eafd35d
Change the predicate stuff to use costs instead; now you can use when clauses
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on leaves. Remove an iburg premature optimisation (required for above).
2016-09-24 13:33:59 +02:00
David Given
960259f0b0
Add support for labelled tree nodes.
2016-09-24 12:11:30 +02:00
David Given
4546dd5f22
Massive grammar overhaul and refactor. Hacked in support for predicates, where
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instructions can be turned on and off based on their parameters. New lexer
using a lexer. Now quite a lot of the way towards being a real instruction
selector.
2016-09-21 00:43:10 +02:00
David Given
2183c6c622
Run through clang-format.
2016-09-20 21:00:16 +02:00
David Given
13c117d15d
Import iburg.
2016-09-20 20:37:16 +02:00
